公开(公告)号：EP1721865B1

公开(公告)日：2012-12-26

申请号：EP06075963.6

申请日：2006-04-28

Applicant: Delphi Technologies, Inc.

Inventor： Rich, David B. ,  Crist, Steven M.

IPC: B81C1/00 ,  G01P15/12

CPC classification number: B81C1/00142 ,  B81B2201/0235 ,  B81B2201/032 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C2201/016 ,  G01P15/0802 ,  G01P15/123 ,  G01P2015/0828

公开(公告)号：EP2450308A1

公开(公告)日：2012-05-09

申请号：EP10190268.2

申请日：2010-11-05

Applicant: NXP B.V.

Inventor： Van Dal, Marcus Johannes Henricus ,  Humbert, Aurelie ,  Matthias, Merz ,  Ponomarev, Youri Victorovitch

IPC: B81B7/00

CPC classification number: B81B7/0012 ,  B81B2201/0214 ,  B81B2207/015 ,  B81C2201/016

Abstract: Disclosed is a method of manufacturing an integrated circuit having a substrate comprising a plurality of components and a metallization stack over said components, the metallization stack comprising a first sensing element (120) and a second sensing element (140) adjacent to the first sensing element, the method comprising depositing a moisture-impenetrable layer (150) over the metallization stack; depositing a passivation layer (510; 520) over the moisture-impenetrable layer; patterning the passivation layer and the underlying moisture-impenetrable layer such that a trench (600) is formed surrounding a region (810, 820) of the passivation layer over the first or second sensing element, the depth of said trench extending to a portion (310) of the metallization stack; depositing a layer of a further moisture-impenetrable material (700) over the resultant structure thereby filling said trench; patterning said further moisture-impenetrable material to expose a portion of the passivation layer in a region (810) above the first sensing element; and removing the exposed portion of the passivation layer to expose the first sensing element. A thus manufactured IC and article comprising such an IC are also disclosed.

Abstract translation: 本发明公开了制造具有基片，其包括组分的多元并在所述组件的金属化叠层集成电路的方法，所述金属化叠层包括第一感测元件（120）和第二感测元件（140）相邻的第一感测元件 中，该方法包括：在沉积在金属化堆叠中的水分难以渗透层（150）; 沉积钝化层（510; 520）在所述湿气不可透过的层; 图案化钝化层和底层水分不可渗过的层的搜索做了沟槽（600）形成在第一或第二感测元件围绕所述钝化层的区域（810，820），所述沟槽的深度延伸到部分（ 310）金属化叠层的; 沉积在得到的结构，从而填充所述沟槽的进一步湿气不可透过的材料（700）层; 所述图案化进一步水分不可渗过的材料，以在所述第一感测元件上方的区域（810）露出所述钝化层的一部分; 和去除钝化层的暴露部分，以暴露所述第一感测元件。 一个如此制造IC和物品，包括寻求IC这样的游离缺失盘。

公开(公告)号：EP1289876B1

公开(公告)日：2008-01-16

申请号：EP01951392.8

申请日：2001-06-13

Applicant: memsfab GmbH

Inventor： BERTZ, Andreas ,  GESSNER, Thomas ,  KÜCHLER, Matthias ,  KNÖFLER, Roman

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0086 ,  B81B2203/033 ,  B81C2201/016

Abstract: The invention relates to a single crystal doped silicon microstructure comprising at least one functional element (2.1, 2.2) and placed in a substrate (1). Also disclosed is the method for producing said microstructure. According to the invention, the functional element (2.1, 2.2) is mechanically and electrically separated from the substrate on all sides by means of insulating gaps (5, 5a), and is connected in at least one position to a first structure (4a) of an electrically conductive layer (S) which is electrically insulated from the substrate (1) by means of an insulating layer (3). The functional element is thereby fixed in position in relation to the substrate (1) by means of said electrically conductive layer. The functional element is extracted from the substrate in such a way that the isolation gaps are present on all sides in relation to the substrate (1). The electrically conductive layer (S) is applied in such a way that it is connected to the functional element by means of contact fingers, fixing the functional element firmly in position.

公开(公告)号：EP1509946A1

公开(公告)日：2005-03-02

申请号：EP03756181.8

申请日：2003-05-14

Applicant: Silicon Light Machines Corporation

Inventor： HUNTER, James, A.

IPC: H01L21/00 ,  H01L21/82 ,  H01L21/302

CPC classification number: G02B26/0808 ,  B81B2201/045 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/016 ,  B81C2203/0735 ,  B81C2203/0778 ,  H01L27/0611

Abstract: An integrated device including one or more device drivers and a diffractive light modulator monolithically coupled to the one or more driver circuits. The one or more driver circuits are configured to process received control signals and to transmit the processed control signals to the diffractive light modulator. A method of fabricating the integrated device preferably comprises fabricating a front-end portion for each of a plurality of transistors, isolating the front-end portions of the plurality of transistors, fabricating a front-end portion of a diffractive light modulator, isolating the front-end portion of the diffractive light modulator, fabricating interconnects for the plurality of transistors, applying an open array mask and wet etch to access the diffractive light modulator, and fabricating a back-end portion of the diffractive light modulator, thereby monolithically coupling the diffractive light modulator and the plurality of transistors.

公开(公告)号：EP1441976A2

公开(公告)日：2004-08-04

申请号：EP02772043.2

申请日：2002-09-05

Applicant: ROBERT BOSCH GMBH

Inventor： LAERMER, Franz

IPC: B81B3/00

CPC classification number: G01C19/5712 ,  B81B3/0086 ,  B81B2201/0242 ,  B81B2203/0136 ,  B81B2203/033 ,  B81C1/00801 ,  B81C2201/0104 ,  B81C2201/016

Abstract: The invention concerns a micromechanical component comprising a substrate (17) whereon is deposited a micromechanical functional layer (15) made of a first material. The invention is characterized in that the functional layer (15) includes first and second zones (15a, 15c) which are linked by a third zone (15b; 220a,b; 320a,b; 420a-d; 520; 520a-h) made of a second material (20). At least one of the zones (15a or 15b; 220a,b; 320a,b; 420a-d; 520; 520a-h or 15c) forms part of a mobile structure (32) which is suspended above the substrate (17). The invention also concerns a method for producing such a micromechanical component.

Abstract translation: 本发明涉及一种包括基底（17）的微机械构件，其上沉积由第一材料制成的微机械功能层（15）。 本发明的特征在于功能层（15）包括由第三区域（15b; 220a，b; 320a，b; 420a-d; 520; 520a-h）连接的第一和第二区域（15a，15c） 由第二材料（20）制成。 至少一个区域（15a或15b; 220a，b; 320a，b; 420a-d; 520; 520a-h或15c）形成悬挂在衬底（17）上方的移动结构（32）的一部分。 本发明还涉及用于制造这种微机械部件的方法。

公开(公告)号：EP1289876A1

公开(公告)日：2003-03-12

申请号：EP01951392.8

申请日：2001-06-13

Applicant: Amtec GmbH

Inventor： BERTZ, Andreas ,  GESSNER, Thomas ,  KÜCHLER, Matthias ,  KNÖFLER, Roman

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0086 ,  B81B2203/033 ,  B81C2201/016

Abstract: The invention relates to a single crystal doped silicon microstructure comprising at least one functional element (2.1, 2.2) and placed in a substrate (1). Also disclosed is the method for producing said microstructure. According to the invention, the functional element (2.1, 2.2) is mechanically and electrically separated from the substrate on all sides by means of insulating gaps (5, 5a), and is connected in at least one position to a first structure (4a) of an electrically conductive layer (S) which is electrically insulated from the substrate (1) by means of an insulating layer (3). The functional element is thereby fixed in position in relation to the substrate (1) by means of said electrically conductive layer. The functional element is extracted from the substrate in such a way that the isolation gaps are present on all sides in relation to the substrate (1). The electrically conductive layer (S) is applied in such a way that it is connected to the functional element by means of contact fingers, fixing the functional element firmly in position.

公开(公告)号：KR101320749B1

公开(公告)日：2013-10-21

申请号：KR1020120065569

申请日：2012-06-19

Applicant: 가부시키가이샤 재팬 디스프레이 ,  픽스트로닉스 인코포레이티드

Inventor： 카이토,타쿠오 ,  쿠리야가와,타케시 ,  사카타,류 ,  카리코메,오사무 ,  브로스니한,티모시제이.

IPC: G02B26/00 ,  G02F1/01 ,  B81B7/02

CPC classification number: G02B26/0841 ,  B81B7/007 ,  B81B2201/045 ,  B81C2201/0132 ,  B81C2201/016

Abstract: 전용 장치를 필요로 하지 않고, 제조 스루풋을 저하시키지 않으면서 단자상의 패시베이션막을 제거한 표시장치를 제공한다. 본 발명의 표시장치는, 기판상에 매트릭스 형태로 배치되고, 스위칭 소자 및 스위칭 소자에 의해 구동되는 MEMS셔터를 갖는 복수의 화소와, 기판상에 배치되고, 외부단자와 접속되는 복수의 단자를 포함한다. MEMS셔터는, 개구부를 갖는 셔터, 셔터에 접속된 제1 용수철, 제1 용수철에 접속된 제1 앵커, 제2 용수철, 및 제2 용수철에 접속된 제2 앵커를 갖고, 셔터, 제1 용수철, 제2 용수철, 제1 앵커 및 제2 앵커의 표면 중 기판의 표면에 대하여 수직방향의 면에 절연막을 갖고, 복수의 단자 표면, 및 셔터, 제1 용수철, 제2 용수철, 제1 앵커 및 제2 앵커의 표면 중 기판의 표면에 대하여 평행방향이며 또한 기판에 대면하는 측과 반대측의 면에는, 이 절연막이 없다.

公开(公告)号：KR101002449B1

公开(公告)日：2010-12-17

申请号：KR1020047019143

申请日：2003-05-14

Applicant: 실리콘 라이트 머신즈 코포레이션

Inventor： 헌터,제임스,에이.

IPC: H01L21/82 ,  H01L21/302

CPC classification number: G02B26/0808 ,  B81B2201/045 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/016 ,  B81C2203/0735 ,  B81C2203/0778 ,  H01L27/0611

Abstract: 집적 디바이스는 하나 이상의 디바이스 드라이버, 및 그 하나 이상의 디바이스 드라이버에 모놀리식 결합된 회절 광 변조기를 포함한다. 하나 이상의 디바이스 드라이버는 수신된 제어 신호를 처리하여, 그 처리된 제어 신호를 회절 광 변조기에 송신하도록 구성된다. 집적 디바이스를 제조하는 방법은, 복수의 트랜지스터 각각의 프론트엔드 부분을 제조하는 단계, 복수의 트랜지스터의 프론트엔드 부분을 고립시키는 단계, 회절 광 변조기의 프론트엔드 부분을 제조하는 단계, 회절 광 변조기의 프론트엔드 부분을 고립시키는 단계, 복수의 트랜지스터에 대한 상호접속부를 제조하는 단계, 회절 광 변조기에 접근하기 위하여 개방 어레이 마스크 및 습식 에칭을 적용하는 단계, 및 회절 광 변조기의 백엔드 부분을 제조하여, 회절 광 변조기와 복수의 트랜지스터를 모놀리식 결합하는 단계를 포함하는 것이 바람직하다.
회절 광 변조기, 디바이스 드라이버, 모놀리식 결합

公开(公告)号：US11785852B2

公开(公告)日：2023-10-10

申请号：US17979783

申请日：2022-11-03

Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.

Inventor： You Qian ,  Joan Josep Giner De Haro ,  Rakesh Kumar

IPC: H10N30/067 ,  H10N30/073 ,  H04R17/02 ,  H10N30/08 ,  H10N30/87 ,  H10N30/00 ,  H10N30/06

CPC classification number: H10N30/067 ,  H04R17/02 ,  H10N30/06 ,  H10N30/073 ,  H10N30/08 ,  H10N30/1051 ,  H10N30/872 ,  B81B2201/0257 ,  B81C2201/013 ,  B81C2201/016 ,  B81C2201/019 ,  B81C2201/0167

Abstract: A method of forming a microphone device includes: forming a through-hole in a substrate wafer; providing a second wafer; bonding the second wafer to the substrate wafer; and forming a top electrode over a first surface of a single-crystal piezoelectric film of the second wafer. The second wafer may include the single-crystal piezoelectric film. The single-crystal piezoelectric film may have a first surface and an opposing second surface. The second wafer may further include a bottom electrode arranged adjacent to the second surface, and a support member over the single-crystal piezoelectric film. The through-hole in substrate wafer may be at least substantially aligned with at least one of the top electrode and the bottom electrode.

公开(公告)号：US20180208459A1

公开(公告)日：2018-07-26

申请号：US15875635

申请日：2018-01-19

Applicant: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.

Inventor： Sabine TRUPP ,  Michael HENFLING ,  Karl NEUMEIER

IPC: B81C1/00

CPC classification number: B81C1/00206 ,  B81B2201/0214 ,  B81C2201/0114 ,  B81C2201/0115 ,  B81C2201/016 ,  G01N27/128 ,  G01N33/0027 ,  Y02P70/521

Abstract: A method of producing a semiconductor device includes providing a carrier structure having a semiconductor substrate; applying or introducing a precursor substance onto or into the carrier structure, treating the precursor substance for producing a porous matrix structure; introducing a functionalization substance into the porous matrix structure.