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    A computer system performing a two-dimensional rotation of packed data representing multimedia information
    86.
    发明专利
    A computer system performing a two-dimensional rotation of packed data representing multimedia information 未知

    公开(公告)号：AU1465497A

    公开(公告)日：1997-07-28

    申请号：AU1465497

    申请日：1996-12-18

    Applicant: INTEL CORP

    Inventor： MENNEMEIER LARRY M ,  PELEG ALEXANDER D ,  MITTAL MILLIND ,  EITAN BENNY ,  DULONG CAROLE ,  KOWASHI EIICHI

    IPC: G06F15/78 ,  G06T3/60 ,  G06F15/00 ,  G06F7/52

    Abstract: A computer system for processing multimedia data, wherein the data is transformed from a first domain to a second domain by performing two dimensional rotation on the data. The computer system includes a memory having stored therein a set of packed data sequences having data elements representing the digital data, and a sequence of instructions for transforming the digital data from a first domain to a second domain. The instructions, when executed, cause the processor to generate a first set of intermediate results in response to the execution of a first instruction which multiples data elements of a first packed data sequence with corresponding elements of a third packed data sequence, wherein the data elements of the third packed data sequence represent either a sine or cosine function. The instructions then cause the processor to generate a second set of intermediate results in response to the execution of a second instruction which multiplies the data elements of a second packed data sequence with corresponding data elements of a fourth packed data sequence, wherein the data elements of the fourth packed data sequence representing either a sine or cosine function. A set of first set of final results is generated in response to the execution of a third instruction which performs an arithmetic operation between corresponding data elements of the first and second sets of intermediate results. The final results represent the digital data transformed into the second domain.

    A computer system performing a two-dimensional rotation of packed data representing multimedia information
    87.
    发明专利
    A computer system performing a two-dimensional rotation of packed data representing multimedia information 未知

    公开(公告)号：ZA9610676B

    公开(公告)日：1997-07-09

    申请号：ZA9610676

    申请日：1996-12-19

    Applicant: INTEL CORP

    Inventor： MENNEMEIER LARRY M ,  PELEG ALEXANDER D ,  DULONG CAROLE ,  KOWASHI EIICHI ,  MITTAL MILLIND ,  EITAN BENNY

    IPC: G06F15/78 ,  G06T3/60 ,  G06F

    Abstract: A computer system for processing multimedia data, wherein the data is transformed from a first domain to a second domain by performing two dimensional rotation on the data. The computer system includes a memory having stored therein a set of packed data sequences having data elements representing the digital data, and a sequence of instructions for transforming the digital data from a first domain to a second domain. The instructions, when executed, cause the processor to generate a first set of intermediate results in response to the execution of a first instruction which multiples data elements of a first packed data sequence with corresponding elements of a third packed data sequence, wherein the data elements of the third packed data sequence represent either a sine or cosine function. The instructions then cause the processor to generate a second set of intermediate results in response to the execution of a second instruction which multiplies the data elements of a second packed data sequence with corresponding data elements of a fourth packed data sequence, wherein the data elements of the fourth packed data sequence representing either a sine or cosine function. A set of first set of final results is generated in response to the execution of a third instruction which performs an arithmetic operation between corresponding data elements of the first and second sets of intermediate results. The final results represent the digital data transformed into the second domain.

    A set of instructions for operating on packed data
    88.
    发明专利
    A set of instructions for operating on packed data 未知

    公开(公告)号：AU6677896A

    公开(公告)日：1997-03-19

    申请号：AU6677896

    申请日：1996-07-17

    Applicant: INTEL CORP

    Inventor： PELEG ALEXANDER D ,  YAARI YAACOV ,  MITTAL MILLIND ,  MENNEMEIER LARRY M ,  EITAN BENNY ,  GLEW ANDREW F ,  DULONG CAROLE ,  KOWASHI EIICHI ,  WITT WOLF

    IPC: G06F5/00 ,  G06F7/544 ,  G06F7/57 ,  G06F7/60 ,  G06F9/30 ,  G06F9/302 ,  G06F9/315 ,  G06F9/38 ,  G06F15/78 ,  G06F7/00 ,  G06F7/38 ,  G06F7/52 ,  G06F7/50

    Abstract: An apparatus comprising: a first storage area operable to have stored therein a first packed data containing at least an A 1 , an A 2 , an A 3 , and an A 4 element; a second storage area operable to have stored therein a second packed data containing at least a B 1 , a B 2 , a B 3 , and a B 4 element; a multiply circuit including a first multiplier coupled to said first storage area to receive said A 1 and coupled to said second storage area to receive said B 1 ; a second multiplier coupled to said first storage area to receive said A 2 and coupled to said second storage are to receive said B 2 ; a third multiplier coupled to said first storage area to receive said A 3 and coupled to said second storage area to receive said B 3 ; a fourth multiplier coupled to said first storage area to receive said A 4 and coupled to said second storage area to receive said B 4 ; a first adder coupled to said first multiplier and said second multiplier; a second adder coupled to said third multiplier and said fourth multiplier; and a third storage area coupled to said first adder and said second adder, said third storage area having at least a first field and a second field, said first field for saving an output of said first adder as a first data element of a third packed data, said second field for saving an output of said second adder as a second data element of said third packed data.

    Microprocessor with compare operation of composite operands
    89.
    发明专利
    Microprocessor with compare operation of composite operands 未知

    公开(公告)号：AU4507396A

    公开(公告)日：1996-06-19

    申请号：AU4507396

    申请日：1995-12-01

    Applicant: INTEL CORP

    Inventor： PELEG ALEXANDER ,  YAARI YAAKOV ,  MITTAL MILLIND ,  MENNEMEIER LARRY M ,  EITAN BENNY

    IPC: G06F7/02 ,  G06F9/30 ,  G06F9/302 ,  G06F7/20

    Abstract: A processor includes a decoder (202) coupled to receive a control signal (207). The control signal has a first source address (602), a second source address (603), a destination address (605), and an operation field (601). The first source address corresponds to a first location, and the second source address corresponds to a second location. The destination address corresponds to a third location. The operation field indicates that a type of packed data compare operation is to be performed. The processor includes a circuit coupled to the decoder for comparing a first packed data being stored at the first location with a second packed data being stored at the second location and for communicating a corresponding result packed data to the third location.

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