公开(公告)号：US09257834B1

公开(公告)日：2016-02-09

申请号：US14621752

申请日：2015-02-13

Applicant: THE SILANNA GROUP PTY LTD.

Inventor： Yashodhan Moghe ,  Virgilio T. Baterina ,  Stuart Molin

IPC: H03H7/24 ,  H02H7/20 ,  H05K7/02

CPC classification number: H02H7/205 ,  H01L25/00 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/0002 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K1/181 ,  H05K3/284 ,  H05K7/02 ,  H05K2201/09872 ,  H05K2203/1316 ,  H05K2203/1322 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An isolator assembly is disclosed. The assembly comprises a laminate consisting essentially of a block of homogenous material and a set of electrical contacts. A first die is coupled to a surface of the laminate. An isolation barrier is located entirely above the surface of the laminate. A second die is coupled to the laminate. The second die is galvanically isolated from the first die by the isolation barrier. The second die is in operative communication with the first die via the isolation barrier and a conductive trace on the laminate. The first die, the second die, the laminate, and the isolation barrier are all contained within an assembly package.

Abstract translation: 公开了隔离器组件。 组件包括基本上由均质材料块和一组电触点组成的层压体。 第一模具耦合到层压板的表面。 隔离屏障完全位于层压板的表面之上。 第二模具联接到层压板。 第二个管芯通过隔离屏障与第一个管芯电隔离。 第二模具通过隔离屏障和层压板上的导电迹线与第一模具操作性地连通。 第一模具，第二模具，层压板和隔离屏障都包含在组件包装内。

公开(公告)号：US09161434B2

公开(公告)日：2015-10-13

申请号：US14230639

申请日：2014-03-31

Applicant: Apple Inc.

Inventor： Nicholas G. Merz ,  Scott A. Myers ,  Gregory N. Stephens ,  Joseph C. Poole

IPC: H01L21/00 ,  H05K1/02 ,  C23C16/50 ,  H05K3/28 ,  C23C16/04

CPC classification number: H05K1/0216 ,  C23C16/042 ,  C23C16/50 ,  H05K3/282 ,  H05K3/284 ,  H05K2201/0715 ,  H05K2201/09872 ,  H05K2201/10189 ,  H05K2201/10371

Abstract: Methods for applying a hydrophobic coating to various components within a computing device are disclosed. More specifically, a hydrophobic coating can be applied by a plasma assisted chemical vapor deposition (PACVD) process to a fully assembled circuit board. Frequently, a fully assembled circuit board can have various components such as electromagnetic interference (EMI) shields which cover water sensitive electronics. A method is disclosed for perforating portions of the EMI shields that overlay the water sensitive electronics. Methods of sealing board to board connectors are also disclosed. In one embodiment solder leads of the board to board connectors can be covered by a silicone seal.

Abstract translation: 公开了将疏水涂层施加到计算装置内的各种部件的方法。 更具体地，疏水涂层可以通过等离子体辅助化学气相沉积（PACVD）方法施加到完全组装的电路板上。 通常，完全组装的电路板可以具有各种部件，例如覆盖水敏电子器件的电磁干扰（EMI）屏蔽。 公开了一种用于穿透覆盖水敏电子器件的EMI屏蔽部分的穿孔方法。 还公开了板对板连接器的密封方法。 在一个实施例中，板对板连接器的焊接引线可以被硅树脂密封覆盖。

公开(公告)号：US09090114B1

公开(公告)日：2015-07-28

申请号：US12877231

申请日：2010-09-08

Applicant: Brian A Stumm ,  Eric Sari

Inventor： Brian A Stumm ,  Eric Sari

IPC: A61N5/00 ,  B41M7/00

CPC classification number: H05K3/0091 ,  B05D3/0209 ,  B05D3/0263 ,  B05D3/067 ,  B41M7/0045 ,  H05K3/287 ,  H05K2201/09872 ,  H05K2203/0776 ,  H05K2203/111 ,  H05K2203/1545 ,  H05K2203/163

Abstract: A machine includes a conveyor configured to receive and convey a circuit assembly treated with a UV curable coating material; a UV zone that includes one or more LED-based UV radiation sources; a heating zone; and a controller configured to control heating of a circuit assembly treated with a UV curable coating material in the heating zone to achieve a target temperature of the treated electronic assembly prior to the UV zone. Various other apparatuses, systems, methods, etc., are also disclosed.

Abstract translation: 一种机器包括：传送器，其构造成接收和传送用UV可固化涂层材料处理的电路组件; 包括一个或多个基于LED的UV辐射源的UV区域; 加热区; 以及控制器，其被配置为控制在加热区域中用UV可固化涂层材料处理的电路组件的加热，以在UV区域之前实现经处理的电子组件的目标温度。 还公开了各种其它装置，系统，方法等。

公开(公告)号：US20150201500A1

公开(公告)日：2015-07-16

申请号：US14169169

申请日：2014-01-31

Applicant: Zohar SHINAR ,  Joel VIDAL

Inventor： Zohar SHINAR ,  Joel VIDAL

IPC: H05K3/12 ,  B29C67/00

CPC classification number: H05K3/125 ,  B29C64/112 ,  B29C64/135 ,  B29C64/386 ,  B29C70/882 ,  B29K2105/0058 ,  B29K2995/0005 ,  B29K2995/0007 ,  B29L2031/3406 ,  B29L2031/3425 ,  B33Y30/00 ,  B33Y50/02 ,  B33Y80/00 ,  H05K1/0206 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/0268 ,  H05K1/0269 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0284 ,  H05K1/092 ,  H05K1/165 ,  H05K1/167 ,  H05K1/186 ,  H05K3/0005 ,  H05K3/1283 ,  H05K3/225 ,  H05K3/284 ,  H05K3/4007 ,  H05K3/4069 ,  H05K3/4664 ,  H05K3/4685 ,  H05K3/4688 ,  H05K2201/0367 ,  H05K2201/037 ,  H05K2201/0391 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/098 ,  H05K2201/09836 ,  H05K2201/09845 ,  H05K2201/09872 ,  H05K2201/10098 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/163 ,  H05K2203/166

Abstract: Device, system, and method of three-dimensional printing. A device includes: a first 3D-printing head to selectively discharge conductive 3D-printing material; a second 3D-printing head to selectively discharge insulating 3D-printing material; and a processor to control operations of the first and second 3D-printing heads based on a computer-aided design (CAD) scheme describing a printed circuit board (PCB) intended for 3D-printing. A 3D-printer device utilizes 3D-printing methods, in order to 3D-print: (a) a functional multi-layer PCB; or (b) a functional stand-alone electric component; or (c) a functional PCB having an embedded or integrated electric component, both of them 3D-printed in a unified 3D-printing process.

Abstract translation: 三维打印的设备，系统和方法。 一种装置包括：第一3D打印头，用于选择性地排放导电3D打印材料; 第二3D打印头，用于选择性地放电绝缘3D打印材料; 以及基于描述用于3D打印的印刷电路板（PCB）的计算机辅助设计（CAD）方案来控制第一和第二3D打印头的操作的处理器。 3D打印机设备利用3D打印方法，以便3D打印：（a）功能性多层PCB; 或（b）功能独立电气部件; 或（c）具有嵌入或集成电气部件的功能PCB，它们都以统一的3D打印过程3D打印。

公开(公告)号：US20150146396A1

公开(公告)日：2015-05-28

申请号：US14593614

申请日：2015-01-09

Applicant: HZO, INC.

Inventor： Max Sorenson ,  Blake Stevens ,  Alan Rae ,  Marc Chason

IPC: H05K3/28 ,  H05K1/18 ,  H05K13/00

CPC classification number: H05K3/284 ,  H01L2224/16225 ,  H05K1/185 ,  H05K13/00 ,  H05K2201/09872 ,  Y10T29/49002 ,  Y10T29/49117

Abstract: A moisture-resistant electronic device includes at least one electronic component at least partially covered by a moisture-resistant coating. The moisture-resistant coating may be located within an interior of the electronic device. The moisture-resistant coating may cover only portions of a boundary of an internal space within the electronic device. A moisture-resistant coating may include one or more discernible boundaries, or seams, which may be located at or adjacent to locations where two or more components of the electronic device interface with each other. Assembly methods are also disclosed.

Abstract translation: 防潮电子设备包括至少一部分至少部分被防潮涂层覆盖的电子部件。 防潮涂层可以位于电子设备的内部。 防潮涂层可以仅覆盖电子设备内的内部空间的边界的一部分。 耐湿涂层可以包括一个或多个可辨别的边界或接缝，其可以位于或邻近电子设备的两个或更多个部件彼此接合的位置处或邻近处。 还公开了装配方法。

公开(公告)号：US08962097B1

公开(公告)日：2015-02-24

申请号：US13665314

申请日：2012-10-31

Applicant: Edward Maxwell Yokley ,  Yaw Samuel Obeng

Inventor： Edward Maxwell Yokley ,  Yaw Samuel Obeng

IPC: B29C59/14 ,  B05D3/06 ,  B05D3/14

CPC classification number: H05K1/185 ,  B05D1/62 ,  B05D3/142 ,  B05D3/144 ,  B29C59/14 ,  C03C23/006 ,  C03C2218/31 ,  H05K3/284 ,  H05K2201/0104 ,  H05K2201/0195 ,  H05K2201/09872 ,  H05K2203/095

Abstract: A film deposition process comprising exposing a surface of a substrate to a first plasma treatment having plasma reactants in a plasma chamber to form an activated substrate surface. The activated surface has a lower water contact angle than the substrate surface before the surface activating. The process comprises introducing water vapor into the plasma chamber to form a water layer on the activated surface. The process comprises introducing pre-cursors molecules into the plasma chamber in the presence of a second plasma to graft a layer of reacted pre-cursor molecules on the water layer.

Abstract translation: 一种成膜方法，包括将基板的表面暴露于在等离子体室中具有等离子体反应物的第一等离子体处理以形成活化的基板表面。 激活的表面在表面激活之前具有比基底表面更低的水接触角。 该方法包括将水蒸气引入等离子体室中以在活化表面上形成水层。 该方法包括在存在第二等离子体的情况下将预游离子分子引入等离子体室，以在水层上移植一层反应的前体分子。

公开(公告)号：US20150049444A1

公开(公告)日：2015-02-19

申请号：US14292829

申请日：2014-05-31

Applicant: Sridharan Venk ,  Earl Alfred Picard, JR. ,  Qi Dai ,  Richard Garner

Inventor： Sridharan Venk ,  Earl Alfred Picard, JR. ,  Qi Dai ,  Richard Garner

IPC: H05K1/11 ,  H05K3/30 ,  H05K1/02

CPC classification number: H05K1/111 ,  F21S4/22 ,  F21V21/005 ,  G06K19/07749 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L33/385 ,  H01L33/44 ,  H01L33/62 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32227 ,  H01L2224/48227 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/12044 ,  H01L2924/1421 ,  H05K1/0209 ,  H05K1/028 ,  H05K1/0296 ,  H05K1/118 ,  H05K1/189 ,  H05K3/0097 ,  H05K3/02 ,  H05K3/28 ,  H05K3/30 ,  H05K2201/051 ,  H05K2201/09381 ,  H05K2201/09445 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/09872 ,  H05K2201/099 ,  H05K2201/10098 ,  H05K2201/10106 ,  H05K2201/10522 ,  H05K2203/1545 ,  Y02P70/611 ,  Y10T29/4913 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A conductor pad and a flexible circuit including a conductor pad are provided. The conductor pad includes a first contact region, a second contact region, and a body portion configured to establish a conductive path between the first contact region and the second contact region. The body portion includes a perimeter edge having at least a first convex segment and a second convex with a first non-convex segment disposed between the first convex segment and the second convex segment. A method of constructing a flexible circuit to facilitate roll-to-roll manufacturing of the flexible circuit is also provided.

Abstract translation: 提供导体焊盘和包括导体焊盘的柔性电路。 导体焊盘包括第一接触区域，第二接触区域和被配置成在第一接触区域和第二接触区域之间建立导电路径的主体部分。 主体部分包括具有至少第一凸起部分的周边边缘和设置在第一凸起部分和第二凸起部分之间的具有第一非凸起部分的第二凸起部分。 还提供了一种构建柔性电路以便于柔性电路的卷对卷制造的方法。

公开(公告)号：US20140355225A1

公开(公告)日：2014-12-04

申请号：US14292876

申请日：2014-05-31

Applicant: Cytec Industries Inc.

Inventor： Richard David Jordan, JR. ,  Thomas C. Scanlon, IV

IPC: H05K1/03 ,  H05K1/18 ,  H05K3/00

CPC classification number: H05K3/284 ,  C08G2/10 ,  C08G18/246 ,  C08G18/36 ,  C08G18/4825 ,  C08G18/7664 ,  C09D175/04 ,  H05K3/285 ,  H05K2201/09872 ,  C08G18/10

Abstract: Formulated resin systems containing polymeric flood coat compositions are provided herein and characterized by having an initial mix thixotropic index from 1 to 5, and a gel time from 5 to 15 minutes such that when cured the compositions provide a Shore hardness from 15 A to 90 A, a thickness on horizontal surfaces from 20 mils to 75 mils, and a thickness on vertical surfaces from 4 mils to 20 mils. Electronic circuit assemblies flood coated with such formulated resin systems, and methods for protecting and supporting said assemblies, are also provided.

Abstract translation: 本文提供了含有聚合物防水涂料组合物的配制树脂体系，其特征在于具有1至5的初始混合物触变指数和5至15分钟的凝胶时间，使得当固化时，组合物提供肖氏硬度为15A至90A ，水平表面上的厚度为20密耳至75密耳，垂直表面上的厚度为4密耳至20密耳。 还提供了用这种配制的树脂体系浸涂的电子电路组件，以及用于保护和支撑所述组件的方法。

公开(公告)号：US20140342097A1

公开(公告)日：2014-11-20

申请号：US14227391

申请日：2014-03-27

Applicant: The United States Navy as represented by the Secretary of the Navy

Inventor： Nishkamraj Deshpande

IPC: H05K3/22

CPC classification number: H05K3/28 ,  H05K3/284 ,  H05K2201/0251 ,  H05K2201/0257 ,  H05K2201/0769 ,  H05K2201/09872

Abstract: The present invention relates application of conformal coatings made up of nano-fiber, nano-particle, and/or nano-capsule materials to be applied on electrical component parts in general and printed circuit boards (PCB) in particular. A conformal coating material, such as Parlyne, can be combined with nano-materials to produce desired results. Benefits of this invention include enhancement of conventional conformal coatings performance in terms of properties such as mechanical, electrical, magnetic and in particular to prevent or obstruct the growth of tin whiskers or any other manufacturing defect that can develop on the surface of a PCB.

Abstract translation: 本发明涉及将纳米纤维，纳米颗粒和/或纳米胶囊材料构成的保形涂层应用于一般的电子部件和特别是印刷电路板（PCB）上。 可将适形涂层材料（如Parlyne）与纳米材料结合以产生所需结果。 本发明的优点包括在诸如机械，电气，磁性的特性方面增强常规的保形涂层性能，特别是防止或阻碍锡晶须的生长或可能在PCB表面上发展的任何其它制造缺陷。

公开(公告)号：US20110143021A1

公开(公告)日：2011-06-16

申请号：US12638892

申请日：2009-12-15

Applicant: Corey A. Peterson ,  Martha A. Maxwell ,  Bruce W. Weiss

Inventor： Corey A. Peterson ,  Martha A. Maxwell ,  Bruce W. Weiss

IPC: H05K3/00 ,  B05D3/02 ,  B05C11/00 ,  B05C5/00

CPC classification number: H05K3/284 ,  H05K2201/09872

Abstract: A conformal coating system and method for coating a printed circuit board (PCB) is provided. The system comprises a coating station configured to coat the PCB with a coating material and without cleaning the PCB with a saponifier. A surface energy of the PCB is maintained above a target surface energy at least through the cleaning station to promote adhesion of the coating material.

Abstract translation: 提供了一种用于涂布印刷电路板（PCB）的保形涂布系统和方法。 该系统包括涂覆台，其被配置为用涂覆材料涂覆PCB并且不用皂化剂清洁PCB。 至少通过清洁站将PCB的表面能保持在目标表面能以上以促进涂层材料的粘附。