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公开(公告)号：KR101909203B1
公开(公告)日：2018-10-17
申请号：KR1020110072570
申请日：2011-07-21
Applicant: 삼성전자주식회사
CPC classification number: H01L24/92 , H01L23/3128 , H01L24/73 , H01L25/0657 , H01L2224/04042 , H01L2224/05554 , H01L2224/06155 , H01L2224/32145 , H01L2224/32225 , H01L2224/48145 , H01L2224/48227 , H01L2224/49113 , H01L2224/4917 , H01L2224/49175 , H01L2224/73265 , H01L2224/9202 , H01L2225/06506 , H01L2225/0651 , H01L2225/06541 , H01L2225/06562 , H01L2225/06565 , H01L2924/15311 , H01L2924/181 , H01L2224/32245 , H01L2924/00012 , H01L2924/00
Abstract: 본발명의기술적사상은본 발명의기술적사상은동일덴서티(density) 기준으로제품크기를더 작게하면서도고속동작이가능한멀티-채널패키지및 그멀티-채널패키지를포함한전자시스템을제공한다. 그멀티-채널패키지는제1 면및 제2 면을구비한패키지기판; 상기패키지기판의상기제1 면상에실장되고, 적어도 4개채널에대응하는그룹들로구분되는반도체칩들; 상기반도체칩들을밀봉하는밀봉재; 및상기패키지기판의상기제2 면상에형성되고상기적어도 4개의채널로구별되는외부접속단자들;을포함한다. 그전자시스템은메인보드; 복수의반도체칩들및 적어도 4개의채널로구별되는외부접속단자들을구비고, 상기메인보드상에실장되는적어도하나의멀티-채널패키지; 및상기멀티-채널패키지를제어하기위한 4n(n은 2 이상의정수)개의채널을구비고, 상기메인보드상에실장되는컨트롤러패키지;를포함한다.
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公开(公告)号：KR101685057B1
公开(公告)日：2016-12-09
申请号：KR1020100006126
申请日：2010-01-22
Applicant: 삼성전자주식회사
IPC: H01L23/00 , H01L23/31 , H01L23/495 , H01L25/18
CPC classification number: H01L23/3107 , H01L23/49575 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/18 , H01L2224/05554 , H01L2224/24145 , H01L2224/32145 , H01L2224/48145 , H01L2224/48147 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2225/06562 , H01L2924/00014 , H01L2924/181 , H01L2224/32245 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: 반도체메모리(Memory)와그 메모리컨트롤러(Controller)를포함하는반도체소자의적층패키지및 그제조방법을제공한다. 본발명에따른적층패키지(MCP; Multi-Chip Package)는데이터를저장하는제1 반도체칩들및 제 2 반도체칩들, 제1 반도체칩들및 제 2 반도체칩들을컨트롤하는제 3 반도체칩, 서브스트레이트(Substrate) 역할을하며전기적으로분리된복수의인터포저리드들, 패키지밖으로노출된외부접속리드들, 그리고상기칩들을둘러싸는몰드수지를포함한다. 제 1 반도체칩들은인터포저리드의상면에위치하고제 2 반도체칩들은인터포저리드의하면에위치하고제 3 반도체칩은제 1 반도체칩 상에적층된다. 인터포저리드들은제 1 반도체칩들과제 2 반도체칩을전기적으로연결하기위한매개수단으로사용되고외부접속리드는제 3 반도체칩에연결되며외부접속단자로쓰인다
Abstract translation: 提供半导体器件的堆叠封装及其制造方法。 半导体器件的堆叠封装可以包括至少一个第一半导体芯片，至少一个第二半导体芯片，至少一个第一半导体芯片和至少一个第二半导体芯片之间的至少一个插入件，以及第三半导体芯片 所述至少一个第一半导体芯片。 所述至少一个第一半导体芯片和所述至少一个第二半导体芯片可以被配置为执行第一功能和第二功能，并且每个可以包括多个键合焊盘。 第三半导体芯片可以被配置为执行与第一和第二功能不同的第三功能。 封装还可以包括外部连接引线可以被配置为将第三半导体芯片电连接到外部。
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公开(公告)号：KR1020120003200A
公开(公告)日：2012-01-10
申请号：KR1020100063931
申请日：2010-07-02
Applicant: 삼성전자주식회사
IPC: H01L23/00 , H01L25/065 , H01L23/31
CPC classification number: H01L25/0657 , H01L23/3121 , H01L24/05 , H01L24/06 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/0401 , H01L2224/05554 , H01L2224/05611 , H01L2224/05613 , H01L2224/05616 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/06155 , H01L2224/16145 , H01L2224/16225 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48225 , H01L2224/48227 , H01L2224/48611 , H01L2224/48616 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48669 , H01L2224/48711 , H01L2224/48716 , H01L2224/48739 , H01L2224/48747 , H01L2224/48755 , H01L2224/48769 , H01L2224/49175 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01013 , H01L2924/01028 , H01L2924/01079 , H01L2924/10161 , H01L2924/1434 , H01L2924/1438 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00 , H01L2924/3512 , H01L2224/48744 , H01L2224/48713 , H01L2224/48613 , H01L2924/00012 , H01L2224/45099
Abstract: PURPOSE: A semiconductor package with a spin stacked structure is provided to implement a memory with high capacitance by increasing the number of semiconductor chips received in a constant package space. CONSTITUTION: A substrate(310) has a plurality of substrate pads(311). A first semiconductor chip(320) is laminated on the substrate. A second semiconductor chip(330) is laminated on the first semiconductor chip. The second semiconductor chip is rotated and laminated on the first semiconductor chip.
Abstract translation: 目的：提供具有自旋堆叠结构的半导体封装，通过增加在恒定封装空间中接收的半导体芯片的数量来实现具有高电容的存储器。 构成：衬底（310）具有多个衬底焊盘（311）。 第一半导体芯片（320）层叠在基板上。 在第一半导体芯片上层叠第二半导体芯片（330）。 第二半导体芯片被旋转并层压在第一半导体芯片上。
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公开(公告)号：KR1020090005560A
公开(公告)日：2009-01-14
申请号：KR1020070068707
申请日：2007-07-09
Applicant: 삼성전자주식회사
Inventor： 김길수
IPC: H01L23/488
CPC classification number: H01L2224/10
Abstract: The semiconductor package is provided to obtain high-resistivity against the mechanical stress by using the SMD(solder mask define) and NSMD(non solder mask define) shape. The semiconductor package(100) includes the first substrate(110) and the second substrate(120). The first and 2 substrate are electrically connected each other by the solder ball(130). In the inner surface (110a) of the first substrate, the first insulating layer(114) which partly exposes the first voland(112) is formed. In the inner surface (120a) of the second substrate, the second insulating layer(124) which partly exposes the second voland(122) is formed. In the left side of the first substrate where the stress (A) is applied, the NSMD structure in which the first insulating layer does not cover the first ball land is formed. In the right side, the SMD structure where the first insulating layer covers the first ball land is formed. In the first substrate, the first exposure unit(141) for the NSMD structure in which it is not covered with the first insulating layer is formed.
Abstract translation: 提供半导体封装以通过使用SMD（阻焊掩模定义）和NSMD（非阻焊掩模定义）形状来获得针对机械应力的高电阻。 半导体封装（100）包括第一衬底（110）和第二衬底（120）。 第一和第二基板通过焊球（130）彼此电连接。 在第一基板的内表面（110a）中，形成部分暴露第一卷（112）的第一绝缘层（114）。 在第二基板的内表面（120a）中，形成部分地暴露第二卷（122）的第二绝缘层（124）。 在施加应力（A）的第一基板的左侧，形成第一绝缘层不覆盖第一球窝的NSMD结构。 在右侧，形成第一绝缘层覆盖第一球台的SMD结构。 在第一基板中，形成用于未被第一绝缘层覆盖的NSMD结构的第一曝光单元（141）。
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Patent Agency Ranking
公开(公告)号：KR100523330B1
公开(公告)日：2005-10-24
申请号：KR1020030052328
申请日：2003-07-29
Applicant: 삼성전자주식회사
IPC: H01L23/50
CPC classification number: H05K1/111 , H01L23/49816 , H01L2224/81385 , H01L2924/0002 , H05K3/3436 , H05K3/3452 , H05K2201/09663 , H05K2201/09809 , H05K2201/0989 , H05K2201/099 , H05K2201/10734 , Y02P70/611 , H01L2924/00
Abstract: 본 발명은 BGA(Ball Grid Array) 반도체 패키지에 관한 것으로, 특히 기판과 솔더볼의 결합이 안정되고 강화되도록 개선된 ＳＭＤ 및 ＮＳＭＤ 복합형 솔더볼 랜드 구조를 가지는 ＢＧＡ 반도체 패키지에 관한 것이다.
본 발명에 따른 BGA 반도체 패키지는, 솔더 마스크가 솔더볼 랜드의 외곽부를 덮는 SMD(Solder Mask Defined) 형 및 솔더볼 랜드와 그 둘레 주변의 기판이 노출되도록 솔더 마스크에 마스크 개방영역이 형성되는 NSMD(Non-solder Mask Defined) 형이 혼합된 솔더볼 랜드 구조를 포함하는 구성을 특징으로 한다.
이에 따라, 솔더볼 탈락 현상, 패턴 크랙(pattern crack)현상 및 솔더볼 랜드 분리현상이 억제되어 솔더볼 랜드에 대한 솔더볼 융착력이 향상되므로, BGA반도체 패키지의 신뢰성이 향상된다.-
公开(公告)号：KR1020000024864A
公开(公告)日：2000-05-06
申请号：KR1019980041628
申请日：1998-10-02
Applicant: 삼성전자주식회사
IPC: H01L21/027
Abstract: PURPOSE: A constant-temperature water circulation device for maintaining a temperature of a photoresistor developing liquid circulates a contract-temperature liquid, and makes a developing liquid maintain a constant temperature. CONSTITUTION: A constant-temperature water circulation device forms air tube(32) in one direction, allows air to be passed through with a constant pressure, and forms a vacuum tube(34) connected to the air tube(32). Because of air inflow pressure, a vacuum is made. A constant-temperature water circulation tube(28) passes through a vacuum tube(34) and air tube(32), a constant-temperature water is continuously flowed by a vacuum pressure and inflow pressure. A vacuum ejector(30) is mounted to a constant-temperature water circulation device. Thereby, a temperature of a developing liquid used to a developing process and a photoresistor deposition process of a semiconductor manufacturing process is always maintained.
Abstract translation: 目的：用于保持光敏电阻显影液的温度的恒温水循环装置循环收缩温度的液体，使显影液保持恒温。 构成：恒温水循环装置在一个方向上形成空气管（32），允许空气以恒定的压力通过，并形成连接到空气管（32）的真空管（34）。 由于空气流入压力，进行真空。 恒温水循环管（28）通过真空管（34）和空气管（32），恒温水通过真空压力和流入压力连续流动。 真空喷射器（30）安装在恒温水循环装置上。 因此，始终保持用于显影处理的显影液的温度和半导体制造工艺的光电晶体沉积工艺。
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公开(公告)号：KR101901664B1
公开(公告)日：2018-10-01
申请号：KR1020120033936
申请日：2012-04-02
Applicant: 삼성전자주식회사
CPC classification number: G11C17/18 , G11C7/14 , G11C17/16 , G11C29/789
Abstract: 본발명은퓨즈데이터리딩회로에관한것으로서, 퓨즈데이터를멀티리딩모드로리딩하는퓨즈데이터리딩회로에관한것이다. 본발명에서는, 퓨즈데이터를저장하는다수의퓨즈셀을구비하는퓨즈어레이; 퓨즈어레이의퓨즈셀에저장된퓨즈데이터를센싱하기위한센싱부; 퓨즈셀에저장된퓨즈데이터를리딩하는동작을제어하는제어부를포함하고, 제어부는퓨즈데이터리딩동작시에동작구간에따라퓨즈데이터를센싱하기위한센싱조건을서로다르게설정하여퓨즈데이터를리딩하도록제어하는퓨즈데이터리딩회로가제공된다.
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