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公开(公告)号：KR101541814B1
公开(公告)日：2015-08-05
申请号：KR1020080124379
申请日：2008-12-09
Applicant: 삼성전자주식회사
IPC: H01L21/027
CPC classification number: G03F7/0002 , B82Y10/00 , B82Y40/00
Abstract: 본발명은나노임프린트리소그래피방법에관한것으로, 기판의면적보다작은면적을가지는몰드를이용하여기판에패턴오차없이패턴을형성할수 있도록하기위해, 본발명에따른나노임프린트리소그래피방법은에칭층의복수영역들중 일부에도포된레진을제1 몰드로제1 레진패턴형성한후 상기제1 레진패턴을마스크로하여상기에칭층을에칭하는단계; 및상기복수영역들중 다른일부에다시도포된레진을제2 몰드로제2 레진패턴을형성한후 상기제2 레진패턴을마스크로하여상기에칭층을에칭하는단계를포함한다.
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公开(公告)号：KR101413233B1
公开(公告)日：2014-06-30
申请号：KR1020070093667
申请日：2007-09-14
Applicant: 삼성전자주식회사
IPC: H01L21/027 , G03F7/20 , B82Y40/00
Abstract: 본 발명은 나노 임프린트 리소그래피 공정에 관한 것으로, 본 발명의 목적은 간단한 장비를 이용하여 몰드와 기판 사이에 정전기적 인력을 발생시킴으로써 잔류층을 최소화할 수 있는 나노 임프린트 리소그래피 공정을 제공함에 있다.
이를 위해 본 발명에 따른 나노 임프린트 리소그래피 공정은 기판 위에 레지스트를 도포하고; 몰드를 가압하여 상기 레지스트에 미세패턴을 임프린팅하고; 대전된 도체판을 상기 기판에 접촉시킨다.
나노 임프린트, 잔류층, 정전기력-
公开(公告)号：KR1020140070140A
公开(公告)日：2014-06-10
申请号：KR1020120138254
申请日：2012-11-30
Applicant: 삼성전자주식회사
Inventor： 서정우
IPC: H01L21/8242 , H01L27/108
CPC classification number: H01L27/10814 , H01L27/10852 , H01L27/10876 , H01L28/86 , H01L28/90
Abstract: Disclosed is a method for fabricating a semiconductor device. A landing pad is formed. A stopping insulating layer is formed on the landing pad. A lower molding layer including a first material is formed on the stopping insulating layer. An upper molding layer including a second material, which is different from the first material, is formed on the lower molding layer. A hole is formed vertically through the upper and lower molding layers to expose the landing pad. A first electrode is formed in the hole. The upper molding layer is removed to expose a portion of a surface of the first electrode. The lower molding layer is removed to expose another portion of the surface of the first electrode. A dielectric layer is formed on the exposed portions of the surface of the first electrode. A second electrode is formed on the dielectric material.
Abstract translation: 公开了半导体器件的制造方法。 形成着陆垫。 在着陆垫上形成止动绝缘层。 在停止绝缘层上形成包括第一材料的下模塑层。 在下成型层上形成有与第一材料不同的第二材料的上模塑层。 垂直穿过上下成型层形成一个孔，露出着陆垫。 第一电极形成在孔中。 去除上模塑层以暴露第一电极的表面的一部分。 去除下模塑层以暴露第一电极的表面的另一部分。 在第一电极的表面的暴露部分上形成电介质层。 在电介质材料上形成第二电极。
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公开(公告)号：KR1020140027797A
公开(公告)日：2014-03-07
申请号：KR1020120093854
申请日：2012-08-27
Applicant: 삼성전자주식회사
IPC: H01L21/027
CPC classification number: H01L21/302 , H01L21/0337 , H01L21/0273
Abstract: Provided is a method for forming a semiconductor memory device. The method include a step of forming first preliminary holes arranged on an etching object layer in a first direction; a step of forming dielectric patterns filling the first preliminary holes; a step of successively and conformally forming a barrier layer and a sacrificial layer on the dielectric patterns; a step of forming etch control patterns between adjacent dielectric patterns; a step of forming a second preliminary holes by etching the sacrificial layer of a region defined by at least three adjacent dielectric patterns; and a step of forming contact holes by etching the etching object layer of a position corresponding to the first and the second preliminary holes.
Abstract translation: 提供一种形成半导体存储器件的方法。 该方法包括在第一方向上形成设置在蚀刻对象层上的第一预备孔的步骤; 形成填充所述第一预备孔的电介质图案的步骤; 在电介质图案上依次形成阻挡层和牺牲层的步骤; 在相邻电介质图案之间形成蚀刻控制图案的步骤; 通过蚀刻由至少三个相邻电介质图案限定的区域的牺牲层来形成第二预备孔的步骤; 以及通过蚀刻对应于第一和第二预备孔的位置的蚀刻对象层来形成接触孔的步骤。
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Patent Agency Ranking
公开(公告)号：KR1020130041630A
公开(公告)日：2013-04-25
申请号：KR1020110106019
申请日：2011-10-17
Applicant: 삼성전자주식회사
IPC: H01L21/8239 , H01L21/027 , H01L27/10
CPC classification number: H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L27/0207 , H01L27/10852 , H01L28/91 , H01L21/0274 , H01L21/8239 , H01L27/101
Abstract: PURPOSE: A method for forming a semiconductor memory device is provided to reduce manufacturing costs by removing a high expensive exposure apparatus. CONSTITUTION: A sacrificial layer(140) with preliminary opening parts is formed on an etch target layer. Auxiliary spacers(153) are formed in the preliminary opening parts. The sacrificial layer is removed. First mask spacers(173) to define first opening parts which cover the inner sides of the auxiliary spacers are formed in the preliminary opening parts. Second mask spacers(175) to define the second opening parts between the first opening parts and to cover the outer sides of the auxiliary spacers are formed. Holes are formed in the etch target layer by etching the etch target layer exposed by the first opening parts and the second opening parts.
Abstract translation: 目的：提供一种用于形成半导体存储器件的方法，通过去除高昂的曝光装置来降低制造成本。 构成：在蚀刻目标层上形成具有初步开口部分的牺牲层（140）。 辅助间隔件（153）形成在预备开口部分中。 牺牲层被去除。 在初步开口部分中形成有用于限定覆盖辅助间隔件的内侧的第一开口部的第一掩模间隔件（173）。 形成用于限定第一开口部分之间的第二开口部分并且覆盖辅助间隔件的外侧的第二掩模间隔件（175）。 通过蚀刻由第一开口部分和第二开口部分暴露的蚀刻目标层，在蚀刻目标层中形成孔。
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公开(公告)号：KR1020120008745A
公开(公告)日：2012-02-01
申请号：KR1020100069770
申请日：2010-07-20
Applicant: 삼성전자주식회사
IPC: G02F1/13 , H01L31/20 , H01L21/683
CPC classification number: G02F1/1303 , H01L21/6838 , H01L31/206 , H01L2224/95115
Abstract: PURPOSE: A roll to roll apparatus and a flexible substrate fixing method are provided to uniformly adhere to the front side of a flexible substrate without bending of a substrate. CONSTITUTION: A roll to roll apparatus(1) includes a base plate(10), an external vacuum chuck plate(20), an internal chuck plate(30), an external vacuum chuck(40), an internal vacuum chuck(50), and a guide roller. The external vacuum chuck plate includes the upper side of the base plate. The internal vacuum chuck plate is included in the center of the external vacuum chuck plate. The inside vacuum chuck is included in the lower side of the internal vacuum chuck plate. The pattern region of the flexible substrate is adsorbed.
Abstract translation: 目的：提供卷对卷装置和柔性基板固定方法，以均匀地粘附到柔性基板的前侧而不使基板弯曲。 卷绕装置（1）包括基板（10），外部真空吸盘板（20），内部夹盘板（30），外部真空吸盘（40），内部真空吸盘（50） ，和导辊。 外部真空吸盘包括基板的上侧。 内部真空夹盘包含在外部真空吸盘的中心。 内部真空吸盘包括在内部真空吸盘板的下侧。 柔性基板的图案区域被吸附。
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公开(公告)号：KR101106675B1
公开(公告)日：2012-01-18
申请号：KR1020050072557
申请日：2005-08-09
Applicant: 삼성전자주식회사
IPC: H01R12/77
Abstract: 본 발명은 단말기 적소에 형성되는 이어잭 홀에 이어잭을 삽입하여 전기적으로 접속시키기 위한 구조에 관한 것으로서, 상기 단말기 내부의 메인 바디 측면에서 상기 이어잭 홀과 상응하도록 다수의 접속 단자를 포함하는 가요성 인쇄회로가 수직하게 설치되며, 상기 이어잭은 장착면 적소에 다수의 돌출 단자가 설치되어, 상기 이어잭 홀에 슬라이딩 방식으로 장착되어 상기 가요성 인쇄회로의 접속 단자에 상기 돌출 단자가 전기적으로 접속되도록 하여, 소켓이 설치되는 공간을 활용하여 메인 보드의 부품 실장 공간이 확대되어 타 부품 실장에 따른 단말기 부피 증가의 단점을 배제시킬 수 있다.
단말기, 이어잭, 이어잭 홀, 가이드 슬릿, 가이드 돌기, 슬라이딩-
公开(公告)号：KR1020090028224A
公开(公告)日：2009-03-18
申请号：KR1020070093667
申请日：2007-09-14
Applicant: 삼성전자주식회사
IPC: H01L21/027 , G03F7/20 , B82Y40/00
CPC classification number: G03F7/0002 , B82Y40/00
Abstract: A nano imprint lithography process is provided to generate electrostatic attraction between the mold and the substrate and to minimize the residual layer. The resist(20) is coated on the substrate(30). The mold(10) is pressurized in the resist. The micro-pattern is imprinted in the resist. The charged conducting plate(40) is contacted with the substrate. The resist is hardened by the thermal scanning or the ultraviolet irradiation after the contact of the substrate. The substrate is earthed and the mold is formed from resist after the contact of resist.
Abstract translation: 提供纳米压印光刻工艺以在模具和衬底之间产生静电吸引力并使剩余层最小化。 抗蚀剂（20）被涂覆在基材（30）上。 模具（10）在抗蚀剂中被加压。 微型图案印在抗蚀剂中。 带电的导电板（40）与衬底接触。 抗蚀剂通过基板接触后的热扫描或紫外线照射而硬化。 基板接地后，抗蚀剂接触后由抗蚀剂形成模具。
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公开(公告)号：KR1020080094291A
公开(公告)日：2008-10-23
申请号：KR1020070038519
申请日：2007-04-19
Applicant: 삼성전자주식회사
Abstract: An apparatus for inspecting the uniformity of pattern is provided to inspect the CD uniformity of periodical patterns and the phase defect information. An apparatus for inspecting the uniformity of pattern comprises a sample(10) having periodical patterns, a light source, a detector(40), an amplifier(50), and an inspection part(80). The light source irradiates laser beam having short wavelength to the sample. The detector detects the frequency of beam reflected from the sample. The amplifier measures amplitude of the laser reflected from the sample and a phase signal by comparing the frequency of the reflected beam detected by the detector and the frequency of a reference beam emitted from the light source. The inspection part inspects the CD uniformity of the sample pattern and phase defect information by analyzing the amplitude of the laser measured by the amplifier and the phase signal.
Abstract translation: 提供了一种用于检查图案均匀性的装置，用于检查周期图案的CD均匀性和相缺陷信息。 用于检查图案均匀性的装置包括具有周期图案的样品（10），光源，检测器（40），放大器（50）和检查部分（80）。 光源向样品照射具有短波长的激光束。 检测器检测从样品反射的光束的频率。 放大器通过比较由检测器检测的反射光束的频率和从光源发射的参考光束的频率，来测量从样本反射的激光的振幅和相位信号。 检查部分通过分析由放大器测量的激光的振幅和相位信号来检查样品图案的CD均匀性和相缺陷信息。
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