公开(公告)号：EP2328172B1

公开(公告)日：2019-06-26

申请号：EP09012507.1

申请日：2009-10-02

Applicant: Abb Research Ltd.

Inventor： Yesin, Berk ,  Agostini, Bruno ,  Haederli, Christoph ,  Liu, Chunlei ,  Agostini, Francesco ,  Duran, Hamit ,  Kicin, Slavo

IPC: H01L23/427 ,  F28D15/02 ,  H05K7/20 ,  H01L25/07

公开(公告)号：EP2328172A1

公开(公告)日：2011-06-01

申请号：EP09012507.1

申请日：2009-10-02

Applicant: Abb Research Ltd.

Inventor： Yesin, Berk ,  Agostini, Bruno ,  Haederli, Christoph ,  Liu, Chunlei ,  Agostini, Francesco ,  Duran, Hamit ,  Kicin, Slavo

IPC: H01L23/427

CPC classification number: H01L23/427 ,  F28D15/0233 ,  F28D15/0266 ,  H01L25/072 ,  H01L2924/0002 ,  H05K7/20936 ,  Y10T29/49826 ,  H01L2924/00

Abstract: A power-electronic arrangement comprising semiconductor components (102, 103, 107), a heat exchanger (110), and an electrically conductive element (109) is presented. The heat exchanger comprises evaporator channels (111) and condenser channels (112) for working fluid. The electrically conductive element comprises a contact surface providing a thermal contact to outer surfaces of walls of the evaporator channels for transferring heat from the electrically conductive element to the evaporator channels. A main current terminal of each semiconductor component is bonded to the electrically conductive element which thus forms a part of a main current circuitry of a power system. As the main current terminal is directly bonded to the electrically conductive element cooled with the heat exchanger, the temperature gradients inside the semiconductor components can be kept moderate, and thus the temperatures inside the semiconductor components can be limited.

Abstract translation: 提出了包括半导体部件（102,103,107），热交换器（110）和导电元件（109）的功率电子装置。 热交换器包括用于工作流体的蒸发器通道（111）和冷凝器通道（112）。 导电元件包括​​提供与蒸发器通道的壁的外表面的热接触的接触表面，用于将热量从导电元件传递到蒸发器通道。 每个半导体部件的主电流端子被接合到导电元件，由此形成电力系统的主电流电路的一部分。 由于主电流端子直接接合到用热交换器冷却的导电元件，所以半导体部件内部的温度梯度可以保持适中，从而可以限制半导体部件内部的温度。

公开(公告)号：EP2528092A1

公开(公告)日：2012-11-28

申请号：EP11167810.8

申请日：2011-05-27

Applicant: ABB Research Ltd.

Inventor： Kicin, Slavo ,  Schulz, Nicola ,  Häfner, Jürgen ,  Liu, Chunlei ,  Hamidi, Amina ,  Fabian, Jan-Henning

IPC: H01L23/62 ,  H01L25/07 ,  H01L21/60

CPC classification number: H01L25/072 ,  H01L23/62 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/29339 ,  H01L2224/30181 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/83801 ,  H01L2224/8382 ,  H01L2224/8384 ,  H01L2224/97 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A semiconductor device (509a, b) comprises a semiconductor chip (504a, b) comprising a bottom electrode and a top electrode and a bottom electrode-baseplate (502). The bottom electrode-baseplate (502) is electrically and thermally conductive. The semiconductor device (509a, b) comprises a top electrode-baseplate (508). The top electrode-baseplate (508) is electrically and thermally conductive. The semiconductor device (509a, b) comprises a first preform (506a, b) made of material configured for supporting a creation of an electrically conductive alloy when being melted. In order to provide a semiconductor device having enhanced characteristics, the bottom electrode of the semiconductor chip (504a, b) is thermally and electrically connected to the bottom electrode-baseplate (502) via a first bonding layer (618), the top electrode of the semiconductor chip (504a, b) is thermally and electrically connected to a first side of the first preform (506a, b) via a second bonding layer (620), and the second side of the first preform (506a, b) is thermally and electrically connected to the top electrode-baseplate (508) via a third bonding layer (624).

Abstract translation: 半导体器件（509a，b）包括具有底部电极和顶部电极以及底部电极基板（502）的半导体芯片（504a，b）。 底部电极基板（502）是导电且导热的。 半导体器件（509a，b）包括顶部电极基板（508）。 顶部电极基板（508）是导电且导热的。 半导体器件（509a，b）包括由材料制成的第一预制件（506a，506b），所述第一预制件被构造成用于在熔化时支持导电合金的形成。 为了提供具有增强特性的半导体器件，半导体芯片（504a，b）的底部电极经由第一键合层（618）与底部电极基板（502）热和电连接， 半导体芯片（504a，b）经由第二结合层（620）热和电连接到第一预成型件（506a，506b）的第一侧，并且第一预成型件（506a，506b）的第二侧是热 并经由第三结合层（624）电连接到顶部电极基板（508）。

公开(公告)号：EP2503595A1

公开(公告)日：2012-09-26

申请号：EP12153710.4

申请日：2012-02-02

Applicant: ABB Research Ltd.

Inventor： Liu, Chunlei ,  Schulz, Nicola ,  Kicin, Slavo

IPC: H01L23/62 ,  H01L25/07

CPC classification number: H01L25/072 ,  H01L23/3735 ,  H01L23/492 ,  H01L23/62 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L2224/03505 ,  H01L2224/05124 ,  H01L2224/05624 ,  H01L2224/0568 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29298 ,  H01L2224/32506 ,  H01L2224/37147 ,  H01L2224/3718 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/40227 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/84424 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/8448 ,  H01L2224/8484 ,  H01L2224/85205 ,  H01L2224/92246 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/83205

Abstract: The present invention relates to a power semiconductor module comprising a semiconductor device (12), in particular an insulated gate bipolar transistor, a reverse conductive insulated gate bipolar transistor, or a bi-mode insulated gate transistor, with an emitter electrode and a collector electrode, wherein an electrically conductive upper layer (14) is sintered to the emitter electrode, the upper layer (14) at least partly being capable of forming an eutecticum with the semiconductor of the semiconductor device (12) and at least partly having a coefficient of thermal expansion which differs from the coefficient of thermal expansion of the semiconductor in a range of ≤ 250%, in particular ≤ 50%, and wherein an electrically conductive base plate (20) is sintered to the collector electrode, and wherein the semiconductor module (10) further comprises an electrically conductive area (24) being electrically isolated from the base plate (20) and being connected to the upper layer (14) via a direct electrical connection (22). A semiconductor module according to the invention is easy to prepare, has an improved reliability and exhibits short circuit failure mode capacity.

Abstract translation: 本发明涉及一种功率半导体模块，其包括半导体器件（12），特别是绝缘栅双极晶体管，反向导通绝缘栅双极晶体管或双模绝缘栅晶体管，其具有发射极和集电极 ，其中将导电上层（14）烧结到所述发射极，所述上层（14）至少部分地能够与半导体器件（12）的半导体形成共晶，并且至少部分地具有 热膨胀与半导体的热膨胀系数不同，在‰÷250％的范围内，特别是‰¤50％，其中将导电基板（20）烧结到集电极上，其中半导体 模块（10）还包括导电区域（24），其与基板（20）电隔离并连接到上层（ 14）通过直接电连接（22）。 根据本发明的半导体模块易于准备，具有改进的可靠性并且具有短路故障模式容量。

公开(公告)号：EP2270855A1

公开(公告)日：2011-01-05

申请号：EP09164030.0

申请日：2009-06-29

Applicant: ABB Research Ltd.

Inventor： Haederli, Christoph ,  Liu, Chunlei ,  Kicin, Slavo ,  Agostini, Bruno ,  Wildner, Franz

IPC: H01L25/07 ,  H01L25/18 ,  H01L21/60 ,  H01L23/538

CPC classification number: H02M7/003 ,  H01L23/051 ,  H01L23/5385 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/291 ,  H01L2224/29139 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/33505 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/9222 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for fabricating an electrical module comprising a first substrate plate (101), a second substrate plate (102), and semiconductor components (103-110) between the first and second substrate plates is presented. Also an electrical module obtainable with the method and an electrical converter device including such electrical modules are presented. In the method, a bond (112) between first sides of the semiconductor components and the first substrate plate is made by sintering and, subsequently, a bond (111) between second sides of the semiconductor components and the second substrate plate is made by soldering. As the sintered bond can withstand high temperatures, a high temperature solder can be used for the soldered bond without damaging the earlier made sintered bond.

Abstract translation: 提供一种用于制造电模块的方法，包括第一基板（101），第二基板（102）和第一和第二基板之间的半导体部件（103-110）。 还提出了可以通过该方法获得的电模块和包括这种电模块的电转换装置。 在该方法中，通过烧结制作半导体部件的第一面和第一基板之间的接合部（112），接着，在半导体部件的第二面与第二基板之间的接合（111）通过焊接 。 由于烧结粘结能够承受高温，因此可以将高温焊料用于焊接粘合，而不会损坏较早制造的烧结粘结。

公开(公告)号：EP2560468A1

公开(公告)日：2013-02-20

申请号：EP11178151.4

申请日：2011-08-19

Applicant: ABB Research Ltd.

Inventor： Liu, Chunlei ,  Schulz, Nicola ,  Kicin, Slavo

IPC: H05K3/32

CPC classification number: H05K3/321 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32227 ,  H01L2224/33181 ,  H01L2224/82201 ,  H01L2224/83048 ,  H01L2224/83055 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/83906 ,  H01L2224/97 ,  H01L2924/1305 ,  H01L2924/13055 ,  H05K2201/10674 ,  H05K2203/1131 ,  H05K2203/1484 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01029 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/83

Abstract: A method of connecting elements (102-106) of a plurality of elements (102-106) to one another is described. The method comprises applying solder material (110) on a first element (102) of the plurality of elements (102-106). The solder material (110) comprises a liquidus temperature. The method comprises applying sinter material (108) on a second element (103) of the plurality of elements (102-104). The sinter material (108) comprises a sintering temperature. The method comprises assembling the first element (102) and a third element (104, 504) of the plurality of elements (102-106), assembling the second element (103) and a fourth element (106) of the plurality of elements (102-106), soldering the first element (102) and the third element (104) to one another, and sintering the second element (103) and the fourth element (106) to one another. In order to accomplish short process duration, reduced costs and an increased throughput, the sintering and the soldering are simultaneously executed.

Abstract translation: 被描述的元件（102-106），以彼此的多个连接元件（102-106）的方法。 该方法包括的元素的多元性（102-106）的第一元件（102）上施加的焊料材料（110）。 焊接材料（110）包括的液相线温度。 该方法包括的元素的多元性（102-104）的第二元件（103）上施加烧结材料（108）。 的烧结材料（108）包括烧结温度。 该方法包括组装元件的多元性（102-106）的所述第一元件（102）和第三元件（104，504），在组装所述第二元件（103）和元素的多个第四元件（106）（ 102-106），焊接所述第一元件（102）和所述第三元件（104）彼此连接，和烧结所述第二构件（103）和所述第四元件（106）彼此连接。 为了实现短的持续时间的过程，降低了成本，在增加产量，烧结和焊接被同时执行。

公开(公告)号：EP2226838A1

公开(公告)日：2010-09-08

申请号：EP09154319.9

申请日：2009-03-04

Applicant: ABB Research Ltd.

Inventor： Liu, Chunlei ,  Hartmann, Samuel

IPC: H01L21/60 ,  H01L21/00 ,  B22F7/06

CPC classification number: B22F3/003 ,  B22F7/062 ,  H01L21/67011 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/29139 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2924/00014

Abstract: The invention relates to a fixture apparatus (1; 20) for bonding a plurality of elements (7, 9; 21, 22) by sintering a bonding layer (8; 23) sandwiched between the elements (7, 9; 21, 22); comprising a support frame (2; 24); a clamping means (3; 25); a reception region for receiving a stack (4) including the plurality of elements (7, 9; 21, 22) in-between which the bonding layer (8; 23) is arranged, wherein the clamping means (3; 25) is adapted to clamp the stack (4) when loaded into the reception region and to permanently apply a sintering pressure. The fixture apparatus (1; 20) can be applied in a method for bonding a plurality of elements (7, 9; 21, 22) using a sintering process. The method comprises the steps of clamping the stack (4) into the reception region of the fixture apparatus (1; 20), and applying heat to the stack (4) and the bonding layer (8; 23) to perform a sintering process of the bonding layer (8; 23).

Abstract translation: 本发明涉及一种用于通过烧结夹在元件（7,9; 21,22）之间的接合层（8; 23）来接合多个元件（7,9; 21,22）的固定装置（1; 20） ; 包括支撑框架（2; 24）; 夹紧装置（3; 25）; 接收区域，用于接收包括其中布置有所述接合层（8; 23）的所述多个元件（7,9; 21,22）的叠层（4），其中所述夹紧装置（3; 25）适于 当堆叠（4）装载到接收区域并且永久地施加烧结压力时，夹紧堆叠（4）。 固定装置（1; 20）可以以使用烧结工艺粘接多个元件（7,9; 21,22）的方法来应用。 该方法包括以下步骤：将堆叠（4）夹持到固定设备（1; 20）的接收区域中，并向堆叠（4）和粘合层（8; 23）施加热量，以进行烧结过程 所述结合层（8; 23）。