ESD IMPLANT FOLLOWING SPACER DEPOSITION
    2.
    发明申请

    公开(公告)号:WO2003003460A3

    公开(公告)日:2003-01-09

    申请号:PCT/US2001/049056

    申请日:2001-12-14

    Abstract: One aspect of the present invention provides a process for forming IC devices (100) with ESD protection transistors (112). According to one aspect of the invention, an ESD protection transistor (112) is provided with a light doping and then, after forming spacers, a heavy doping. The heavy doping with spacers in place can lower the sheet resistance, enhance the bipolar effect for the transistor, reduce the transistor's capacitance, and reduce the junction breakdown voltage, all without causing short channel effects. The invention thereby provides ESD protection transistors (112) that are compact, highly sensitive, and fast-switching. The spacers can be formed at the same time as spacers for other transistors, such as other transistors in a peripheral region of the device (100).

    ESD IMPLANT FOLLOWING SPACER DEPOSITION
    3.
    发明申请
    ESD IMPLANT FOLLOWING SPACER DEPOSITION 审中-公开
    静电植入物在隔离层沉积中的应用

    公开(公告)号:WO2003003460A2

    公开(公告)日:2003-01-09

    申请号:PCT/US2001/049056

    申请日:2001-12-14

    CPC classification number: H01L29/7833 H01L27/0266 H01L2924/0002 H01L2924/00

    Abstract: One aspect of the present invention provides a process for forming IC devices (100) with ESD protection transistors (112). According to one aspect of the invention, an ESD protection transistor (112) is provided with a light doping and then, after forming spacers, a heavy doping. The heavy doping with spacers in place can lower the sheet resistance, enhance the bipolar effect for the transistor, reduce the transistor's capacitance, and reduce the junction breakdown voltage, all without causing short channel effects. The invention thereby provides ESD protection transistors (112) that are compact, highly sensitive, and fast-switching. The spacers can be formed at the same time as spacers for other transistors, such as other transistors in a peripheral region of the device (100).

    Abstract translation: 本发明的一个方面提供一种用于形成具有ESD保护晶体管(112)的IC器件(100)的工艺。 根据本发明的一个方面,ESD保护晶体管(112)具有轻掺杂,然后在形成间隔物之后进行重掺杂。 具有间隔物的重掺杂可以降低薄层电阻,增强晶体管的双极效应,降低晶体管的电容,并降低结击穿电压,而不会导致短沟道效应。 因此,本发明提供了紧凑,高灵敏度和快速切换的ESD保护晶体管(112)。 间隔物可以与其它晶体管的间隔物同时形成,例如器件(100)的外围区域中的其它晶体管。

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