Abstract:
PROBLEM TO BE SOLVED: To provide a method and structure which easily determine a change in the conductivity of nanotube by considering problems, defects and demerits in conventional methods and structure, and by applying stress to nanotube structure. SOLUTION: As to structure (and a method) for a piezoelectric device including a piezoelectric material layer, the nanotube structure is attached so as to generate a stress change in the nanotube structure by a change in the shape of a piezoelectric material. COPYRIGHT: (C)2004,JPO&NCIPI
Abstract:
A method of fabricating a tunneling nanotube field effect transistor includes forming in a nanotube (202) an n-doped region (220) an a p-doped region (224) which are separated by an undoped channel region (222) of the transistor. Electrical contacts (208), (210) an (212) are provided for the doped regions and a gate electrode (206) that is formed upon a gate dielectric layer (204) deposited on at least a portion of the channel region of the transistor.
Abstract:
A semiconductor structure is provided, which includes multiple sections arranged along a longitudinal axis. Preferably, the semiconductor structure comprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentration preferably extends along the longitudinal axis through the middle section and the two terminal sections. A semiconductor shell having a second, higher dopant concentration preferably encircles a portion of the semiconductor core at the two terminal sections, but not at the middle section, of the semiconductor structure. It is particularly preferred that the semiconductor structure is a nanostructure having a cross-sectional dimension of not more than 100 nm.
Abstract:
A carbon-nanotube field transistor semiconductor device, comprising: a vertical carbon-nanotube (508) wrapped in a dielectric material (511); a source formed at a first side of the carbon-nanotube; a drain (515) formed on a second side of the carbon-nanotube; a bilayer nitride complex through which a band strap of each of the source and the drain is formed connecting the carbon-nanotube wrapped in the dielectric material to the source and the drain; and a gate (512) formed substantially over a portion of the carbon-nanotube. Further disclosed are methods for forming the following self-aligned carbon-nanotube field effect transistor: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
Abstract:
A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube [104] deposited on a substrate [102], a source a nd a drain [106-107] formed at a first end and a second end of the carbon- nanotube [104], respectively, and a gate [112] formed substantially over a portion of the carbon-nanotube [104], separated from 10 the carbon-nanotube by a dielectric film [111].
Abstract:
A carbon-nanotube field transistor semiconductor device, comprising: a vertical carbon-nanotube (508) wrapped in a dielectric material (511); a source formed at a first side of the carbon-nanotube; a drain (515) formed on a second side of the carbon-nanotube; a bilayer nitride complex through which a band strap of each of the source and the drain is formed connecting the carbon-nanotube wrapped in the dielectric material to the source and the drain; and a gate (512) formed substantially over a portion of the carbon-nanotube. Further disclosed are methods for forming the following self-aligned carbon-nanotube field effect transistor: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
Abstract:
A carbon-nanotube field transistor semiconductor device, comprising: a vertical carbon-nanotube (508) wrapped in a dielectric material (511); a source formed at a first side of the carbon-nanotube; a drain (515) formed on a second side of the carbon-nanotube; a bilayer nitride complex through which a band strap of each of the source and the drain is formed connecting the carbon-nanotube wrapped in the dielectric material to the source and the drain; and a gate (512) formed substantially over a portion of the carbon-nanotube. Further disclosed are methods for forming the following self-aligned carbon-nanotube field effect transistor: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
Abstract:
A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube [104] deposited on a substrate [102], a source and a drain [106-107] formed at a first end and a second end of the carbon-nanotube [104], respectively, and a gate [112] formed substantially over a portion of the carbon-nanotube [104], separated from the carbon-nanotube by a dielectric film [111].
Abstract:
A semiconductor structure is provided, which includes multiple sections a rranged along a longitudinal axis. Preferably, the semiconductor structure c omprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentra tion preferably extends along the longitudinal axis through the middle secti on and the two terminal sections. A semiconductor shell having a second, hig her dopant concentration preferably encircles a portion of the semiconductor core at the two terminal sections, but not at the middle section, of the se miconductor structure. It is particularly preferred that the semiconductor s tructure is a nanostructure having a cross-sectional dimension of not more t han 100 nm.