公开(公告)号：EP1766691A4

公开(公告)日：2011-06-29

申请号：EP05732384

申请日：2005-03-30

Applicant: IBM

Inventor： BOJARCZUK NESTOR A JR ,  CABRAL CYRIL JR ,  CARTIER EDUARD A ,  COPEL MATTHEW W ,  FRANK MARTIN M ,  GOUSEV EVGENI P ,  GUHA SUPRATIK ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K

IPC: H01L31/113 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L31/119

CPC classification number: H01L29/513 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/823857 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517

公开(公告)号：EP1825521A4

公开(公告)日：2008-10-01

申请号：EP05820881

申请日：2005-11-01

Applicant: IBM

Inventor： BOJARCZUK NESTOR A JR ,  CABRAL CYRIL JR ,  CARTIER EDUARD A ,  FRANK MARTIN M ,  GOUSEV EVGENI P ,  GUHA SUPRATIK ,  JAMISON PAUL C ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K

IPC: H01L29/792 ,  H01L21/336 ,  H01L29/76 ,  H01L29/94 ,  H01L31/00

CPC classification number: H01L29/513 ,  H01L21/28194 ,  H01L21/2822 ,  H01L21/823828 ,  H01L21/823857 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/517 ,  H01L29/518

Abstract: A semiconductor structure is provided that includes a V t stabilization layer between a gate dielectric and a gate electrode. The V t stabilization layer is capable of stabilizing the structure's threshold voltage and flatband voltage to a targeted value and comprises a nitrided metal oxide, or a nitrogen-free metal oxide, with the provision that when the V t stabilization layer comprises a nitrogen-free metal oxide, at least one of the semiconductor substrate or the gate dielectric includes nitrogen. The present invention also provides a method of fabricating such a structure.

公开(公告)号：JP2005328059A

公开(公告)日：2005-11-24

申请号：JP2005139334

申请日：2005-05-12

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BOJARCZUK NESTOR A JR ,  CARTIER EDUARD A ,  FRANK MARTIN M ,  GOUSEV EVGENI ,  SUPURATEIKU GUUHA ,  NARAYANAN VIJAY

IPC: H01L21/8234 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51 ,  H01L29/76 ,  H01L29/78 ,  H01L29/786 ,  H01L51/00 ,  H01L51/05

CPC classification number: H01L21/28202 ,  H01L21/28194 ,  H01L21/823857 ,  H01L29/4916 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: PROBLEM TO BE SOLVED: To provide a complementary metal-oxide semiconductor (CMOS) structure including an intermediate layer between a Si-containing gate electrode and a high-k gate dielectric, so that a threshold voltage and a flat-band voltage of the structure are stabilized.
SOLUTION: An insulating intermediate layer for use in the complementary metal-oxide semiconductor (CMOS) is provided in order to prevent undesirable shifts of the threshold voltage and the flat-band voltage. The insulating intermediate layer is disposed between a gate dielectric having a dielectric constant of more than 4.0 and a Si-containing gate conductor. The insulating intermediate layer comprises metal nitride capable of containing oxygen, and stabilizes the threshold voltage and the flat-band voltage. For a preferred embodiment, the insulating intermediate layer comprises aluminum nitride or aluminum oxinitride, and the gate dielectric comprises a hafnium oxide, hafnium silicate, or hafnium oxinitride. The structure is especially useful for stabilizing the threshold voltage and the flat-band voltage of a p-type field effect transistor.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了提供在含Si栅极电极和高k栅极电介质之间包括中间层的互补金属氧化物半导体（CMOS）结构，使得阈值电压和平带电压 的结构是稳定的。 解决方案：提供用于互补金属氧化物半导体（CMOS）的绝缘中间层，以便防止阈值电压和平带电压的不希望的偏移。 绝缘中间层设置在介电常数大于4.0的栅极电介质和含Si的栅极导体之间​​。 绝缘中间层包括能够含有氧的金属氮化物，稳定阈值电压和平带电压。 对于优选实施例，绝缘中间层包括氮化铝或氮氧化铝，栅极电介质包括氧化铪，硅酸铪或氧化铪。 该结构对于稳定p型场效应晶体管的阈值电压和平带电压特别有用。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：WO2005122286A3

公开(公告)日：2009-04-16

申请号：PCT/US2005010825

申请日：2005-03-30

Applicant: IBM ,  BOJARCZUK NESTOR A JR ,  CABRAL CYRIL JR ,  CARTIER EDUARD A ,  COPEL MATTHEW W ,  FRANK MARTIN M ,  GOUSEV EVGENI P ,  GUHA SUPRATIK ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K

Inventor： BOJARCZUK NESTOR A JR ,  CABRAL CYRIL JR ,  CARTIER EDUARD A ,  COPEL MATTHEW W ,  FRANK MARTIN M ,  GOUSEV EVGENI P ,  GUHA SUPRATIK ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K

IPC: H01L29/792 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L29/513 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/823857 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517

Abstract: A method of forming a CMOS structure, and the device produced therefrom, having improved threshold voltage and flatband voltage stability. The inventive method includes the steps of providing a semiconductor substrate having an nFET region and a pFET region; forming a dielectric stack atop the semiconductor substrate comprisisng an insulating interlayer atop a high k dielectric; removing the insulating interlayer from the nFET region without removing the insulating interlayer from the pFET region; and providing at least one gate stack in the pFET region and at least one gate stack in the nFET region. The insulating interlayer can be A1N or A1OxNY. The high k dielectric can be HfO2, hafnium silicate or hafnium silicon oxynitride. The insulating interlayer can be removed from the nFET region by a wet etch including a HC1/H2O2 peroxide solution.

Abstract translation: 一种形成CMOS结构的方法及其制造的器件，具有改进的阈值电压和平带电压稳定性。 本发明的方法包括提供具有nFET区和pFET区的半导体衬底的步骤; 在半导体衬底顶部形成介电堆叠，其中包括在高k电介质顶部的绝缘夹层; 从nFET区域去除绝缘中间层而不从pFET区域去除绝缘中间层; 以及在pFET区域中提供至少一个栅极堆叠以及在nFET区域中提供至少一个栅极叠层。 绝缘中间层可以是AlN或AlOxNY。 高k电介质可以是HfO 2，硅酸铪或铪硅氮氧化物。 可以通过包括HC1 / H2O2过氧化物溶液的湿蚀刻从nFET区域去除绝缘中间层。

公开(公告)号：WO2006055226A3

公开(公告)日：2007-08-23

申请号：PCT/US2005039288

申请日：2005-11-01

Applicant: IBM ,  BOJARCZUK NESTOR A JR ,  CABRAL CYRIL JR ,  CARTIER EDUARD A ,  FRANK MARTIN M ,  GOUSEV EVGENI P ,  GUHA SUPRATIK ,  JAMISON PAUL C ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K

Inventor： BOJARCZUK NESTOR A JR ,  CABRAL CYRIL JR ,  CARTIER EDUARD A ,  FRANK MARTIN M ,  GOUSEV EVGENI P ,  GUHA SUPRATIK ,  JAMISON PAUL C ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K

IPC: H01L29/792 ,  H01L21/336 ,  H01L29/76 ,  H01L29/94 ,  H01L31/00

CPC classification number: H01L29/513 ,  H01L21/28194 ,  H01L21/2822 ,  H01L21/823828 ,  H01L21/823857 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/517 ,  H01L29/518

Abstract: A semiconductor structure is provided that includes a V t stabilization layer between a gate dielectric and a gate electrode. The V t stabilization layer is capable of stabilizing the structure's threshold voltage and flatband voltage to a targeted value and comprises a nitrided metal oxide, or a nitrogen-free metal oxide, with the provision that when the V t stabilization layer comprises a nitrogen-free metal oxide, at least one of the semiconductor substrate or the gate dielectric includes nitrogen. The present invention also provides a method of fabricating such a structure.

Abstract translation: 提供了一种半导体结构，其包括在栅极电介质和栅电极之间的V 1稳定层。 VST稳定层能够将结构的阈值电压和平带电压稳定到目标值，并且包括氮化金属氧化物或无氮金属氧化物，其条件是当V < 稳定层包括无氮金属氧化物，半导体衬底或栅极电介质中的至少一个包括氮。 本发明还提供一种制造这种结构的方法。

公开(公告)号：JP2002246594A

公开(公告)日：2002-08-30

申请号：JP2001388832

申请日：2001-12-21

Applicant: IBM

Inventor： BOJARCZUK NESTOR A JR ,  CARTIER EDUARD ,  GUHA SUPRATIK ,  RAGNARSSON LARS-AKE

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/316 ,  H01L21/318 ,  H01L29/51

Abstract: PROBLEM TO BE SOLVED: To provide a method and structure for using a thin gate dielectric substance in a semiconductor device, such as a field effect transistor, etc. SOLUTION: The structure (for example, a field effect transistor) and a method for manufacturing the structure are provided with a substrate having a source region, a drain region, and a channel region provided between the source and drain regions, an insulating layer arranged on the channel region, and a gate electrode arranged on the insulating layer. The insulating layer includes an aluminum nitride-containing layer arranged on the channel region.

公开(公告)号：JPH10214992A

公开(公告)日：1998-08-11

申请号：JP883298

申请日：1998-01-20

Applicant: IBM

Inventor： BOJARCZUK NESTOR A JR ,  GUHA SUPRATIK ,  HAIGHT RICHARD ALAN

IPC: H01L33/08 ,  H01L33/50 ,  H01L51/00 ,  H01L51/30 ,  H01L51/50 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To emit an ultraviolet or blue light which can be converted efficiently into a visible light by applying a photoluminescence, in the form of an organic layer, onto an electroluminescence principally comprising inorganic GaN. SOLUTION: Al is deposited on a sapphire substrate 21 and subjected to a flow of excited nitrogen atoms and molecules in order to grow an AlN nucleus formation layer before Ga and Si are deposited thermally and an Si doped n-type GaN layer 12 is grown. Subsequently, Mg is deposited thermally and an Mg doped p-type GaN layer 14 is grown. Thereafter, an electric contact 16 to the p-type GaN layer 14 is formed by electron beam vacuum deposition of Ni/Au/Al and a part of the device structure is removed by etching thus exposing an n-type doped region 12 for second electric contact 18. Finally, the device is placed in a vacuum chamber and applied with a thin layer 20 of color conversion organic substance, i.e., Alq3 , by thermal deposition.