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    SEMICONDUCTOR STRUCTURE USING METAL OXYNITRIDE ACTING AS pFET MATERIAL AND ITS MANUFACTURING METHOD
    5.
    发明专利
    SEMICONDUCTOR STRUCTURE USING METAL OXYNITRIDE ACTING AS pFET MATERIAL AND ITS MANUFACTURING METHOD 有权
    使用金属氧化物作为pFET材料的半导体结构及其制造方法

    公开(公告)号：JP2007173796A

    公开(公告)日：2007-07-05

    申请号：JP2006322537

    申请日：2006-11-29

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： CALLEGARI ALESSANDRO ,  VIJAY NARAYANAN ,  MICHAEL A GRIBELYUK ,  PARUCHURI VAMSI K ,  ZAFAR SUFI

    IPC: H01L29/78 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49

    CPC classification number: H01L21/28088 ,  H01L21/823828 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

    Abstract: PROBLEM TO BE SOLVED: To provide a new metal compound which is stable to heat on a gate stack containing a high-k dielectric and does not cause carbon diffusion caused in the case of a metal carbide. SOLUTION: This invention provides the metal compound which is a p-type metal having a work function of about 4.75-5.3 eV, preferably about 5 eV and comprises MO x N y stable to heat on the gate stack comprising the high-k dielectric and an interface layer, and a method for manufacturing the MO x N y metal compound. Further, the MO x N y metal compound is an extremely efficient oxygen diffusion barrier at 1,000°C, and achieves, in a p-type metal oxide semiconductor (pMOS) device, an extremely aggressive equivalent oxide film thickness (EOT) and an inversion layer thickness of 14 Å or less. In this formula, M is metal selected from Group IVB, VB, VIB and VIIB of the periodic table of the elements, x is about 5-40 atomic%, and y is about 5-40 atomic%. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供在含有高k电介质的栅极堆叠上对热稳定的新的金属化合物，并且在金属碳化物的情况下不引起碳扩散。 解决方案：本发明提供金属化合物，其为具有约4.75-5.3eV，优选约5eV的功函数的p型金属，并且包括MO x N < / SB>在包含高k电介质和界面层的栅极堆叠上的热稳定，以及用于制造金属化合物的方法。 此外，金属化合物在1000℃下是非常有效的氧扩散阻挡层，并且在p型金属氧化物半导体（pMOS）器件中实现 ，极高的等效氧化膜厚度（EOT）和反射层厚度为14或更小。 在该式中，M是选自元素周期表的IVB，VB，VIB和VIIB族的金属，x为约5-40原子％，y为约5-40原子％。 版权所有（C）2007，JPO＆INPIT

    STRAINED METAL GATE STRUCTURE FOR CMOS DEVICES
    7.
    发明申请
    STRAINED METAL GATE STRUCTURE FOR CMOS DEVICES 审中-公开
    CMOS器件应变金属栅结构

    公开(公告)号：WO2008106244A3

    公开(公告)日：2010-03-18

    申请号：PCT/US2008051067

    申请日：2008-01-15

    Applicant: IBM ,  CHUDZIK MICHAEL P ,  HE WEI ,  MO RENEE T ,  MOUMEN NAIM ,  NARAYANAN VIJAY ,  PARK DAE-GYU ,  PARUCHURI VAMSI K

    Inventor： CHUDZIK MICHAEL P ,  HE WEI ,  MO RENEE T ,  MOUMEN NAIM ,  NARAYANAN VIJAY ,  PARK DAE-GYU ,  PARUCHURI VAMSI K

    IPC: H01L21/335

    CPC classification number: H01L21/823807 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/78 ,  H01L29/7845

    Abstract: A gate structure (200) for complementary metal oxide semiconductor (CMOS) devices includes a first gate stack (116) having a first gate dielectric layer (102) formed over a substrate (100), and a first metal layer (106) formed over the first gate dielectric layer. A second gate stack (118) includes a second gate dielectric layer (102) formed over the substrate and a second metal layer (110) formed over the second gate dielectric layer. The first metal layer is formed in manner so as to impart a tensile stress on the substrate, and the second metal layer is formed in a manner so as to impart a compressive stress on the substrate.

    Abstract translation: 用于互补金属氧化物半导体（CMOS）器件的栅极结构（200）包括具有形成在衬底（100）上的第一栅极电介质层（102）的第一栅极堆叠（116）和形成在衬底 第一栅介质层。 第二栅极堆叠（118）包括形成在衬底上的第二栅极电介质层（102）和形成在第二栅极电介质层上的第二金属层（110）。 第一金属层形成为在基板上施加拉伸应力，并且第二金属层以使得在基板上施加压应力的方式形成。

    INTRODUCTION OF METAL IMPURITY TO CHANGE WORKFUNCTION OF CONDUCTIVE ELECTRODES
    9.
    发明申请
    INTRODUCTION OF METAL IMPURITY TO CHANGE WORKFUNCTION OF CONDUCTIVE ELECTRODES 审中-公开
    介绍金属污染物改变导电电极的功能

    公开(公告)号：WO2007087127A3

    公开(公告)日：2007-11-22

    申请号：PCT/US2007000161

    申请日：2007-01-03

    Applicant: IBM ,  CHUDZIK MICHAEL P ,  DORIS BRUCE B ,  GUHA SUPRATIK ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K ,  WANG YUN Y ,  KWONG HON WONG KEITH

    Inventor： CHUDZIK MICHAEL P ,  DORIS BRUCE B ,  GUHA SUPRATIK ,  JAMMY RAJARAO ,  NARAYANAN VIJAY ,  PARUCHURI VAMSI K ,  WANG YUN Y ,  KWONG HON WONG KEITH

    IPC: H01L21/336

    CPC classification number: H01L29/517 ,  H01L21/28088 ,  H01L21/823828 ,  H01L21/823857 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Semiconductor structures, such as, for example, field effect transistors (FETs) and/or metal- oxide-semiconductor capacitor (MOSCAPs), are provided in which the workfunction of a conductive electrode stack is changed by introducing metal impurities into a metal-containing material layer which, together with a conductive electrode, is present in the electrode stack. The choice of metal impurities depends on whether the electrode is to have an n-type workfunction or a p-type workfunction. The present invention also provides a method of fabricating such semiconductor structures. The introduction of metal impurities can be achieved by codeposition of a layer containing both a metal-containing material and workfunction altering metal impurities, forming a stack in which a layer of metal impurities is present between layers of a metal-containing material, or by forming a material layer including the metal impurities above and/or below a metal-containing material and then heating the structure so that the metal impurities are introduced into the metal-containing material.

    Abstract translation: 提供半导体结构，例如场效应晶体管（FET）和/或金属氧化物半导体电容器（MOSCAP），其中通过将金属杂质引入到含金属的物质中来改变导电电极堆叠的功函数 材料层与导电电极一起存在于电极堆叠中。 金属杂质的选择取决于电极是否具有n型功函数或p型功函数。 本发明还提供一种制造这种半导体结构的方法。 金属杂质的引入可以通过共沉积含有金属的材料和改变金属杂质的功函数的层来形成，形成其中金属杂质层存在于含金属材料的层之间的叠层，或通过形成 包括在含金属材料上方和/或下面的金属杂质的材料层，然后加热该结构，使得金属杂质被引入到含金属的材料中。

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