公开(公告)号：JPH11317404A

公开(公告)日：1999-11-16

申请号：JP6179999

申请日：1999-03-09

Applicant: SIEMENS AG ,  IBM

Inventor： COTE DONNA RIZZONE ,  COTE WILLIAM JOSEPH ,  NGUYEN SON VAN ,  KIRCHHOFF MARKUS ,  LEVY MAX G ,  HAUF MANFRED

IPC: H01L21/318 ,  H01L21/28 ,  H01L21/30 ,  H01L21/314 ,  H01L21/8242 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To effectively passivate surface states by forming a device structure provided with an oxynitride layer formed through the plasma enhanced chemical vapor deposition method, and making the passivation of the surface state of the device easy. SOLUTION: An H-R silicon nitride layer is formed in a device structure 200 as the barrier or liner layer 260 of the wiring of devices. The structure 200 is provided with a gate 210, a drain, a source 230, and an STI region 240. The gate 210 contains a poly-layer 212, a silicide layer 214 of WSix , etc., and a silicon nitride cap layer 218, and the device structure 200 contains a spacer layer 250. The H-R layer is formed by the plasma-enhanced chemical vapor deposition(PECVD) method. In addition, an oxynitride is used in stead of the HR silicon nitride, so as to make the nitride function as a psssivation structure like a barrier layer. The oxynitride is formed, for example, by the PECVD method.

公开(公告)号：DE69314679T2

公开(公告)日：1998-04-02

申请号：DE69314679

申请日：1993-02-25

Applicant: SIEMENS AG ,  IBM

Inventor： COTE WILLIAM JOSEPH ,  LEE PEI-ING PAUL ,  SANDWICK THOMAS EDWIN ,  VOLLMER BERND MICHAEL ,  VYNORIUS VICTOR ,  WOLFF STUART HOWARD

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L29/41

Abstract: Electrically conducting vias and lines are created by a three step process. First, a controlled amount of a soft, low resistivity metal (12) is deposited in a trench or hole to a point below the top surface of the dielectric (10) in which the trench or hole is formed. Subsequently, the low resistivity metal (12) is overcoated with a hard metal (16) such as CVD tungsten. Finally, chemical-mechanical polishing is used to planarize the structure. The hard metal (16) serves the function of protecting the low resistivity metal (12) from scratches and corrosion which would ordinarily be encountered if the low resistivity metal were subjected to the harsh chemical-mechanical polishing slurries. An ideal method for partially filling trenches or holes in a substrate is by sputtering at elevated temperatures such that metallization at the bottom of a trench or hole separates from metallization on a top surface adjacent the trench or hole. An etchback procedure may also be used to separate metallization in a trench or hole from metallization adjacent a trench or hole. Trenchs and holes may also be filled by selective deposition. In addition, trenches and holes may also be lined by a metal liner (18) prior to metallization (12) deposition which can serve as a diffusion barrier.

公开(公告)号：SG78275A1

公开(公告)日：2001-02-20

申请号：SG1997002971

申请日：1997-08-19

Applicant: IBM

Inventor： COTE DONNA RIZZONE ,  COTE WILLIAM JOSEPH ,  MIURA DONNA DIANE ,  WASKIEWICZ CHRISTOPHER JOSEPH

IPC: C23C16/30 ,  C23C16/44

公开(公告)号：AT159615T

公开(公告)日：1997-11-15

申请号：AT93102979

申请日：1993-02-25

Applicant: SIEMENS AG ,  IBM

Inventor： COTE WILLIAM JOSEPH ,  LEE PEI-ING PAUL ,  SANDWICK THOMAS EDWIN ,  VOLLMER BERND MICHAEL ,  VYNORIUS VICTOR ,  WOLFF STUART HOWARD

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L29/41

Abstract: Electrically conducting vias and lines are created by a three step process. First, a controlled amount of a soft, low resistivity metal (12) is deposited in a trench or hole to a point below the top surface of the dielectric (10) in which the trench or hole is formed. Subsequently, the low resistivity metal (12) is overcoated with a hard metal (16) such as CVD tungsten. Finally, chemical-mechanical polishing is used to planarize the structure. The hard metal (16) serves the function of protecting the low resistivity metal (12) from scratches and corrosion which would ordinarily be encountered if the low resistivity metal were subjected to the harsh chemical-mechanical polishing slurries. An ideal method for partially filling trenches or holes in a substrate is by sputtering at elevated temperatures such that metallization at the bottom of a trench or hole separates from metallization on a top surface adjacent the trench or hole. An etchback procedure may also be used to separate metallization in a trench or hole from metallization adjacent a trench or hole. Trenchs and holes may also be filled by selective deposition. In addition, trenches and holes may also be lined by a metal liner (18) prior to metallization (12) deposition which can serve as a diffusion barrier.

公开(公告)号：SG73615A1

公开(公告)日：2000-06-20

申请号：SG1999001011

申请日：1999-02-23

Applicant: IBM

Inventor： COONEY EDWARD C ,  LUCE STEPHEN E ,  COTE WILLIAM JOSEPH ,  GOLDBLATT RONALD D

IPC: H01L21/768 ,  H01L21/28 ,  H01L21/283 ,  H01L21/98 ,  H01L23/52

公开(公告)号：DE69314679D1

公开(公告)日：1997-11-27

申请号：DE69314679

申请日：1993-02-25

Applicant: SIEMENS AG ,  IBM

Inventor： COTE WILLIAM JOSEPH ,  LEE PEI-ING PAUL ,  SANDWICK THOMAS EDWIN ,  VOLLMER BERND MICHAEL ,  VYNORIUS VICTOR ,  WOLFF STUART HOWARD

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L29/41

Abstract: Electrically conducting vias and lines are created by a three step process. First, a controlled amount of a soft, low resistivity metal (12) is deposited in a trench or hole to a point below the top surface of the dielectric (10) in which the trench or hole is formed. Subsequently, the low resistivity metal (12) is overcoated with a hard metal (16) such as CVD tungsten. Finally, chemical-mechanical polishing is used to planarize the structure. The hard metal (16) serves the function of protecting the low resistivity metal (12) from scratches and corrosion which would ordinarily be encountered if the low resistivity metal were subjected to the harsh chemical-mechanical polishing slurries. An ideal method for partially filling trenches or holes in a substrate is by sputtering at elevated temperatures such that metallization at the bottom of a trench or hole separates from metallization on a top surface adjacent the trench or hole. An etchback procedure may also be used to separate metallization in a trench or hole from metallization adjacent a trench or hole. Trenchs and holes may also be filled by selective deposition. In addition, trenches and holes may also be lined by a metal liner (18) prior to metallization (12) deposition which can serve as a diffusion barrier.

公开(公告)号：HK1001601A1

公开(公告)日：1998-06-26

申请号：HK98100235

申请日：1998-01-12

Applicant: SIEMENS AG ,  IBM

Inventor： COTE WILLIAM JOSEPH ,  LEE PEI-ING PAUL ,  SANDWICK THOMAS EDWIN ,  VOLLMER BERND MICHAEL ,  VYNORIUS VICTOR ,  WOLFF STUART HOWARD

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L29/41 ,  H01L

Abstract: Electrically conducting vias and lines are created by a three step process. First, a controlled amount of a soft, low resistivity metal (12) is deposited in a trench or hole to a point below the top surface of the dielectric (10) in which the trench or hole is formed. Subsequently, the low resistivity metal (12) is overcoated with a hard metal (16) such as CVD tungsten. Finally, chemical-mechanical polishing is used to planarize the structure. The hard metal (16) serves the function of protecting the low resistivity metal (12) from scratches and corrosion which would ordinarily be encountered if the low resistivity metal were subjected to the harsh chemical-mechanical polishing slurries. An ideal method for partially filling trenches or holes in a substrate is by sputtering at elevated temperatures such that metallization at the bottom of a trench or hole separates from metallization on a top surface adjacent the trench or hole. An etchback procedure may also be used to separate metallization in a trench or hole from metallization adjacent a trench or hole. Trenchs and holes may also be filled by selective deposition. In addition, trenches and holes may also be lined by a metal liner (18) prior to metallization (12) deposition which can serve as a diffusion barrier.

公开(公告)号：DE3866659D1

公开(公告)日：1992-01-16

申请号：DE3866659

申请日：1988-09-05

Applicant: IBM

Inventor： BAUSMITH ROBERT CROWELL ,  COTE WILLIAM JOSEPH ,  CRONIN JOHN EDWARD ,  HOLLAND KAREY LYNN ,  KAANTA CARTER WELLING ,  LEE PEI-ING PAUL ,  WRIGHT TERRANCE MONTE

IPC: C23F4/00 ,  H01L21/3213 ,  H01L21/31