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公开(公告)号:WO03012867A2
公开(公告)日:2003-02-13
申请号:PCT/GB0203436
申请日:2002-07-26
Inventor: ALCOE DAVID JAMES , COFFIN JEFFREY THOMAS , GAYNES MICHAEL ANTHONY , HAMEL HARVEY CHARLES , INTERRANTE MARIO , PETERSON BRENDA LEE , SHANNON MEGAN , SABLINSKI WILLIAM EDWARD , SPRING CHRISTOPHER TODD , STUTZMAN RANDALL JOSEPH , WEISMAN RENEE , ZITZ JEFFREY ALLEN
IPC: H01L23/29 , H01L23/31 , H01L23/552 , H05K9/00 , H01L23/66
CPC classification number: H01L23/552 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/01087 , H01L2924/12044 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/16195 , H01L2924/3025 , H01L2924/00
Abstract: Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.
Abstract translation: 结合有EMI屏蔽的电子封装,特别是包含嵌入有接地带的半导体芯片载体结构的半导体器件,其适于减少用于高速开关电子封装的输出和事件EMI发射。
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公开(公告)号:MY126247A
公开(公告)日:2006-09-29
申请号:MYPI20022733
申请日:2002-07-18
Applicant: IBM
Inventor: ALCOE DAVID JANES , STUTZMAN RANDALL JOSEPH , WEISMAN RENEE L , ZITZ JEFFREY ALLEN , COFFIN JEFFREY THOMAS , GAYNES MICHAEL ANTHONY , HAMEL HARVEY CHARLES , INTERRANTE MARIO J , PETERSON BRENDA LEE , SHANNON MEGAN J , SABLINSKI WILLIAM EDWARD , SPRING CHRISTOPHER TODD
IPC: H01L23/29 , H01L23/552 , H01L23/31 , H05K9/00
Abstract: ELECTRONIC PACKAGES INCORPORATING EMI SHIELDING, AND PARTICULARLY SEMICONDUCTOR DEVICES WHICH INCORPORATED SEMICONDUCTOR CHIP-CARRIER STRUCTURES HAVING GROUNDED BANDS EMBEDDED THEREIN WHICH ARE ADAPTED TO REDUCE OUTGOING AND INCLUDENT EMI EMISSIONS FOR HIGH-SPEED SWITCHING ELECTRONIC PACKAGES. (FIG. 1)
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公开(公告)号:DE2535425A1
公开(公告)日:1976-06-24
申请号:DE2535425
申请日:1975-08-08
Applicant: IBM
Inventor: HAMEL HARVEY CHARLES , TERLEP KENNETH DICK
IPC: G01R19/165 , G11C11/44 , H01L39/22 , H03K19/195
Abstract: A superconductive sensing circuit having improved signal-to-noise ratio is provided for use with logic circuits using logic switching devices. The sensing circuit includes a first and second branch in parallel wherein the first branch includes a Josephson switching device. The first branch also includes a first inductance and the second branch includes an inductance greater than or equal to the first inductance. The Josephson device in the first branch of the sensing circuit is biased to switch into it's finite voltage state so that the gate current from the logic circuit is directed to the second sensing branch. The Josephson device in the first branch automatically resets to it's no voltage state so that subsequent input current is divided between the two branches inversely proportional to the inductances therein. This subsequent current in the first branch of the sensing circuit is sensed and is indicative of the switching of one or more of the logic devices in the logic circuit.
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公开(公告)号:DE2422549A1
公开(公告)日:1975-01-23
申请号:DE2422549
申请日:1974-05-09
Applicant: IBM
IPC: H03K19/195 , H03K19/02
Abstract: A logical OR circuit using Josephson tunnelling devices is provided having a first, second and third gate. Each of the gates includes a first and second branch circuit in parallel. A first Josephson tunnelling device is located in the first branch circuit and a second Josephson tunnelling device is located in the second branch of each of said first, second and third gates. A DC current is applied to each of the first, second and third gates. A control means provides the logic inputs to each of the first and second Josephson devices in each of said gates to cause the selected devices to switch to their finite voltage state causing the input current to flow in the other one of the first and second branch circuits. First sensing means connected in series are located between the first branches of the first, second and third gates which response to the current flow in one or both of the first branches of the first and second gates to provide a sensing current pulse to the control means for the Josephson tunnelling junction in the second branch of the third gate switching it into its finite voltage state thereby causing the current to flow through the opposite branch in the third gate representing current flow in one or more of the first branches of the first and second gates representing an OR function. Second sensing means connected in parallel are located between the second branches of the first, second and third gates which respond to the current flow in the second branch of both the first and second gates to provide an input to the control means for the first Josephson device of the third gate causing it to switch to its finite voltage stage thereby causing the input current to the third gate to flow through the opposite branch thereof.
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公开(公告)号:HU0401737A2
公开(公告)日:2004-12-28
申请号:HU0401737
申请日:2002-07-26
Applicant: IBM
Inventor: ALCOE DAVID JAMES , COFFIN JEFFREY THOMAS , GAYNES MICHAEL ANTHONY , HAMEL HARVEY CHARLES , INTERRANTE MARIO , PETERSON BRENDA LEE , SHANNON MEGAN , SABLINSKI WILLIAM EDWARD , SPRING CHRISTOPHER TODD , STUTZMAN RANDALL JOSEPH , WEISMAN RENEE , ZITZ JEFFREY ALLEN
IPC: H01L23/29 , H01L23/31 , H01L23/552 , H05K9/00 , H01L23/66
Abstract: Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.
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公开(公告)号:PL367099A1
公开(公告)日:2005-02-21
申请号:PL36709902
申请日:2002-07-26
Applicant: IBM
Inventor: ALCOE DAVID JAMES , COFFIN JEFFREY THOMAS , GAYNES MICHAEL ANTHONY , HAMEL HARVEY CHARLES , INTERRANTE MARIO , PETERSON BRENDA LEE , SHANNON MEGAN , SABLINSKI WILLIAM EDWARD , SPRING CHRISTOPHER TODD , STUTZMAN RANDALL JOSEPH , WEISMAN RENEE , ZITZ JEFFREY ALLEN
IPC: H01L23/29 , H01L23/31 , H01L23/552 , H05K9/00
Abstract: Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.
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公开(公告)号:AU2002319480A1
公开(公告)日:2003-02-17
申请号:AU2002319480
申请日:2002-07-26
Applicant: IBM
Inventor: ALCOE DAVID JAMES , WEISMAN RENEE , INTERRANTE MARIO , COFFIN JEFFREY THOMAS , STUTZMAN RANDALL JOSEPH , GAYNES MICHAEL ANTHONY , SPRING CHRISTOPHER TODD , PETERSON BRENDA LEE , SABLINSKI WILLIAM EDWARD , SHANNON MEGAN , HAMEL HARVEY CHARLES , ZITZ JEFFREY ALLEN
IPC: H01L23/29 , H01L23/31 , H01L23/552 , H05K9/00
Abstract: Electronic packages incorporating EMI shielding, and particularly semiconductor devices which incorporate semiconductor chip-carrier structures having grounded bands embedded therein which are adapted to reduce outgoing and incident EMI emissions for high-speed switching electronic packages.
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公开(公告)号:DE2424808A1
公开(公告)日:1975-01-23
申请号:DE2424808
申请日:1974-05-22
Applicant: IBM
Abstract: A two-phase superconductive shift register using Josephson tunnelling devices is provided wherein a plurality of shift register stages each includes a first and second branch in parallel to which a DC current is supplied. A Josephson tunnelling device is located in each branch which operates in its no voltage state when the DC current is applied thereto. A first and second input means is provided for switching one of the Josephson tunnelling devices in accordance with an input to cause the input current to flow through the other branch. A first and second coupling means are located between the stages of the shift register, the first coupling means coupling the first branch circuits of successive stages and the second coupling means coupling second branch circuits of successive stages. The coupling means are energized in response to phase time pulses and current flow in the preceding stage causing the Josephson device in the next stage to switch to its finite voltage stage thereby causing the current to flow in the opposite branch in the next stage.
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公开(公告)号:DE2415624A1
公开(公告)日:1975-01-09
申请号:DE2415624
申请日:1974-03-30
Applicant: IBM
Inventor: HAMEL HARVEY CHARLES
IPC: H03K19/195
Abstract: A logic circuit utilizing Josephson tunnelling devices capable of providing a logical OR or NOR indication in a multi-phase time application is provided. A first current flows through a superconducting circuit having a first and second parallel branch. A plurality of Josephson devices are connected in series in the first branch of the superconductive circuit and a single Josephson device is located in the second branch of the circuit. A control means associated with the single Josephson device is operated at a first phase time for switching the device to its finite voltage state and, accordingly, causing the first current to flow through the first branch of the circuit. Further control means are associated with the plurality of Josephson devices in the first branch to cause one or more of the devices to switch to its finite voltage state at phase two time thereby causing the first current to switch back to the second branch. Output circuit means are associated with each branch of the circuit operable at phase three time for producing an output indicative of the current flow in the branch.
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