公开(公告)号：JP2004241771A

公开(公告)日：2004-08-26

申请号：JP2004020523

申请日：2004-01-28

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： CASEY JON A ,  BALZ JAMES G ,  BERGER MICHAEL ,  COHEN JEROME ,  HENDRICKS CHARLES ,  INDYK RICHARD ,  LAPLANTE MARK ,  LONG DAVID C ,  MAIORINO LORI A ,  MERRYMAN ARTHUR G ,  POMERANTZ GLENN A ,  RITA ROBERT A ,  SEMKOW KRYSTYNA W ,  SPENCER PATRICK E ,  SUNDLOF BRIAN R ,  SURPRENANT RICHARD P ,  WALL DONALD R ,  WASSICK THOMAS A ,  WILEY KATHLEEN M

IPC: H05K3/46 ,  H01L21/48 ,  H01L23/12 ,  H01L23/498 ,  H05K1/03 ,  H05K3/00 ,  H05K3/22

CPC classification number: H05K3/225 ,  H01L21/4846 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/4629 ,  H05K2203/173 ,  Y10T29/49124 ,  Y10T29/49135 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a multilayer ceramic correction process which forms a new electric correction path for connecting top vias. SOLUTION: A correction path 65 is provided between a defect net 40 and a redundancy correction net 45 in a multilayer ceramic substrate. The defect net and the correction net are terminated at top vias 41 and 46 of the substrate. The defect net is electrically isolated from an electric correction structure by the use of laser, and a post-burning circuit is formed on and in the substrate. In addition, the passivation of an electric correction line 65 is performed. COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：CA2072727A1

公开(公告)日：1993-03-11

申请号：CA2072727

申请日：1992-06-29

Applicant: IBM

Inventor： AOUDE FARID Y ,  DAVID LAWRENCE D ,  DIVAKARUNI RENUKA S ,  FAROOQ SHAJI ,  HERRON LESTER W ,  LASKY HAL M ,  MASTREANI ANTHONY ,  NATARAJAN GOVINDARAJAN ,  REDDY SRINIVASA S N ,  SURA VIVEK M ,  VALLABHANENI RAO V ,  WALL DONALD R

IPC: H01L23/12 ,  H01L21/48 ,  H01L23/498 ,  H05K1/09 ,  H05K3/46 ,  H01B1/02

Abstract: FI9-90-027 COPPER-BASED PASTE CONTAINING COPPER ALUMINATE FOR MICROSTRUCTURAL AND SHRINKAGE CONTROL OF COPPER-FILLED VIAS A copper-based paste is disclosed for filling vias in, and forming conductive surface patterns on, ceramic substrate packages for semiconductor chip devices. The paste contains copper aluminate powder in proper particle size and weight proportion to achieve grain size and shrinkage control of the via and thick film copper produced by sintering. The shrinkage of the copper material during sintering is closely matched to that of the ceramic substrate.