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    Halbleitereinheit mit Gate-Stapel
    1.
    发明专利
    Halbleitereinheit mit Gate-Stapel 未知

    公开(公告)号：DE112011103249T5

    公开(公告)日：2013-08-14

    申请号：DE112011103249

    申请日：2011-09-22

    Applicant: IBM

    Inventor： FOMPEYRINE JEAN ,  MARCHIORI CHIARA ,  ANDERSSON CAROLINE ,  WEBB DAVID J

    IPC: H01L21/28 ,  H01L29/10 ,  H01L29/165 ,  H01L29/36 ,  H01L29/51

    Abstract: Die vorliegende Erfindung betrifft eine Halbleitereinheit, die eine Gate-Stapel-Struktur (1) aufweist, wobei die Gate-Stapel-Struktur (1) aufweist: wenigstens ein Substrat (10), das einen Halbleiter aufweist, der mit n-Typ-Trägern wesentlich dotiert ist; wenigstens eine auf dem Substrat (10) gebildete Passivierungsschicht (12), die Silicium aufweist; und wenigstens eine auf der Passivierungsschicht (12) gebildete Isolatorschicht (13), wobei die Gate-Stapel-Struktur (1) ferner aufweist: wenigstens einen Zwischenschicht-Dotierstoff, der zwischen dem Substrat (10) und der Passivierungsschicht (12) bereitgestellt ist, wobei der Zwischenschicht-Dotierstoff einen n-Typ-Dotierstoff (11) aufweist, der ausgewählt ist, um das Steuern einer Schwellenspannung zu ermöglichen, die an die Gate-Stapel-Struktur (1) anwendbar ist, wenn die Halbleitereinheit in Verwendung steht.

    2.
    发明专利
    未知

    公开(公告)号：DE69009474D1

    公开(公告)日：1994-07-07

    申请号：DE69009474

    申请日：1990-09-14

    Applicant: IBM

    Inventor： BUCHMANN PETER ,  WEBB DAVID J ,  VETTIGER PETER

    IPC: H01L21/308 ,  H01L21/306 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01S5/00 ,  H01S5/02 ,  H01S5/028 ,  H01S3/025 ,  H01L33/00

    Abstract: A method of passivating etched mirror facets of semiconductor laser diodes for enhancing device reliability. The etched mirror facet is first subjected to a wet-etch process to substantially remove any native oxide as well as any surface layer which may have been mechanically damaged during the preceding mirror etch process. Then, a passivation pre-treatment is applied whereby any residual oxygen is removed and a sub-monolayer is formed which permanently reduces the non-radiative recombination of minority carriers at the mirror facet. Finally, the pre-treated mirror surface is coated with a passivation layer to avoid any environmental effect on the mirror.

    PROCESS FOR FORMING THE RIDGE STRUCTURE OF A SELF-ALIGNED SEMICONDUCTOR LASER
    4.
    发明专利
    PROCESS FOR FORMING THE RIDGE STRUCTURE OF A SELF-ALIGNED SEMICONDUCTOR LASER 未知

    公开(公告)号：CA2039875A1

    公开(公告)日：1991-10-07

    申请号：CA2039875

    申请日：1991-04-05

    Applicant: IBM

    Inventor： WEBB DAVID J ,  HEUBERGER WILHELM ,  HARDER CHRISTOPH S ,  HOH PETER D

    IPC: H01S5/00 ,  H01L21/318 ,  H01S5/22 ,  H01S3/025

    Abstract: A process for forming the ridge structure of a self-aligned semiconductor laser, particularly useful for long wavelength devices as required for signal transmission systems. Described is the process as applied to an InP-system, double heterostructure (DH) laser. A thin Si3N4 layer (41) is inserted between the photoresist mask (42) that defines the ridge structure, and the contact layer (35). This results in improved adhesion and reduced etch undercutting whereby the ohmic contact area is increased, heat development decreased and device properties improved. Using a Si3N4 layer (41) deposited at a high plasma excitation frequency (RF) for adhesion promotion, and a low frequency deposited (LF) Si3N4 layer (43) for device embedding, provides for the etch selectivity required in the process step that is used to expose the contact layer to ohmic contact metallization deposition.

    5.
    发明专利
    未知

    公开(公告)号：DE69009474T2

    公开(公告)日：1994-12-01

    申请号：DE69009474

    申请日：1990-09-14

    Applicant: IBM

    Inventor： BUCHMANN PETER ,  WEBB DAVID J ,  VETTIGER PETER

    IPC: H01L21/308 ,  H01L21/306 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01S5/00 ,  H01S5/02 ,  H01S5/028 ,  H01S3/025 ,  H01L33/00

    Abstract: A method of passivating etched mirror facets of semiconductor laser diodes for enhancing device reliability. The etched mirror facet is first subjected to a wet-etch process to substantially remove any native oxide as well as any surface layer which may have been mechanically damaged during the preceding mirror etch process. Then, a passivation pre-treatment is applied whereby any residual oxygen is removed and a sub-monolayer is formed which permanently reduces the non-radiative recombination of minority carriers at the mirror facet. Finally, the pre-treated mirror surface is coated with a passivation layer to avoid any environmental effect on the mirror.

    Semiconductor device with a gate stack
    8.
    发明专利
    Semiconductor device with a gate stack 未知

    公开(公告)号：GB2497257A

    公开(公告)日：2013-06-05

    申请号：GB201306306

    申请日：2011-09-22

    Applicant: IBM

    Inventor： ANDERSSON CAROLINE ,  FOMPEYRINE JEAN ,  MARCHIORI CHIARA ,  WEBB DAVID J

    IPC: H01L21/28 ,  H01L29/10 ,  H01L29/165 ,  H01L29/36

    Abstract: The present invention relates to a semiconductor device comprising a gate stack structure (1), the gate stack structure (1) comprising: at least a substrate (10) comprising a semiconductor that is substantially doped with n-type carriers; at least a passivation layer (12) comprising silicon formed on the substrate (10), and at least an insulator layer (13) formed on the passivation layer (12), wherein the gate stack structure (1) further comprises: at least an interlayer dopant provided between the substrate (10) and the passivation layer (12), the interlayer dopant comprising an n-type dopant (11) that is selected to facilitate control of a threshold voltage applicable to the gate stack structure (1) when the semiconductor device is in use.

    PROCESS FOR FORMING THE RIDGE STRUCTURE OF A SELF-ALIGNED SEMICONDUCTOR LASER
    9.
    发明专利
    PROCESS FOR FORMING THE RIDGE STRUCTURE OF A SELF-ALIGNED SEMICONDUCTOR LASER 未知

    公开(公告)号：CA2039875C

    公开(公告)日：1994-05-03

    申请号：CA2039875

    申请日：1991-04-05

    Applicant: IBM

    Inventor： WEBB DAVID J ,  HEUBERGER WILHELM ,  HARDER CHRISTOPH S ,  HOH PETER D

    IPC: H01S5/00 ,  H01L21/318 ,  H01S5/22 ,  H01S3/025

    Abstract: A process for forming the ridge structure of a self-aligned semiconductor laser, particularly useful for long wavelength devices as required for signal transmission systems. Described is the process as applied to an InP-system, double heterostructure (DH) laser. A thin Si3N4 layer (41) is inserted between the photoresist mask (42) that defines the ridge structure, and the contact layer (35). This results in improved adhesion and reduced etch undercutting whereby the ohmic contact area is increased, heat development decreased and device properties improved. Using a Si3N4 layer (41) deposited at a high plasma excitation frequency (RF) for adhesion promotion, and a low frequency deposited (LF) Si3N4 layer (43) for device embedding, provides for the etch selectivity required in the process stepthat is used to expose the contact layer to ohmic contact metallization deposition.

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