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    2.
    发明专利
    未知

    公开(公告)号：DE59914589D1

    公开(公告)日：2008-02-07

    申请号：DE59914589

    申请日：1999-11-11

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： WIRTH NORBERT ,  CORDES ERIC ,  MANYOKI ZOLTAN ,  SAVIGNAC DOMINIQUE

    IPC: G01R31/316 ,  G01R31/28

    Abstract: The component (5) can be connected to a burn-in voltage, which is higher than its internal voltage, which is impressed across a switchable regulator (6) integrated in the component. An element (1,2) integrated in the component has a different characteristic, e.g. degradation, from the regulator under the burn-in voltage after the burn-in test duration. The element may be a fuse.

    3.
    发明专利
    未知

    公开(公告)号：DE10140986A1

    公开(公告)日：2003-03-20

    申请号：DE10140986

    申请日：2001-08-21

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： CORDES ERIC ,  STOCKEN CHRISTIAN ,  EGGERS GEORG ,  LUEPKE JENS

    IPC: G01R31/28 ,  G11C7/10 ,  G11C11/401 ,  G11C29/50 ,  G11C29/56 ,  G11C29/00

    Abstract: The invention relates to a test method for testing, on a testing device (PA), semiconductor devices (P) that have a bi-directional data strobe link for a data strobe signal (DQS) whereby the data strobe signal is tested by transferring data between the semiconductor memory device (P) to be tested and a second semiconductor memory device of the same type (R). The invention also relates to a device for carrying out the inventive method.

    4.
    发明专利
    未知

    公开(公告)号：DE10137344A1

    公开(公告)日：2003-02-20

    申请号：DE10137344

    申请日：2001-07-31

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： CORDES ERIC ,  STOCKEN CHRISTIAN ,  EGGERS GEORG

    IPC: G11C5/04 ,  G11C7/10 ,  G11C7/00

    Abstract: A memory circuit includes a plurality of memory cells, an input/output area for addressing or writing onto the plurality of memory cells by means of electrical signals, and an optical-electrical converter for converting optical signals into the electrical signals, the plurality of memory cells and the input/output area being integrated on a chip, and the optical-electrical converter being mechanically connected to the chip or being integrated into the chip.

    6.
    发明专利
    未知

    公开(公告)号：DE10293994D2

    公开(公告)日：2004-07-22

    申请号：DE10293994

    申请日：2002-08-21

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： CORDES ERIC ,  EGGERS GEORG ERHARD ,  LUEPKE JENS ,  STOCKEN CHRISTIAN

    IPC: G01R31/28 ,  G11C7/10 ,  G11C11/401 ,  G11C29/50 ,  G11C29/56 ,  G11C29/00

    Abstract: A test method for a semiconductor memory device having a bidirectional data strobe terminal for a data strobe signal, and having at least one data terminal for a data signal at a test apparatus, which can at least generate data strobe and data signals and also transfer and evaluate data signals. The memory device is connected to a test apparatus, which generates data strobe and data signals, and transfers and evaluates data signals. In the course of the test using the data strobe and data signals, data are transferred from the first semiconductor memory device to a second semiconductor memory device of identical type and are evaluated after a read-out from the second semiconductor memory device by the test apparatus.

    9.
    发明专利
    未知

    公开(公告)号：DE50204890D1

    公开(公告)日：2005-12-15

    申请号：DE50204890

    申请日：2002-08-21

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： CORDES ERIC ,  EGGERS ERHARD ,  LUEPKE JENS ,  STOCKEN CHRISTIAN

    IPC: G01R31/28 ,  G11C7/10 ,  G11C11/401 ,  G11C29/50 ,  G11C29/56 ,  G11C29/00

    Abstract: A test method for a semiconductor memory device having a bidirectional data strobe terminal for a data strobe signal, and having at least one data terminal for a data signal at a test apparatus, which can at least generate data strobe and data signals and also transfer and evaluate data signals. The memory device is connected to a test apparatus, which generates data strobe and data signals, and transfers and evaluates data signals. In the course of the test using the data strobe and data signals, data are transferred from the first semiconductor memory device to a second semiconductor memory device of identical type and are evaluated after a read-out from the second semiconductor memory device by the test apparatus.

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