PHOTOLITHOGRAPHIC MASK
    1.
    发明申请
    PHOTOLITHOGRAPHIC MASK 审中-公开
    光刻掩膜

    公开(公告)号:WO0241076A3

    公开(公告)日:2003-01-03

    申请号:PCT/DE0104263

    申请日:2001-11-14

    CPC classification number: G03F7/70441 G03F1/29 G03F7/70433

    Abstract: According to the invention, auxiliary openings (2) are allocated to the openings (1) on a mask which are to be transferred onto a wafer. Said auxiliary openings have a phase shifting characteristic of preferably between 160 DEG and 200 DEG in relation to the openings (1), as well as a cross-section which is less than the limit dimension (31) for the printing of the projection device, so that the auxiliary openings (2) themselves cannot be printed onto the wafer. At the same time, however, they strengthen the contrast of the aerial image of an associated insulated or semi-insulated opening (1) on the wafer in particular. According to one form of embodiment, the distance of the auxiliary openings (2) from the opening (1) is greater than the resolution limit of the projection device, the opening being less than the coherence length of the light used for projection. The effect of the auxiliary openings consists of the phase-related use of the optical proximity effect. If the auxiliary openings (2) are arranged in a preferred direction, this effect can be used on quadratic openings (1) on the mask to produce elliptic structures (1') on a wafer. The result is a considerable widening of the process window for the projection of substrate contacting planes onto a wafer.

    Abstract translation: 在掩模上的晶片上要传送开口(1)与辅助开口相关联的(2)。 这些具有优选为160°至200℃底层相移特性相对于所述孔(1)之间,以及一个位于该投影装置的横截面(21)的打印的限制尺寸(31)下方,使得辅助开口(2)本身不将 晶圆是geprintet。 同时提高了空间像的对比度,特别是相关联的晶片上的绝缘或半绝缘的开口(1)。 在一个实施例中,辅助开口(2)具有一个位于上述从开口(1)的投影装置的距离的分辨率极限,但其比用于投影的光的相干长度小。 它们的作用是在光学邻近效应的相位相关的利用率,从而可以在掩模在正方形开口的晶片上产生椭圆结构(1“)设定在一个优选的方向上的辅助开口(2)当被利用(1)。 其结果是在投影,特别Substratkontaktierungsebenen到晶片上的处理窗口的显著放大图。

    2.
    发明专利
    未知

    公开(公告)号:DE10206188B4

    公开(公告)日:2006-04-20

    申请号:DE10206188

    申请日:2002-02-14

    Abstract: A carrier has a surface with a mask layer thereon. An irradiation-sensitive layer on the mask layer is exposed and developed to form a first exposure structure. The first exposure structure is used as an etching mask while the mask layer is etched. The first exposure structure is subsequently removed. A second irradiation-sensitive layer is applied to the mask layer and the carrier. The second irradiation-sensitive layer is exposed with a first exposure dose and a second exposure dose. The second irradiation-sensitive layer is subsequently developed to form a second exposure structure with a first and second exposure structure thickness. The carrier is etched down to a first etching depth in the region of the first exposure structure thickness and down to a second etching depth in the region of the second exposure structure thickness. The first etching depth is larger than the second etching depth.

    4.
    发明专利
    未知

    公开(公告)号:DE10042929A1

    公开(公告)日:2002-03-21

    申请号:DE10042929

    申请日:2000-08-31

    Abstract: A raw layout (10) for manufacturing a circuit structure is provided using a lithographic technique. From the layout, a pattern (56) for a phase-shift mask and a pattern for a trim mask are formed. The pattern for the phase-shift mask is corrected in a first correction step (60). The pattern for the trim mask is corrected using the corrected pattern for the phase shift mask. Independent claims are also included for: (a) a data processing apparatus for correcting patterns (b) a program for producing corrected patterns (c) an integrated circuit structure (d) a phase-shift mask (e) a trim mask

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