公开(公告)号：EP3937317A1

公开(公告)日：2022-01-12

申请号：EP21305823.3

申请日：2021-06-16

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Rousset) SAS

Inventor： LETOR, Romeo ,  POLETTO, Vanni ,  PAVLIN, Antoine ,  RUSSO, Alfio ,  LECCI, Nadia

IPC: H01S5/042 ,  H01S5/062 ,  H03K17/56 ,  G01S17/88

Abstract: A pulse generator circuit, for driving an array of laser diodes (LD_1, ..., LD_n) in a LIDAR system, for instance, comprises an LC resonant circuit (Lr, Cr) coupled between a first node (12) and a reference node (GND) as well as charge circuitry (16) configured to charge the capacitance (Cr) in the LC resonant circuit (Lr, Cr). A first electronic switch (S1) is coupled between the first node (12) and the reference node (GND), and one or more second electronic switches (S2_1, ..., S2_n) are coupled between the first node (12) and respective drive nodes (12 1 , ..., 12 n ) in turn configured to be coupled to respective electrical loads (LD_1, ..., LD_n).
The circuit comprises drive circuitry (18, 182_1, ..., 182_n; 201, 202, 203) configured to repeat pulse generation cycles comprising:
closing the first electronic switch (S1), to enable the LC resonant circuit (Lr, Cr) to oscillate with an increasing current flowing in the inductance (Lr) therein,
in response to the current flowing in the inductance (Lr) reaching a threshold value, opening the first electronic switch (S1) wherein, as a result of one second electronic switch (S2_1, ..., S2_n) being closed for a respective pulse duration time (Ton_S2_1, ..., Ton_S2_n), the current in the inductance (Lr) is commutated towards the aforesaid second electronic switch (S2_1, ..., S2_n) and the respective drive node (12 1 , ..., 12 n ),
opening the at least one second electronic switch (S2_1, ..., S2_n) at the expiration of said respective pulse duration time (Ton_S2_1, ..., Ton_S2_n).

公开(公告)号：EP4386437A1

公开(公告)日：2024-06-19

申请号：EP23307132.3

申请日：2023-12-05

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics S.r.l.

Inventor： LETOR, Romeo ,  RUSSO, Alfio ,  LECCI, Nadia ,  PIZZARDI, Antonio Filippo Massimo ,  PAVLIN, Antoine ,  POLETTO, Vanni ,  BRERA, Marco ,  BIANCHI, Simone

IPC: G01S7/481 ,  G01S7/484 ,  G01S17/10 ,  H01S5/042

CPC classification number: G01S7/4815 ,  G01S7/484 ,  G01S17/10 ,  H01S5/0428 ,  G01S7/4817 ,  H01S5/4031

Abstract: In a driver circuit (100) couplable to laser diodes (LD_j), a semiconductor body (504) has a first surface (504a). A first control switch (S1) has a drain (DS1) coupled to a drain metallization (530) and a source (SS1) coupled to a first source metallization (532). The drain metallization is couplable to a power supply line (12). A second control switch (S1_0) has a drain (DS1_0) coupled to the drain metallization and a source (SS1_0) coupled to a second source metallization (533) . The first and second source metallizations are couplable to cathode terminals of the laser diodes (LD_j) and to a reference node (GND). A plurality of high-side switches (S2_j) have respective drains (DS2_j) coupled to the drain metallization (530) and respective sources (SS2_j) coupled to respective third source metallizations (534_j). Each third source metallization (534_j) is coupled to a respective drive output node (13_j) for driving an anode terminal (LDa_j) of a respective laser diode (LD_j). The drain metallization as well as the first, second and third source metallizations face the first surface (504a) of the semiconductor body (504), which is also configured to face the laser diodes (LD_j). The second source metallization (533) and the third source metallizations (534_j) are aligned with one another in a direction of alignment (540) and are superimposed, orthogonally to the direction of alignment (540), to the respective source terminals of the second control switch (S1_0) and of the high-side switches (S2_j).

公开(公告)号：EP3937318A1

公开(公告)日：2022-01-12

申请号：EP21305838.1

申请日：2021-06-18

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Rousset) SAS

Inventor： LETOR, Romeo ,  POLETTO, Vanni ,  PAVLIN, Antoine ,  LECCI, Nadia ,  RUSSO, Alfio

IPC: H01S5/042 ,  G01S17/88 ,  H01S5/062

Abstract: A pulse generator circuit, for driving a laser diode (LD) in a LIDAR system, for instance, comprises a first node (10) and a second node (12) to apply a pulse signal to an electrical load (LD) as well as a first electronic switch (HSD) coupled between the first node (10) and the second node (12) and a second electronic switch (LSD) coupled between the second node (12) and a reference node (GND). An LC resonant circuit (Lr, Cr) comprising an inductance (Lr) and a capacitance (Cr) is coupled between the first node (10) and the reference node (GND) along with charge circuitry (100) coupled between a supply node (VCC) and an intermediate node (16) in the LC resonant circuit (Lr, Cr).
Drive circuitry (14, 141, 142) of the electronic switches (HSD, LSD) repeats during a sequence of switching cycles charge time intervals, wherein the capacitance (Cr) in the LC resonant circuit (Lr, Cr) is charged via the charge circuit (100), and pulse generation time intervals, wherein a pulsed current is provided to the load (LD) via the first node (10) and the second node (12). The charge and pulse generation time intervals are interleaved with oscillation time intervals where the LC resonant circuit (Lr, Cr) oscillates at a resonance frequency.
The charge circuitry comprises a further inductance (L Charge) in a current flow line between the supply node (VCC) and the intermediate node (16) in the LC resonant circuit (Lr, Cr).

公开(公告)号：EP4027165A1

公开(公告)日：2022-07-13

申请号：EP22305004.8

申请日：2022-01-04

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Rousset) SAS ,  STMicroelectronics Application GmbH

Inventor： LETOR, Romeo ,  TIZIANI, Roberto ,  RUSSO, Alfio ,  PAVLIN, Antoine ,  LECCI, Nadia ,  GAERTNER, Manuel

IPC: G01S7/484 ,  H01L23/00

Abstract: An electronic module (10) for generating light pulses, comprising: an electronic card or interposer (2); a LASER-diode (5) lighting module (4); and a LASER-diode driver module (6). The interposer has an edge recess in which the lighting module is completely inserted. The driver module is arranged on top of the interposer and the lighting module. The electrical connections for driving the LASER diodes are obtained without resorting to wire bonding in order to reduce the parasitic inductances.

公开(公告)号：EP3855585A1

公开(公告)日：2021-07-28

申请号：EP20306464.7

申请日：2020-11-30

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Rousset) SAS

Inventor： LETOR, Romeo ,  PAVLIN, Antoine ,  RUSSO, Alfio ,  LECCI, Nadia

IPC: H01S5/042 ,  H01S5/0683 ,  H01S5/026 ,  H01S5/062

Abstract: A pulse generator circuit (20a) configured to apply a current pulse to two output terminals (204, 206) . The pulse generator circuit (20a) comprises an LC resonant circuit (Lr, Cr) comprising an inductance (Lr) and a capacitance (Cr) connected in series between a first node (210) and a negative input terminal (202). The pulse generator circuit (20a) comprises moreover a charge circuit (220) configured to charge the capacitance (Cr) via a supply voltage ( Vcc ), a first electronic switch (S1) configured to selectively short-circuit the two output terminals (204, 206), a second electronic switch (S2) configured to selectively connect the two output terminals (204, 206) in parallel with the LC resonant circuit (Lr, Cr) and a control circuit (208a) configured to drive the first (S1) and the second (S2) electronic switch. Specifically, the control circuit (208a) repeats the following steps during each switching cycle:
- for a first time-interval ( T 1 ) close the first electronic switch (S1) and open the second electronic switch (S2), wherein the capacitance (Cr) is charged via the charge circuit (220);
- for a following second time-interval ( T 2 ) close both the first (S1) and the second (S2) electronic switch, wherein the LC resonant circuit (Lr, Cr) oscillates with a given resonant period (Tr);
- for a following third time-interval ( T 3 , T ON ) open the first electronic switch (S1) and close the second electronic switch (S2), wherein the LC resonant circuit (Lr, Cr) provides a current ( i cr ) to the two output terminals (204, 206); and
- for a following fourth time-interval ( T 2 ) close both the first (S1) and the second (S2) electronic switch, wherein the LC resonant circuit (Lr, Cr) oscillates with the given resonant period (Tr).

公开(公告)号：EP4328967A1

公开(公告)日：2024-02-28

申请号：EP23190203.2

申请日：2023-08-08

Applicant: STMicroelectronics S.r.l.

Inventor： SCALIA, Laura Letizia ,  CAMALLERI, Cateno Marco ,  ZANETTI, Edoardo ,  RUSSO, Alfio

IPC: H01L23/525 ,  H01L29/78 ,  H01L23/62

Abstract: SiC-based MOSFET electronic device (20; 30) comprising: a solid body (48); a gate terminal (24), extending into the solid body (48); a conductive path (36), extending at a first side of the solid body (48), configured to be electrically coupeable to a generator (23) of a biasing voltage (V GS ); a protection element (21) of a solid-state material, coupled to the gate terminal (24) and to the conductive path (36), the protection element (21) forming an electronic connection between the gate terminal (24) and the conductive path (36), and being configured to go from the solid state to a melted or gaseous state, interrupting the electrical connection, in response to a leakage current (i SC ) through the protection element (21) greater than a critical threshold; a buried cavity (69) in the solid body (48) accommodating, at least in part, the protection element (21).

公开(公告)号：EP3937209A1

公开(公告)日：2022-01-12

申请号：EP21183643.2

申请日：2021-07-05

Applicant: STMicroelectronics S.r.l.

Inventor： PILUSO, Nicolò ,  SEVERINO, Andrea ,  RINALDI, Stefania ,  MAZZEO, Angelo Annibale ,  CAUDO, Leonardo ,  RUSSO, Alfio ,  FRANCO, Giovanni ,  BASSI, Anna

IPC: H01L21/306

Abstract: A process for manufacturing a silicon carbide semiconductor device envisages the steps of: providing a silicon carbide wafer (21), having a substrate (22); and carrying out an epitaxial growth for formation of an epitaxial layer (23), having a top surface (23a), on the substrate (22). Following upon the step of carrying out an epitaxial growth, the process envisages the step of removing a surface portion of the epitaxial layer (23) starting from the top surface (23a) so as to remove surface damages present at the top surface (23a) as a result of propagation of dislocations (24) from the substrate (22) during the previous epitaxial growth and so as to define a resulting top surface (23a') substantially free of defects.