公开(公告)号：US20160150633A1

公开(公告)日：2016-05-26

申请号：US14947091

申请日：2015-11-20

Applicant: Amphenol Corporation

Inventor： Marc B. Cartier, JR.

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/40 ,  H05K1/11 ,  H01R43/20

CPC classification number: H05K1/0222 ,  H01R43/205 ,  H05K1/0216 ,  H05K1/0219 ,  H05K1/025 ,  H05K1/0251 ,  H05K1/0253 ,  H05K1/0298 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/4038 ,  H05K3/429 ,  H05K2201/07 ,  H05K2201/09063 ,  H05K2201/09318 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/097 ,  H05K2201/09718 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2201/10189

Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns comprising: dual diameter first and second signal vias forming a differential signal pair, the first and second signal vias being configured to accept contact tails of signal conductors of a connector; dual diameter ground shadow vias adjacent to each of the first and second signal vias, wherein the dual diameter shadow ground vias have a reversed diameter configuration with respect to the dual diameter first and second signal vias; and ground vias configured to accept contact tails of ground conductors of the connector.

Abstract translation: 印刷电路板包括多个层，包括附着层和布线层; 以及形成在所述多个层中的通孔图案，所述通孔图案中的每一个包括：形成差分信号对的双直径第一和第二信号通孔，所述第一和第二信号通孔被配置为接纳连接器的信号导体的接触尾部; 与第一和第二信号通孔中的每一个相邻的双直径地面阴影通孔，其中双直径阴影接地通孔相对于双直径第一和第二信号通孔具有反向直径构型; 以及配置为接受连接器的接地导体的接触尾部的接地通孔。

公开(公告)号：US09119304B2

公开(公告)日：2015-08-25

申请号：US13566291

申请日：2012-08-03

Applicant: Yu-Sik Kim ,  Woo-Sung Han

Inventor： Yu-Sik Kim ,  Woo-Sung Han

IPC: H05K1/11 ,  H05K1/14 ,  H05K1/02 ,  H01L25/075

CPC classification number: H05K1/0295 ,  H01L25/0753 ,  H01L2224/16225 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/09318 ,  H05K2201/0949 ,  H05K2201/09663 ,  H05K2201/09954 ,  H05K2201/10106 ,  H05K2203/173

Abstract: A sub-mount adapted for AC and DC operation of devices mountable thereon, light emitting devices including such a sub-mount, and methods of manufacturing such a sub-mount are provided. The sub-mount includes a base substrate having first and second surfaces, a conductive pattern on the first surface, first and second pairs of first and second electrodes on the second surface and vias extending through the base substrate between the first and second surfaces. The conductive pattern includes a first set of mounting portions and two via portions along a first electrical path between the first pair of first and second electrodes, and a second set of mounting portions and two via portions along a second electrical path between the second pair of first and second electrodes, the via portions connecting respective portions of the conductive pattern to respective electrodes.

Abstract translation: 提供一种适用于可安装在其上的设备的AC和DC操作的子座，包括这种子座的发光设备以及制造这种子座的方法。 子座包括具有第一表面和第二表面的基底基底，第一表面上的导电图案，第二表面上的第一和第二对第一和第二电极以及在第一和第二表面之间延伸穿过基底的通孔。 导电图案包括第一组安装部分和沿着第一对第一和第二电极之间的第一电路径的两个通孔部分，以及第二组安装部分和沿第二电路的第二组电路之间的两个通孔部分 第一和第二电极，通孔部分将导电图案的各个部分连接到相应的电极。

公开(公告)号：US08609996B2

公开(公告)日：2013-12-17

申请号：US13715054

申请日：2012-12-14

Applicant: Hon Hai Precision Industry Co., Ltd.

Inventor： Yu-Hsu Lin

IPC: H05K1/11

CPC classification number: H05K1/00 ,  G06F17/5068 ,  H05K1/0245 ,  H05K3/0005 ,  H05K2201/09236 ,  H05K2201/09318

Abstract: A printed circuit board includes a signal layer having a pair of differential transmission lines thereon. An eye width and an eye height of an eye diagram obtained at output terminals of the pair of differential transmission lines are variable according to a distance between the pair of differential transmission lines. The eye width and the eye height of the eye diagram are at minimum values when the distance between the pair of differential transmission lines is at a first distance. The eye width and the eye height meet requirements of the pair of differential transmission lines for the eye diagram when the distance between the pair of differential transmission lines is set at a second distance, the second distance is less than the first distance.

Abstract translation: 印刷电路板包括其上具有一对差动传输线的信号层。 在一对差动传输线的输出端获得的眼图的眼睛宽度和眼睛高度根据一对差动传输线之间的距离而变化。 当一对差动传输线之间的距离处于第一距离时，眼图的眼睛宽度和眼睛高度是最小值。 当一对差动传输线之间的距离设定在第二距离时，眼睛宽度和眼睛高度满足用于眼图的一对差动传输线的要求，第二距离小于第一距离。

公开(公告)号：US08525611B2

公开(公告)日：2013-09-03

申请号：US13400965

申请日：2012-02-21

Applicant: Mohammad Tabatabai

Inventor： Mohammad Tabatabai

IPC: H01P3/08

CPC classification number: H01P3/026 ,  H05K1/024 ,  H05K1/0245 ,  H05K2201/0191 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09318

Abstract: According to one exemplary embodiment, a circuit board for reducing dielectric loss, conductor loss, and insertion loss includes a pair of transmission lines. The pair of transmission lines has sufficient thickness to cause substantial broadside electromagnetic coupling between the pair of transmission lines, where the pair of transmission lines is sufficiently separated from a ground plane of the circuit board so as to cause negligible electromagnetic coupling to the ground plane relative to the substantial broadside electromagnetic coupling. The pair of transmission lines thereby reduce dielectric loss, conductor loss, and insertion loss for signals traversing through the transmission line pair. The pair of transmission lines can be separated from the ground plane by, for example, at least 50.0 mils.

Abstract translation: 根据一个示例性实施例，用于降低介质损耗，导体损耗和插入损耗的电路板包括一对传输线。 这对传输线具有足够的厚度，以在一对传输线之间产生实质的宽边电磁耦合，其中一对传输线与电路板的接地平面充分分离，从而使接地平面的电磁耦合可以忽略不计 到实质的宽边电磁耦合。 这对传输线因此减少了穿过传输线对的信号的介质损耗，导体损耗和插入损耗。 这对传输线可以通过例如至少50.0密耳从地平面分离。

公开(公告)号：US08487638B2

公开(公告)日：2013-07-16

申请号：US13023012

申请日：2011-02-08

Applicant: Takuya Osaki ,  Masahiro Kondo ,  Koji Sakiyama

Inventor： Takuya Osaki ,  Masahiro Kondo ,  Koji Sakiyama

IPC: G01R27/26

CPC classification number: H03K17/955 ,  H01R12/69 ,  H01R13/6683 ,  H03K2017/9602 ,  H03K2217/94094 ,  H03K2217/960705 ,  H05K1/117 ,  H05K1/118 ,  H05K2201/09318 ,  H05K2201/09354 ,  H05K2201/09781 ,  H05K2201/10189

Abstract: Disclosed is an electrical capacitance sensor comprising: a board 10 having a one main surface and an other main surface; a sensor electrode 26 formed on the one main surface of the board 10 and detecting an electrical capacitance between the sensor electrode 26 and an object; a first guard electrode 25 formed on the one main surface of the board 10 and in a vicinity of the sensor electrode 26; and a second guard electrode 27 formed on the other main surface of the board 10, wherein a first terminal connecting portion 21 for the first guard electrode 25 and a second terminal connecting portion 23 for the second guard electrode 27 are provided at positions opposing each other.

Abstract translation: 公开了一种电容传感器，包括：板10，其具有一个主表面和另一个主表面; 形成在板10的一个主表面上并检测传感器电极26和物体之间的电容的传感器电极26; 形成在板10的一个主表面上并在传感器电极26附近的第一保护电极25; 以及形成在板10的另一个主表面上的第二保护电极27，其中第一保护电极25的第一端子连接部分21和第二保护电极27的第二端子连接部分23设置在彼此相对的位置 。

公开(公告)号：US08416029B2

公开(公告)日：2013-04-09

申请号：US12671304

申请日：2008-08-01

Applicant: Toshiyuki Kawaguchi ,  Kazutoki Tahara ,  Tsutomu Saga

Inventor： Toshiyuki Kawaguchi ,  Kazutoki Tahara ,  Tsutomu Saga

IPC: H04B3/28 ,  H01P3/08

CPC classification number: H01P3/08 ,  H05K1/0234 ,  H05K1/167 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09336 ,  H05K2201/09672

Abstract: The invention provides a transmission noise suppressing structure and a wiring board capable of suppressing a transmission noise transferred through a power supply line, stabilizing a power supply voltage, and reducing signal transmission line cross talk transmitted through the power supply line or a ground layer without being affected by a resistive layer. A transmission noise suppressing structure includes a power supply line and a signal transmission line arranged apart from each other on the same surface; a ground layer arranged apart from the power supply line and the signal transmission line; and a resistive layer arranged apart from the power supply line and the ground layer. The resistive layer has an area (I) which faces the power supply line and an area (II) which does not face the power supply line. The resistive layer and the signal transmission line are apart from each other.

Abstract translation: 本发明提供一种传输噪声抑制结构和布线板，其能够抑制通过电源线传输的传输噪声，稳定电源电压，以及减少通过电源线或接地层传输的信号传输线串扰，而不会 受电阻层影响。 传输噪声抑制结构包括在同一表面上彼此分开布置的电源线和信号传输线; 与电源线和信号传输线分开设置的接地层; 以及与电源线和接地层分开布置的电阻层。 电阻层具有面向电源线的区域（I）和不面向电源线的区域（II）。 电阻层和信号传输线彼此分开。

公开(公告)号：US08289720B2

公开(公告)日：2012-10-16

申请号：US12699716

申请日：2010-02-03

Applicant: Koji Ishikawa

Inventor： Koji Ishikawa

IPC: H05K1/00

CPC classification number: G03B17/00 ,  H01R12/59 ,  H01R12/722 ,  H05K1/0218 ,  H05K1/0245 ,  H05K1/147 ,  H05K2201/043 ,  H05K2201/0715 ,  H05K2201/09318 ,  H05K2201/10189

Abstract: An electronic apparatus includes an outer cover member, an internal structure member, first and second external connection connectors, and first and second printed circuit boards. The first printed circuit board has a first surface on which the first external connector is mounted thereon, a signal pattern of the first external connector is formed on the first surface, and a second surface. The second printed circuit board has a first surface on which the second external connector is mounted thereon, a signal pattern of the second external connector is formed on the first surface, and a second surface. Ground patterns are formed on the second surfaces of the printed circuit boards. The first and second external connectors overlap and are arranged in a space surrounded by the outer cover member and the internal structure member so that the second surfaces of the first and second printed circuit boards face each other.

Abstract translation: 电子设备包括外盖构件，内部结构构件，第一和第二外部连接连接器以及第一和第二印刷电路板。 第一印刷电路板具有其上安装有第一外部连接器的第一表面，在第一表面上形成第一外部连接器的信号图案和第二表面。 第二印刷电路板具有其上安装有第二外部连接器的第一表面，在第一表面上形成第二外部连接器的信号图案和第二表面。 在印刷电路板的第二表面上形成接地图案。 第一外部连接器和第二外部连接器重叠并且布置在由外盖构件和内部结构构件包围的空间中，使得第一和第二印刷电路板的第二表面彼此面对。

公开(公告)号：US08242376B2

公开(公告)日：2012-08-14

申请号：US12854252

申请日：2010-08-11

Applicant: John M. Lauffer ,  Voya R. Markovich ,  Michael Wozniak

Inventor： John M. Lauffer ,  Voya R. Markovich ,  Michael Wozniak

IPC: H05K1/03

CPC classification number: H01L21/4857 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K3/383 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09318 ,  H05K2203/0353 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T428/12556 ,  Y10T428/12993 ,  H01L2224/0401

Abstract: A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided.

Abstract translation: 其中两个导电层（例如，电镀铜箔）被结合（例如层压）到电介质层的电路化衬底。 物理地结合到电介质的两个箔表面中的每一个是光滑的（例如，优选通过化学处理），并且在其上包括薄的有机层，而两个箔的外表面也是光滑的（例如，优选也使用化学处理 步）。 这些导电层中的一个可以用作接地或电压平面，而另一个可以用作具有多个单独信号线作为其一部分的信号平面。 还提供了使用这种电路化基板的电气组件和信息处理系统。

公开(公告)号：US08237055B2

公开(公告)日：2012-08-07

申请号：US12564734

申请日：2009-09-22

Applicant: Wang-Jia Chen ,  Wei Zhou ,  Yu-Hsu Lin ,  Feng Zhang

Inventor： Wang-Jia Chen ,  Wei Zhou ,  Yu-Hsu Lin ,  Feng Zhang

IPC: H05K1/00

CPC classification number: H05K1/025 ,  H05K1/0245 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09345 ,  H05K2201/09727

Abstract: A circuit board includes an insulation layer, a signal layer disposed on one side of the insulation layer, and a ground plane and a power plane disposed on the insulation layer at a side opposite to the signal layer. The insulation layer forms a separating area arranged between the ground plane and the power plane. At least two signal traces parallel to each other are arranged on the signal layer at one side corresponding to one of the ground plane and the power plane. A width of the signal trace close to the separating area is wider than that of the signal trace away from the separating area.

Abstract translation: 电路板包括绝缘层，设置在绝缘层的一侧的信号层，以及设置在与信号层相对的一侧的绝缘层上的接地面和电源面。 绝缘层形成布置在接地平面和电源平面之间的分离区域。 彼此平行的至少两条信号迹线在对应于接地平面和电源平面之一的一侧上布置在信号层上。 靠近分离区域的信号迹线的宽度比远离分离区域的信号迹线宽。

公开(公告)号：US08188374B2

公开(公告)日：2012-05-29

申请号：US12174204

申请日：2008-07-16

Applicant: Robert Tilman Worl

Inventor： Robert Tilman Worl

IPC: H05K1/00

CPC classification number: H05K1/024 ,  H01P1/00 ,  H05K1/0275 ,  H05K1/0306 ,  H05K3/10 ,  H05K2201/0187 ,  H05K2201/09318 ,  H05K2201/09727 ,  Y10T29/49016 ,  Y10T29/49018 ,  Y10T29/49117 ,  Y10T29/49155

Abstract: An obfuscated radio frequency circuit may include a metallization layer, and a dielectric layer under the metallization layer. The dielectric layer may be made up of a plurality of dielectric substrates having differing dielectric constants to obfuscate functions of the circuit.

Abstract translation: 混淆的射频电路可以包括金属化层和在金属化层下的介电层。 电介质层可以由具有不同介电常数的多个电介质基片构成以模糊电路的功能。