公开(公告)号：US07295445B2

公开(公告)日：2007-11-13

申请号：US10954463

申请日：2004-09-30

Applicant: Jang My

Inventor： Jang My

IPC: H05K7/02 ,  H01L23/12

CPC classification number: H05K3/3442 ,  H05K3/303 ,  H05K2201/0166 ,  H05K2201/09472 ,  H05K2201/10393 ,  H05K2201/10636 ,  H05K2201/2018 ,  H05K2203/0169 ,  H05K2203/0594 ,  H05K2203/0769 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49171

Abstract: Methods and apparatus to couple a device, such as, for example, a surface mount device, with a substrate, such as, for example, a printed circuit, are disclosed. An apparatus, according to one aspect, may include a substrate, a plurality of terminals coupled with the substrate, a conductive bonding material coupled with the plurality of terminals, an electronic device coupled with the conductive bonding material, and a holder that is coupled with the substrate to hold the electronic device. A method, according to one aspect, may include coupling a holder with a substrate such that terminals of the substrate are included in an opening of the holder, mounting an electronic device over the terminals with a conductive bonding material disposed therebetween, heating the conductive bonding material to its melting point, and cooling the conductive bonding material.

Abstract translation: 公开了将诸如例如表面贴装装置的装置与衬底（例如印刷电路）耦合的方法和装置。 根据一个方面的装置可以包括衬底，与衬底耦合的多个端子，与多个端子耦合的导电接合材料，与导电接合材料耦合的电子器件，以及与 保持电子设备的基板。 根据一个方面的一种方法可以包括将保持器与衬底连接，使得衬底的端子包括在保持器的开口中，将电子器件安装在端子之间，其间设置有导电接合材料，加热导电接合 材料到其熔点，并冷却导电接合材料。

公开(公告)号：US20070235218A1

公开(公告)日：2007-10-11

申请号：US11530344

申请日：2006-09-08

Applicant: Nobuaki Miyamoto ,  Akira Chinda ,  Koki Hirasawa ,  Kenji Uchida

Inventor： Nobuaki Miyamoto ,  Akira Chinda ,  Koki Hirasawa ,  Kenji Uchida

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K1/113 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H05K3/0023 ,  H05K3/007 ,  H05K3/025 ,  H05K3/064 ,  H05K3/244 ,  H05K3/386 ,  H05K3/421 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2203/0156 ,  H05K2203/0733 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic device substrate is formed of a thin-plate reinforcing substrate; an external connection wiring layer stacked on the reinforcing substrate, and comprising an electrical insulation provided on the reinforcing substrate, an opening formed in the electrical insulation, a first conductor pattern and a via-hole conductor provided in the opening and formed integrally with each other; and a second conductor pattern formed on the opposite side of the electrical insulation to the reinforcing substrate, and at least partially electrically connected to the via-hole conductor.

Abstract translation: 电子器件基板由薄板加强基板形成; 叠层在所述加强基板上的外部连接布线层，并且包括设置在所述加强基板上的电绝缘体，形成在所述电绝缘体中的开口，设置在所述开口中的第一导体图案和通孔导体，并且彼此一体地形成 ; 以及第二导体图案，其形成在与所述加强基板的所述电绝缘体的相对侧上，并且至少部分地电连接到所述通孔导体。

公开(公告)号：US07278564B2

公开(公告)日：2007-10-09

申请号：US10839283

申请日：2004-05-06

Applicant: Atsushi Saito

Inventor： Atsushi Saito

IPC: B23K31/00 ,  B23K31/02

CPC classification number: H01L24/83 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K1/112 ,  H05K3/4038 ,  H05K3/4069 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599

Abstract: The invention provides a method of mounting an electronic component where an electronic component can be reliably electrically-connected to a substrate. A substrate defines a through-hole that extends through the substrate, from connection electrodes formed on the lower surface of the substrate, to the upper surface of the substrate. A low melting point metal is connected to the connection electrodes and fills the through-hole. A bump and the low melting point metal are alloyed and bonded by heating the low melting point metal while pressing the bump formed on an electrode pad of an electronic component, with respect to a front end of the low melting point metal. The active surface of the electronic component is sealed by the upper surface of the substrate.

Abstract translation: 本发明提供了一种安装电子部件的方法，其中电子部件可以可靠地电连接到基板。 衬底限定了从衬底的下表面上形成的连接电极延伸到衬底的通孔到衬底的上表面。 低熔点金属连接到连接电极并填充通孔。 通过在相对于低熔点金属的前端挤压形成在电子部件的电极焊盘上的凸块的同时加热低熔点金属，将凸块和低熔点金属合金化并结合。 电子部件的有源表面被基板的上表面密封。

公开(公告)号：US20070170942A1

公开(公告)日：2007-07-26

申请号：US11724544

申请日：2007-03-15

Applicant: Salman Akram ,  Alan Wood ,  Warren Farnworth

Inventor： Salman Akram ,  Alan Wood ,  Warren Farnworth

IPC: G01R31/02

CPC classification number: H05K7/1061 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y80/00 ,  G01R1/0408 ,  G01R1/0433 ,  G01R1/0466 ,  G01R1/0483 ,  G01R1/07378 ,  G01R3/00 ,  H01L23/32 ,  H01L23/49827 ,  H01L2224/16111 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K1/112 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/049 ,  H05K2201/09472 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/167 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method for modifying or fabricating one or more interposers includes fabricating a fence on a substrate that includes the one or more interposers. The fence may be fabricated on a single surface of the interposer substrate. Alternatively, a fence and associated features may be fabricated on both opposite surfaces of the interposer substrate, for example, by fabricating features on one surface of the substrate, inverting the substrate, and forming features on the opposite surface of the substrate. The fence, a portion thereof, or associated features or portions thereof may be fabricated by selectively consolidating previously unconsolidated material. Such selective consolidation may be effected under control of a program. Additionally, the selective consolidation may occur in conjunction with a machine vision system.

Abstract translation: 用于修改或制造一个或多个插入件的方法包括在包括一个或多个插入件的基板上制造栅栏。 栅栏可以在中介层基板的单个表面上制造。 或者，可以例如通过在衬底的一个表面上制造特征，翻转衬底以及在衬底的相对表面上形成特征，在插入器衬底的两个相对表面上制造栅栏和相关联的特征。 栅栏，其一部分或其相关联的特征或部分可以通过选择性地固结先前未固结的材料来制造。 这种选择性合并可以在程序的控制下进行。 此外，选择性整合可能与机器视觉系统结合发生。

公开(公告)号：US20070017093A1

公开(公告)日：2007-01-25

申请号：US11528137

申请日：2006-09-27

Applicant: James Wark ,  Salman Akram

Inventor： James Wark ,  Salman Akram

IPC: H01R43/00

CPC classification number: H01R12/57 ,  G01R1/0408 ,  G01R1/0466 ,  H01L2924/0002 ,  H01R43/205 ,  H05K1/119 ,  H05K3/325 ,  H05K3/326 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09045 ,  H05K2201/09472 ,  H05K2201/10689 ,  Y10T29/49117 ,  Y10T29/49123 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49174 ,  Y10T29/49179 ,  Y10T29/49222 ,  Y10T29/49453 ,  H01L2924/00

Abstract: A method of making an interposer having an array of contact structures for making temporary electrical contact with the leads of a chip package. The contact structures may make contact with the leads as close as desired to the body of the chip package. Moreover, the contact structures can be adapted for making contact with leads having a very fine pitch. In one embodiment, the contact structures include raised members formed over a body of the interposer. A conductive layer is formed over each of the raised members to provide a contact surface for engaging the leads of the chip package. In another embodiment, the raised members are replaced with depressions formed into the interposer. A conductive layer is formed on an inside surface of each depression to provide a contact surface for engaging the leads of the chip package. Any combination of raised members and depressions may be used.

Abstract translation: 一种制造具有用于与芯片封装的引线暂时电接触的接触结构阵列的插入件的方法。 接触结构可以使引线接近芯片封装体的所需位置。 此外，接触结构可以适于与具有非常细的间距的引线接触。 在一个实施例中，接触结构包括形成在插入件的主体上的凸起部件。 在每个凸起构件上形成导电层，以提供用于接合芯片封装引线的接触表面。 在另一个实施例中，凸起构件被形成在插入件中的凹陷所代替。 在每个凹陷的内表面上形成导电层，以提供用于接合芯片封装的引线的接触表面。 可以使用凸起构件和凹陷的任何组合。

公开(公告)号：US07164198B2

公开(公告)日：2007-01-16

申请号：US10649745

申请日：2003-08-28

Applicant: Jyunichi Nakamura ,  Tadashi Kodaira ,  Shunichiro Matsumoto ,  Hironari Aratani ,  Takanori Tabuchi ,  Takeshi Chino

Inventor： Jyunichi Nakamura ,  Tadashi Kodaira ,  Shunichiro Matsumoto ,  Hironari Aratani ,  Takanori Tabuchi ,  Takeshi Chino

IPC: H01L23/48 ,  H05K3/46 ,  H05K3/34 ,  H05K1/00 ,  H10L23/12

CPC classification number: H05K3/0061 ,  H01L23/49822 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/205 ,  H05K3/3457 ,  H05K3/4644 ,  H05K2201/09472 ,  H05K2201/0969 ,  H05K2201/2009 ,  H05K2203/1536

Abstract: A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connection terminals, the face for mounting a semiconductor device being provided with pads through which the substrate is connected to a semiconductor element to be mounted thereon, and the face for external connection terminals being provided with pads through which the substrate is connected to an external electrical circuit, wherein a reinforcing sheet is respectively joined to the face for mounting a semiconductor element thereon and the face for external connection terminals of the multilayered substrate body.

Abstract translation: 一种用于半导体器件的多层衬底，其具有由多组导体层和绝缘层形成的多层衬底本体，并且具有用于安装半导体元件的面和用于外部连接端子的另一面，用于安装的面 半导体器件设置有衬底，衬底通过该焊盘连接到要安装在其上的半导体元件，并且用于外部连接端子的面设置有衬底，衬底通过该衬垫连接到外部电路，其中加强板是 分别连接到用于在其上安装半导体元件的面和多层基板主体的外部连接端子的表面。

公开(公告)号：US20070007034A1

公开(公告)日：2007-01-11

申请号：US11474921

申请日：2006-06-26

Applicant: Arash Behziz ,  Roya Yaghmai

Inventor： Arash Behziz ,  Roya Yaghmai

IPC: H05K1/11 ,  H05K3/42

CPC classification number: H05K1/115 ,  G01R31/2889 ,  H05K3/3421 ,  H05K3/4602 ,  H05K2201/049 ,  H05K2201/09472 ,  H05K2201/09481 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09627 ,  H05K2201/10189 ,  Y10T29/49165

Abstract: In one embodiment, a laminated printed circuit board translator is provided. In some embodiments, the translator includes a receiving board adapted to receive a pin, the receiving board includes a plated via extending through the receiving board and has a hole for receiving a pin. An interface board laminated with the receiving board has a controlled depth via extending through it to contact a conductive trace. The conductive trace extends between the receiving board and the interface board to connect the plated via of the receiving board with the controlled depth via of the interface board. The controlled depth via is configured so that it is capable of being plated through a single sided drilled opening in the interface board. Some embodiments have a pad on the interface board connected to the controlled depth via.

Abstract translation: 在一个实施例中，提供了层压印刷电路板转换器。 在一些实施例中，翻译器包括适于接收销的接收板，接收板包括延伸穿过接收板的电镀通孔，并具有用于接收销的孔。 与接收板层压的接口板具有通过其延伸的受控深度以接触导电迹线。 导电迹线在接收板和接口板之间延伸，以将接收板的电镀通孔与接口板的受控深度通孔连接。 受控深度通孔被配置成能够通过接口板中的单面钻孔而进行电镀。 一些实施例在接口板上具有连接到受控深度通孔的垫。

公开(公告)号：US07154753B2

公开(公告)日：2006-12-26

申请号：US10754717

申请日：2004-01-12

Applicant: Takehito Kobayashi

Inventor： Takehito Kobayashi

IPC: H05K7/20

CPC classification number: H05K1/0265 ,  H05K1/0203 ,  H05K3/0061 ,  H05K7/20854 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/10166

Abstract: A circuit structural body includes a printed circuit board having a conductive pattern constituting a power circuit including a semiconductor switching element and disposed on one surface of the printed circuit board, and a conductive pattern constituting a control circuit for controlling the semiconductor switching element and disposed on the other surface of the printed circuit board. The printed circuit board has a through-hole for mounting the semiconductor switching element to both of the conductive patterns. The circuit structural body can be manufactured by a method including the step of laminating a reinforcing plate to one surface of the printed circuit board and the step of mounting the semiconductor switching element from the opposite side to the reinforcing plate.

Abstract translation: 电路结构体包括印刷电路板，其具有构成包括半导体开关元件并且布置在印刷电路板的一个表面上的电源电路的导电图案，以及构成用于控制半导体开关元件并被布置在其上的控制电路的导电图案 印刷电路板的另一个表面。 印刷电路板具有用于将半导体开关元件安装到两个导电图案的通孔。 电路结构体可以通过以下方法制造：包括将加强板层叠到印刷电路板的一个表面的步骤以及将半导体开关元件从相对侧安装到加强板的步骤。

公开(公告)号：US20060279943A1

公开(公告)日：2006-12-14

申请号：US11507816

申请日：2006-08-22

Applicant: Salman Akram ,  Alan Wood ,  Warren Farnworth

Inventor： Salman Akram ,  Alan Wood ,  Warren Farnworth

IPC: H05K7/00

CPC classification number: H05K7/1061 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y80/00 ,  G01R1/0408 ,  G01R1/0433 ,  G01R1/0466 ,  G01R1/0483 ,  G01R1/07378 ,  G01R3/00 ,  H01L23/32 ,  H01L23/49827 ,  H01L2224/16111 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K1/112 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/049 ,  H05K2201/09472 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/167 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: An interposer includes a fence that orients or aligns a semiconductor device, such as a flip-chip type semiconductor device, with an interposer substrate. The fence may include edges that are configured to progressively align a semiconductor device with the interposer substrate. The fence may also include one or more laterally recessed regions to facilitate rough alignment of a semiconductor device with the interposer substrate. The fence may comprise a unitary structure or a plurality of mutually adhered regions.

Abstract translation: 插入器包括将诸如倒装芯片型半导体器件的半导体器件定向或对准的栅栏与插入器衬底。 栅栏可以包括被配置为使半导体器件与插入器衬底逐渐对准的边缘。 挡板还可以包括一个或多个侧向凹入区域，以便于半导体器件与插入器基板的粗略对准。 围栏可以包括整体结构或多个相互粘合的区域。

公开(公告)号：US20060223345A1

公开(公告)日：2006-10-05

申请号：US11423767

申请日：2006-06-13

Applicant: Thomas Dozier ,  Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Gaetan Mathieu ,  David Pedersen ,  Michael Stadt

Inventor： Thomas Dozier ,  Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Gaetan Mathieu ,  David Pedersen ,  Michael Stadt

IPC: H01R12/00

CPC classification number: G01R1/0408 ,  B23K3/087 ,  G01R1/0416 ,  G01R1/0466 ,  G01R31/2886 ,  H01L23/04 ,  H01L23/13 ,  H01L23/32 ,  H01L23/5385 ,  H01L24/72 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2224/73251 ,  H01L2224/8114 ,  H01L2224/81901 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/119 ,  H05K3/308 ,  H05K3/325 ,  H05K2201/0311 ,  H05K2201/09472 ,  H05K2201/09827 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/4914 ,  Y10T29/49147 ,  Y10T29/49153 ,  Y10T29/49208 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  H01L2924/00014 ,  H01L2224/72

Abstract: Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.

Abstract translation: 从诸如半导体器件的电子部件延伸的弹簧接触元件的临时连接是通过推动电子部件，因此弹簧接触元件的端部垂直地抵靠互连基板的端子，或者通过水平推动互连基板的端子 抵抗弹簧接触元件的端部。 公开了各种终端配置。