公开(公告)号：US20240260167A1

公开(公告)日：2024-08-01

申请号：US18415119

申请日：2024-01-17

Applicant: CANON KABUSHIKI KAISHA

Inventor： KOJI NOGUCHI ,  MITSUTOSHI HASEGAWA ,  SATORU HIGUCHI

IPC: H05K1/02 ,  H01L23/00 ,  H01L23/498 ,  H01R12/62 ,  H04N23/51 ,  H04N23/52 ,  H04N23/54 ,  H05K1/18

CPC classification number: H05K1/0201 ,  H01L23/49838 ,  H01R12/62 ,  H04N23/51 ,  H04N23/52 ,  H04N23/54 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/181 ,  H05K2201/09854 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/10068

Abstract: A printed wiring board has a first conductive layer including a second electrode group bonded to a first electrode group of a flexible printed circuit board, and a second conductive layer, and a plane including the second conductive layer includes a first region including a reference region set in a bonded portion, a second region via a first boundary, and a third region via a second boundary, and a first boundary portion is positioned within a range of 0.5 times or more and 5 times or less a length of a short side of four sides in a prescribed direction, and a second boundary portion is positioned within a range of 0.5 times or more and 5 times or less the length of the short in a prescribed direction, and a density of the second conductive layer in the first region is higher than that in the second region.

公开(公告)号：US11972993B2

公开(公告)日：2024-04-30

申请号：US17320646

申请日：2021-05-14

Applicant: CORNING INCORPORATED

Inventor： Rachel Eileen Dahlberg ,  Tian Huang ,  Yuhui Jin ,  Garrett Andrew Piech ,  Daniel Ohen Ricketts

IPC: H01L23/15 ,  B23K26/00 ,  B23K26/06 ,  B23K26/062 ,  B23K26/402 ,  B23K26/53 ,  B23K26/55 ,  C03C15/00 ,  C03C23/00 ,  H01L21/48 ,  H01L23/498 ,  B23K26/0622 ,  B23K26/064 ,  B23K26/073 ,  B23K26/36 ,  B23K103/00 ,  H01L23/48 ,  H01L23/538

CPC classification number: H01L23/15 ,  B23K26/0006 ,  B23K26/06 ,  B23K26/062 ,  B23K26/402 ,  B23K26/53 ,  B23K26/55 ,  C03C15/00 ,  C03C23/0025 ,  B23K26/0617 ,  B23K26/0622 ,  B23K26/0624 ,  B23K26/0626 ,  B23K26/064 ,  B23K26/0738 ,  B23K26/36 ,  B23K2103/54 ,  H01L21/486 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H05K2201/09827 ,  H05K2201/09854 ,  Y10T428/24273

Abstract: Silica-containing substrates including vias with a narrow waist, electronic devices incorporating a silica-containing substrate, and methods of forming vias with narrow waist in silica-containing substrates are disclosed. In one embodiment, an article includes a silica-containing substrate including greater than or equal to 85 mol % silica, a first surface, a second surface opposite the first surface, and a via extending through the silica-containing substrate from the first surface toward the second surface. The via includes a first diameter at the first surface wherein the first diameter is less than or equal to 100 μm, a second diameter at the second surface wherein the first diameter is less than or equal to 100 μm, and a via waist between the first surface and the second surface. The via waist has a waist diameter that is less than the first diameter and the second diameter such that a ratio between the waist diameter and each of the first diameter and the second diameter is less than or equal to 75%.

公开(公告)号：US11903129B2

公开(公告)日：2024-02-13

申请号：US17691772

申请日：2022-03-10

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chi Seong Kim ,  Won Seok Lee ,  Guh Hwan Lim ,  Jin Uk Lee ,  Jin Oh Park

IPC: H05K1/02 ,  H01L23/13 ,  H01L23/66 ,  H05B45/20 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00

CPC classification number: H05K1/119 ,  H05K1/183 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0044 ,  H05K2201/09827 ,  H05K2201/09854

Abstract: A printed circuit board includes: a first insulating material; and a second insulating material disposed on one surface of the first insulating material, and including first and second cavities having depths different from each other. At least one groove portion is disposed in a side surface of each of the first and second cavities.

公开(公告)号：US20190208631A1

公开(公告)日：2019-07-04

申请号：US16299553

申请日：2019-03-12

Applicant: Innovium, Inc.

Inventor： Yongming Xiong

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/40

CPC classification number: H05K1/115 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/181 ,  H05K3/0047 ,  H05K3/4038 ,  H05K2201/09636 ,  H05K2201/09727 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10545 ,  H05K2203/0207

Abstract: A printed circuit board having multiple layers of circuitry, the printed circuit board including a first layer having a first cylindrical opening with a first diameter, the first cylindrical opening formed through at least the first layer and formed about a particular axis; and a second layer having a second cylindrical opening with a second diameter, the second cylindrical opening formed through at least the second layer and formed about the particular axis, where the first cylindrical opening is a portion of a conductive via, and where the second diameter is smaller than the first diameter.

公开(公告)号：US20190183125A1

公开(公告)日：2019-06-20

申请号：US16107755

申请日：2018-08-21

Applicant: Advanced Powertrain Engineering, LLC

Inventor： Paul Fathauer

IPC: A01N43/90 ,  A01N47/02 ,  C07D417/04 ,  C07D401/04 ,  C07D513/04 ,  A01N43/76 ,  C07D471/04 ,  C07D413/04 ,  A01N43/78 ,  C07D498/04

CPC classification number: A01N43/90 ,  A01N43/76 ,  A01N43/78 ,  A01N47/02 ,  C07D401/04 ,  C07D413/04 ,  C07D417/04 ,  C07D471/04 ,  C07D498/04 ,  C07D513/04 ,  F16K31/02 ,  H05K1/115 ,  H05K1/119 ,  H05K1/18 ,  H05K3/3447 ,  H05K3/42 ,  H05K2201/09854 ,  H05K2201/1003 ,  H05K2201/10303 ,  H05K2201/10818 ,  Y10T29/49002

Abstract: A printed circuit assembly (PCA) that provides for a method of rebuilding an electrically operated automatic transmission solenoid module. The PCA allows for a repairable yet rugged interconnection of several solenoids that reside within the span of the module assembly.

公开(公告)号：US20190172780A1

公开(公告)日：2019-06-06

申请号：US16266203

申请日：2019-02-04

Applicant: DAI NIPPON PRINTING CO., LTD.

Inventor： Satoru KURAMOCHI ,  Sumio KOIWA ,  Hidenori YOSHIOKA

IPC: H01L23/498 ,  H01L25/18 ,  H05K1/11 ,  H01L23/48 ,  H01L25/065 ,  H05K3/28 ,  H05K3/44

CPC classification number: H01L23/49827 ,  H01L23/13 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/065 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16165 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/81805 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/381 ,  H05K1/115 ,  H05K3/28 ,  H05K3/445 ,  H05K2201/09154 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/09854 ,  H05K2203/0594 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/0665 ,  H01L2924/07025

Abstract: A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

公开(公告)号：US20180310405A1

公开(公告)日：2018-10-25

申请号：US15945762

申请日：2018-04-05

Applicant: FUJITSU LIMITED

Inventor： Shigeo Iriguchi ,  Takahiro KITAGAWA ,  Mitsunori Abe ,  Shigeru SUGINO ,  Nobuo Taketomi ,  Kiyoyuki Hatanaka ,  Ryo Kanai

IPC: H05K1/11 ,  H05K1/03 ,  H01R12/71 ,  H05K3/00 ,  H05K3/22

CPC classification number: H05K1/11 ,  H01R12/71 ,  H05K1/0373 ,  H05K1/115 ,  H05K3/0017 ,  H05K3/002 ,  H05K3/0044 ,  H05K3/22 ,  H05K3/429 ,  H05K2201/029 ,  H05K2201/09854

Abstract: A substrate includes an insulation layer including a glass cloth impregnated with a resin, and a through hole having a hole included in the insulation layer and plating formed in an inner surface of the hole, where a location, intersecting with the glass cloth, of an outer circumferential portion of the through hole has a recessed portion recessed toward an outside of the hole.

公开(公告)号：US09927349B2

公开(公告)日：2018-03-27

申请号：US15379319

申请日：2016-12-14

Applicant: CANON KABUSHIKI KAISHA

Inventor： Shinan Wang ,  Yutaka Setomoto

IPC: G01N21/00 ,  G01N21/17 ,  B06B1/02 ,  B06B1/06 ,  G01H9/00 ,  H05K1/09 ,  H05K1/11 ,  H05K3/40 ,  G01N29/24 ,  H05K3/00 ,  H05K3/06 ,  H05K3/42

CPC classification number: G01N21/1702 ,  B06B1/0292 ,  B06B1/06 ,  B06B1/0622 ,  G01H9/004 ,  G01N29/24 ,  G01N29/2406 ,  G01N29/2418 ,  G01N29/2437 ,  G01N2021/1706 ,  H01L21/76898 ,  H01L23/49827 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0041 ,  H05K3/06 ,  H05K3/4084 ,  H05K3/42 ,  H05K2201/09854 ,  H05K2203/025

Abstract: In a method of producing a device in which an element structure is provided on a substrate including a through wiring, a through hole is formed so as to extend from a first surface of the substrate to a second surface of the substrate disposed on an opposite side of the substrate to the first surface, the through wiring is formed by filling the through hole with an electrically conductive material, and the element structure is formed on a first surface side. In the step of forming the through hole, a degree of surface irregularities of an inner wall of the through hole is larger on the first surface side than on a second surface side.

公开(公告)号：US09925770B2

公开(公告)日：2018-03-27

申请号：US15422151

申请日：2017-02-01

Applicant: SEIKO EPSON CORPORATION

Inventor： Motoki Takabe ,  Shuichi Tanaka ,  Yasuyuki Matsumoto ,  Koji Asada ,  Eiju Hirai

IPC: B41J2/14 ,  B41J2/045

CPC classification number: B41J2/14201 ,  B41J2/04521 ,  B41J2/14072 ,  B41J2/14233 ,  B41J2002/14419 ,  B41J2002/14491 ,  B41J2202/18 ,  H01L23/49827 ,  H01L23/49838 ,  H01L41/0475 ,  H01L41/053 ,  H01L41/0973 ,  H01L2224/16225 ,  H05K1/115 ,  H05K3/0029 ,  H05K2201/09563 ,  H05K2201/09854 ,  H05K2203/107

Abstract: A wiring substrate is provided with a surface wiring on at least one surface, a through hole which passes through the wiring substrate, and a through wiring which is formed in the through hole and is connected to a surface wiring, in which an inner surface of the through hole is a rough surface, and electric resistance of the through wiring is equal to or less than the electric resistance of the surface wiring.

公开(公告)号：US20180077800A1

公开(公告)日：2018-03-15

申请号：US15266734

申请日：2016-09-15

Applicant: Innovium, Inc.

Inventor： Yongming Xiong

IPC: H05K1/11 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K1/115 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/181 ,  H05K3/0047 ,  H05K3/4038 ,  H05K2201/09636 ,  H05K2201/09727 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10545 ,  H05K2203/0207

Abstract: A printed circuit board having multiple layers of circuitry, the printed circuit board including a first layer having a first cylindrical opening with a first diameter, the first cylindrical opening formed through at least the first layer and formed about a particular axis; and a second layer having a second cylindrical opening with a second diameter, the second cylindrical opening formed through at least the second layer and formed about the particular axis, where the first cylindrical opening is a portion of a conductive via, and where the second diameter is smaller than the first diameter.