公开(公告)号：US20040060969A1

公开(公告)日：2004-04-01

申请号：US10672740

申请日：2003-09-26

Inventor： Koji Imai ,  Shuhei Hiwada

IPC: B23K031/02

CPC classification number: B23K1/0016 ,  B23K2101/42 ,  H05K3/3452 ,  H05K3/363 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09709 ,  H05K2201/099 ,  H05K2203/043

Abstract: A plurality of lands and a plurality of conducting wires connected independently to each land are formed on one side surface of an insulating substrate of a flexible printed circuit board. Through-holes are formed through the insulating substrate for exposing the lands to the other side surface. Solder is provided in the through-holes. The solder connects the lands to the head terminals on an inkjet head, which is located facing the other side surface of the insulating substrate. The insulating substrate separates the solder from areas between the conducting wires and from areas between the lands, thereby preventing short circuits from occurring when manufacturing the connecting structure with a low tolerance grade.

Abstract translation: 在柔性印刷电路板的绝缘基板的一个侧表面上形成多个独立于每个焊盘的焊盘和多条导线。 通过绝缘基板形成通孔，以将焊盘露出到另一侧表面。 在通孔中设置焊料。 焊料将焊盘连接到位于绝缘基板的另一侧表面上的喷墨头上的头端子上。 绝缘基板将焊料与导线之间的区域和焊盘之间的区域分开，从而防止在制造具有低容差等级的连接结构时发生短路。

公开(公告)号：US20040040742A1

公开(公告)日：2004-03-04

申请号：US10644487

申请日：2003-08-20

Applicant: Murata Manufacturing Co. Ltd.

Inventor： Hiroyuki Ishizaki

IPC: H05K001/00

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/32 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/27013 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  H05K2201/10977 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Wiring electrodes are formed on a first principal surface of a base substrate. An insulation film partially covers the first principal surface of the base substrate and the wiring electrodes. The insulation film has opening portions where the base substrate and the wiring electrodes are not coated with the insulation film. An electronic component having bump electrodes is mounted on the mounting board by connecting the bump electrodes with the wiring electrodes in the opening portions. A gap between the first principal surface of the base substrate and the electronic component is filled with sealing resin. The opening portions are substantially orthogonal to the longitudinal direction of the wiring electrodes. The ratio of the minimum width of a portion of the base substrate exposed at each of the opening portions to the thickness of the insulation film may advantageously be greater than or equal to 2.

Abstract translation: 接线电极形成在基底基板的第一主表面上。 绝缘膜部分地覆盖基底基板的第一主表面和布线电极。 绝缘膜具有开口部分，其中基底基板和布线电极未被绝缘膜涂覆。 具有凸起电极的电子部件通过将凸起电极与开口部中的布线电极连接而安装在安装基板上。 基底基板的第一主表面和电子部件之间的间隙填充有密封树脂。 开口部与布线电极的长度方向大致正交。 在每个开口部分暴露的基底部分的一部分的最小宽度与绝缘膜的厚度之比可以有利地大于或等于2。

公开(公告)号：US06657697B2

公开(公告)日：2003-12-02

申请号：US09739337

申请日：2000-12-19

Applicant: Hiroshi Yamate ,  Yoshiyuki Tsujita

Inventor： Hiroshi Yamate ,  Yoshiyuki Tsujita

IPC: G02F11333

CPC classification number: G02F1/13452 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/099 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: A liquid crystal display device having a circuit board mounting with a chip component which has a pair of electrodes disposed at its respective ends thereon, and a pair of land areas on the circuit board to which the pair of electrodes are soldered respectively. Each of the pair of land areas is covered with a protrusion of a solder resist layer protruding from a middle point of an edge thereof opposite to another edge thereof facing another of the pair of land areas toward a center thereof. The distance L between the protrusions of the solder resist layer satisfies an inequality: L≧EL where EL is a distance between the outer ends of the pair of electrodes of the chip component.

Abstract translation: 一种液晶显示装置，具有安装有芯片部件的电路板，所述芯片部件在其各自的端部具有一对电极，所述电路板上分别焊接有一对所述一对电极的焊盘区域。 一对地面区域中的每一个被覆有阻焊层的突起，该阻焊层从与其另一边缘的边缘的中点相对的另一边缘的中点突出，朝向其中心。 阻焊层的突起之间的距离L满足不等式：L> = EL，其中EL是芯片部件的一对电极的外端之间的距离。

公开(公告)号：US20030173109A1

公开(公告)日：2003-09-18

申请号：US10345351

申请日：2003-01-16

Applicant: Fujitsu Limited

Inventor： Mitsuo Suehiro

IPC: H05K001/03

CPC classification number: H01L24/81 ,  H01L24/98 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/13021 ,  H01L2224/16237 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15787 ,  H05K3/281 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/099 ,  H05K2201/2036 ,  H05K2203/0182 ,  H05K2203/0191 ,  H05K2203/0264 ,  H05K2203/176 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49147 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A printed circuit board unit comprises an insulated film disposed between a printed circuit board and an electronic component so as to define a through hole for receiving the solder bump. The through hole may be designed to form a constriction in the solder bump. Electric connection can reliably be established between the printed circuit board and the electronic component since the solder bump is allowed to penetrate through the through hole in the insulated film. When the insulated film is brought away from the printed circuit board, the insulated film serves to tear the solder bump in two pieces at the constriction, so that the electronic component can easily be detached from the printed circuit board.

Abstract translation: 印刷电路板单元包括布置在印刷电路板和电子部件之间的绝缘膜，以便限定用于接收焊料凸块的通孔。 通孔可以设计成在焊料凸块中形成收缩。 由于允许焊料凸块穿过绝缘膜中的通孔，所以能够可靠地在印刷电路板和电子部件之间建立电连接。 当绝缘膜离开印刷电路板时，绝缘膜用于在缩小时将焊料凸块撕成两片，使得电子部件可以容易地从印刷电路板上拆下。

公开(公告)号：US20030161120A1

公开(公告)日：2003-08-28

申请号：US10359014

申请日：2003-02-04

Applicant: SEIKO EPSON CORPORATION

Inventor： Hideki Yuzawa

IPC: H05K007/02 ,  H05K007/06 ,  H05K007/08 ,  H05K007/10

CPC classification number: H01L23/49838 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H05K1/111 ,  H05K3/243 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0969 ,  H05K2201/099 ,  H05K2201/10674 ,  H01L2924/00014

Abstract: A wiring board includes a wiring pattern having a lands and a line connected to the land, a substrate supporting the wiring pattern, and a protective film provided over the substrate and having an opening. The land has a first portion which includes a connecting portion connected to the line and is covered by the protective film, and a second portion exposed by the opening. A hole for exposing the substrate is formed at least in the first portion of the land.

Abstract translation: 布线基板包括布线图形，具有平台和连接到平台的线，支撑布线图案的基板和设置在基板上并具有开口的保护膜。 该台面具有第一部分，该第一部分包括连接到该线上并被保护膜覆盖的连接部分，以及由该开口露出的第二部分。 至少在所述焊盘的第一部分中形成用于露出衬底的孔。

公开(公告)号：US06542377B1

公开(公告)日：2003-04-01

申请号：US09605905

申请日：2000-06-28

Applicant: Doreen S. Fisher ,  Thad McMillan

Inventor： Doreen S. Fisher ,  Thad McMillan

IPC: H05K702

CPC classification number: H05K1/114 ,  H05K3/3452 ,  H05K3/429 ,  H05K2201/09227 ,  H05K2201/099 ,  H05K2201/10734

Abstract: A computer system including a microprocessor and a system memory coupled t provide storage to facilitate execution of computer programs by the microprocessor. An input is coupled to provide input to the microprocessor. A display is coupled to the microprocessor by a video controller and a mass storage is coupled to the microprocessor. A printed circuit board is electrically coupled to the microprocessor. The printed circuit board includes a circuit substrate having two spaced apart major surfaces and a plurality of rows of interconnect assemblies. Each row of interconnect assemblies includes a first and a second interconnect pad on a major surface of the circuit substrate. The first and the second interconnect pads are positioned on a respective reference axis. The first interconnect pad is spaced apart from the second interconnect pad by a first distance. A first and a second conductive via extend through the circuit substrate. The first and the second conductive vias are positioned adjacent to and electrically connected to respective ones of the interconnect pads. Each one of the conductive vias is positioned on the respective reference axis and is spaced apart from the respective interconnect pad by a second distance. The first distance is substantially greater than the second distance wherein each conductive via is offset toward the connected interconnect pad.

Abstract translation: 包括微处理器和耦合的系统存储器的计算机系统提供存储以便于由微处理器执行计算机程序。 输入被耦合以向微处理器提供输入。 显示器通过视频控制器耦合到微处理器，并且大容量存储器耦合到微处理器。 印刷电路板电耦合到微处理器。 印刷电路板包括具有两个间隔开的主表面和多排互连组件的电路基板。 每排互连组件包括在电路基板的主表面上的第一和第二互连焊盘。 第一和第二互连焊盘位于相应的参考轴上。 第一互连焊盘与第二互连焊盘间隔开第一距离。 第一和第二导电通孔延伸穿过电路基板。 第一和第二导电通孔被定位成与相应的互连焊盘相邻并电连接。 导电通孔中的每一个位于相应的参考轴线上，并且与相应的互连衬垫隔开第二距离。 第一距离基本上大于第二距离，其中每个导电通孔朝连接的互连焊盘偏移。

公开(公告)号：US20030056365A1

公开(公告)日：2003-03-27

申请号：US09962152

申请日：2001-09-26

Inventor： David W. Boggs ,  Rebecca A. Jessep ,  Carolyn McCormick ,  Daryl A. Sato ,  John H. Dungan

IPC: H01B013/00 ,  H01G004/00 ,  H01G005/00 ,  H01G009/00 ,  H01G013/00 ,  H01R043/00

CPC classification number: H05K1/0269 ,  H05K3/3452 ,  H05K2201/09063 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2201/099 ,  H05K2203/163 ,  H05K2203/166 ,  Y10S428/901 ,  Y10T29/49117 ,  Y10T428/218 ,  Y10T428/24273 ,  Y10T428/24917

Abstract: A registration coupon is provided for a printed circuit board or other substrate. The registration coupon may be used to determine a hole-to-outer layer feature registration and a solder mask registration. The registration coupon may include a registration hole provided on the circuit board, a metal pad and an anti-pad provided on the circuit board about the registration hole, and a solder mask covering the metal pad.

公开(公告)号：US06521845B1

公开(公告)日：2003-02-18

申请号：US08873973

申请日：1997-06-12

Applicant: Michael Barrow

Inventor： Michael Barrow

IPC: H05K116

CPC classification number: H05K1/0207 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0201 ,  H05K1/0206 ,  H05K1/112 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/429 ,  H05K2201/062 ,  H05K2201/0969 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2201/10969 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A thermally efficient printed circuit board for a ball grid array (BGA) integrated circuit package. The printed circuit board includes a first outer conductive plane located on a top surface of a substrate. A portion of the first outer conductive plane is covered with a solder mask. The solder mask has an opening that exposes a portion of the first outer conductive plane. A solder ball of the BGA package is attached to the exposed portion of the conductive plane to mount the package to the printed circuit board. The outer conductive plane has a wide area that provides a relatively efficient thermal path to conduct heat that flows through the solder ball from the integrated circuit package. Additionally, the outer conductive plane is coupled to internal conductive planes by a plurality of vias. The internal conductive planes further dissipate the heat which flows from the package into the printed circuit board.

Abstract translation: 一种用于球栅阵列（BGA）集成电路封装的热效率印刷电路板。 印刷电路板包括位于基板的顶表面上的第一外导电平面。 第一外导电平面的一部分用焊接掩模覆盖。 焊接掩模具有暴露第一外部导电平面的一部分的开口。 BGA封装的焊球附着到导电平面的暴露部分，以将封装安装到印刷电路板上。 外部导电平面具有广泛的面积，其提供相对有效的热路径以传导从集成电路封装件流过焊球的热量。 此外，外部导电平面通过多个通孔耦合到内部导电平面。 内部导电平面进一步消散从封装流入印刷电路板的热量。

公开(公告)号：US06518511B1

公开(公告)日：2003-02-11

申请号：US09960795

申请日：2001-09-20

Applicant: Wen Hsiung Lin

Inventor： Wen Hsiung Lin

IPC: H05R103

CPC classification number: H05K3/3452 ,  H05K3/3447 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/10424

Abstract: A circuit board includes a number of orifices, a number of conductors engaged in the orifices of the circuit board and each having an aperture, and an insulating layer applied onto the conductors for preventing a weld metal material from being attached onto the conductors. One or more couplers each includes a bar for securing the prongs together. The weld metal material may be prevented from being applied between the bar and the conductors, for preventing the coupler from being separated from the conductors, and for preventing the prongs from being shortaged.

Abstract translation: 电路板包括多个孔口，多个导体接合在电路板的孔口中，并且每个具有孔径，以及施加到导体上的绝缘层，用于防止焊接金属材料附着到导体上。 一个或多个耦合器各自包括用于将插脚固定在一起的条。 可以防止焊接金属材料施加在棒和导体之间，以防止耦合器与导体分离，并防止插脚短路。

公开(公告)号：US20020137257A1

公开(公告)日：2002-09-26

申请号：US09946903

申请日：2001-09-05

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chien-Ping Huang ,  Tzong-Da Ho ,  Cheng-Hsu Hsiao

IPC: H01L021/44 ,  H01L021/48 ,  H01L021/50

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3114 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H05K3/284 ,  H05K3/3452 ,  H05K2201/09781 ,  H05K2201/099 ,  Y10S438/976 ,  Y10T29/49174 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0401

Abstract: A fabricating method for a semiconductor package is proposed, in which a chip carrier accommodates at least one semiconductor chip, which is attached with an interface layer formed on a covering module plate consisting of at least one covering plate, while the interface layer is poor in adhesion to the chip and a molding compound used for forming an encapsulant. So that after completing molding, ball implantation and singulation processes, the interface layer, the covering plate and a portion of the encapsulant formed on the covering plate can be easily removed by heating the singulated semiconductor package. This allows the molding compound not to flash on the chip, and prevents the chip from being damaged by stress generated in the molding process.

Abstract translation: 提出一种用于半导体封装的制造方法，其中芯片载体容纳至少一个半导体芯片，该半导体芯片附着有形成在由至少一个覆盖板构成的覆盖模块板上的界面层，而界面层较差 与芯片的粘附性和用于形成密封剂的模塑料。 因此，在完成成型，球注入和分割工艺之后，可以通过加热单切半导体封装容易地去除界面层，覆盖板和形成在覆盖板上的一部分密封剂。 这使得模塑料不会在芯片上闪光，并且防止芯片被模制过程中产生的应力损坏。