公开(公告)号：US20030079907A1

公开(公告)日：2003-05-01

申请号：US10107200

申请日：2002-03-28

Applicant: FUJITSU LIMITED

Inventor： Susumu Eguchi ,  Hiroshi Shimamori

IPC: H01R012/00

CPC classification number: H01R12/721 ,  H01R12/714 ,  H05K1/117 ,  H05K3/3452 ,  H05K2201/09154 ,  H05K2201/098 ,  H05K2201/09909 ,  H05K2201/10863 ,  H05K2203/0594

Abstract: A card edge connector comprises a connector body and a conductive pad, and is constructed such that the conductive pad terminates at a predetermined distance from the end of the tip portion of the connector body, and that there is further provided a protective pad, adjacent to the terminating portion of the conductive pad, which is formed at the same time with the formation of a wiring pattern in a post-fabrication step of the wiring pattern. Using the card edge connector, an electric card and an electric equipment are also provided.

Abstract translation: 卡缘连接器包括连接器主体和导电焊盘，并且被构造成使得导电焊盘终止于距连接器主体的端部的端部预定距离处，并且还设置有保护焊盘 导电焊盘的端接部分，其在布线图案的后制造步骤中同时形成布线图案。 还使用卡缘连接器，电卡和电气设备。

公开(公告)号：US20030039101A1

公开(公告)日：2003-02-27

申请号：US10217415

申请日：2002-08-14

Applicant: TDK Corporation

Inventor： Minoru Takaya ,  Toshikazu Endo

IPC: H05K007/00

CPC classification number: H05K1/0366 ,  H01L2224/97 ,  H05K1/0271 ,  H05K1/036 ,  H05K3/0052 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09909 ,  H05K2201/2009 ,  H05K2203/061 ,  H05K2203/065

Abstract: The present invention relates to a module component for which degradation of electrical properties caused by absorption of moisture in the air can be prevented. An intermediate layer comprises a first layer, a second layer and a core layer. The core layer comprises a material having a higher strength than the first layer and the second layer, has a network structure that extends out in planar fashion, has an outer periphery thereof positioned further to the inside than the outer peripheries of the first layer and the second layer, and is sealed between the first layer and the second layer. An upper layer is laminated on the upper surface of the intermediate layer. A lower layer is laminated on the lower surface of the intermediate layer. Mounted components are mounted on any one of the upper layer and the lower layer.

Abstract translation: 本发明涉及一种可以防止由吸收空气中的水分引起的电性能降低的模块部件。 中间层包括第一层，第二层和芯层。 芯层包括具有比第一层和第二层更高的强度的材料，具有以平面方式延伸出的网状结构，其外周比第一层的外周更位于内侧，并且 第二层，并且密封在第一层和第二层之间。 上层被层叠在中间层的上表面上。 下层层压在中间层的下表面上。 安装的部件安装在上层和下层中的任何一个上。

公开(公告)号：US20030024732A1

公开(公告)日：2003-02-06

申请号：US10254851

申请日：2002-09-26

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Ryoji Ninomiya

IPC: H05K007/06

CPC classification number: H05K1/0246 ,  H05K1/0231 ,  H05K1/024 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/0269 ,  H05K1/112 ,  H05K1/162 ,  H05K3/28 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09909 ,  H05K2201/09936 ,  H05K2201/10022 ,  H05K2201/10636 ,  H05K2203/161 ,  Y02P70/611

Abstract: An insulation layer is formed on a ground layer. The insulation layer includes first and second regions for forming wiring layers. The impedance of a wiring layer formed on the second region is lower than that of a wiring layer formed on the first region. A signal line pattern is formed on the wiring layer on the first region of the insulation layer. A power supply plane is formed on the wiring layer on the second region of the insulation layer in order to feed power to the signal line pattern through a termination resistor connected to the signal line pattern.

公开(公告)号：US06480396B2

公开(公告)日：2002-11-12

申请号：US09803024

申请日：2001-03-12

Applicant: Ryoji Ninomiya

Inventor： Ryoji Ninomiya

IPC: H05K702

CPC classification number: H05K1/0246 ,  H05K1/0231 ,  H05K1/024 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/0269 ,  H05K1/112 ,  H05K1/162 ,  H05K3/28 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09909 ,  H05K2201/09936 ,  H05K2201/10022 ,  H05K2201/10636 ,  H05K2203/161 ,  Y02P70/611

Abstract: An insulation layer is formed on a ground layer. The insulation layer includes first and second regions for forming wiring layers. The impedance of a wiring layer formed on the second region is lower than that of a wiring layer formed on the first region. A signal line pattern is formed on the wiring layer on the first region of the insulation layer. A power supply plane is formed on the wiring layer on the second region of the insulation layer in order to feed power to the signal line pattern through a termination resistor connected to the signal line pattern.

Abstract translation: 在地层上形成绝缘层。 绝缘层包括用于形成布线层的第一和第二区域。 形成在第二区域上的布线层的阻抗低于形成在第一区域上的布线层的阻抗。 在绝缘层的第一区域上的布线层上形成信号线图形。 在绝缘层的第二区域上的布线层上形成电源平面，以便通过连接到信号线图形的终端电阻向信号线图案供电。

公开(公告)号：US06356447B2

公开(公告)日：2002-03-12

申请号：US09841087

申请日：2001-04-24

Applicant: Christopher J. Scafidi

Inventor： Christopher J. Scafidi

IPC: H05K720

CPC classification number: H05K7/20445 ,  H01L2224/73204 ,  H05K1/0206 ,  H05K1/0209 ,  H05K3/341 ,  H05K3/3452 ,  H05K2201/066 ,  H05K2201/09781 ,  H05K2201/099 ,  H05K2201/09909

Abstract: A system and method for conducting heat from electrical devices mounted on a circuit board is disclosed. A heat sink for conducting the heat is provided that includes a pair of substantially parallel vertical legs and a horizontal member coupled between the pair of substantially parallel vertical legs to form a “U” shape. The horizontal member includes an outer surface and an inner surface both having a layer of thermal interface material. The heat sink is surface mountable to a heat sink mounting pad on a surface of a printed circuit board. The heat sink mounting pad is adjacent to and thermally coupled to a heat transfer pad of an electronic device. The heat sink is thermally coupled to the electronic device.

Abstract translation: 公开了一种用于从安装在电路板上的电气装置传导热量的系统和方法。 提供了一种用于传导热量的散热器，其包括一对基本上平行的竖直腿部和联接在所述一对基本上平行的竖直腿部之间以形成“U”形状的水平部件。 水平构件包括具有一层热界面材料层的外表面和内表面。 散热器可表面安装到印刷电路板表面上的散热片安装垫。 散热器安装垫与电子设备的传热垫相邻并热耦合。 散热器热耦合到电子设备。

公开(公告)号：US20020014518A1

公开(公告)日：2002-02-07

申请号：US09907599

申请日：2001-07-19

Inventor： Makoto Totani ,  Toshihiro Miyake ,  Tomohiro Yokochi ,  Takehito Teramae ,  Yoshitaro Yazaki ,  Kazuyuki Deguchi ,  Hajime Nakagawa

IPC: B23K031/02

CPC classification number: H05K3/363 ,  H05K3/3452 ,  H05K3/3494 ,  H05K2201/0129 ,  H05K2201/091 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2201/10772 ,  H05K2203/0195 ,  H05K2203/0278 ,  H05K2203/065

Abstract: Lands formed on a flexible printed circuit board are electrically connected with lands formed on a rigid printed circuit board through solder. At this point, solder resist is formed between neighboring two lands on the rigid printed circuit board, and is terminated with an end portion that is interposed between the rigid printed circuit board and the flexible printed circuit board. Accordingly, even when surplus solder is extruded onto the rigid printed circuit board, the solder resist can prevent solder bridges from being formed between the lands.

Abstract translation: 形成在柔性印刷电路板上的焊盘通过焊料与刚性印刷电路板上形成的焊盘电连接。 此时，在刚性印刷电路板上的相邻的两个焊盘之间形成阻焊剂，并且端接有刚性印刷电路板和柔性印刷电路板之间的端部。 因此，即使剩余焊料被挤出到刚性印刷电路板上，阻焊剂也可以防止在焊盘之间形成焊料桥。

公开(公告)号：US20010053063A1

公开(公告)日：2001-12-20

申请号：US09841087

申请日：2001-04-24

Applicant: ADC Telecommunications, Inc.

Inventor： Christopher J. Scafidi

IPC: H05K007/20

CPC classification number: H05K7/20445 ,  H01L2224/73204 ,  H05K1/0206 ,  H05K1/0209 ,  H05K3/341 ,  H05K3/3452 ,  H05K2201/066 ,  H05K2201/09781 ,  H05K2201/099 ,  H05K2201/09909

Abstract: A system and method for conducting heat from electrical devices mounted on a circuit board is disclosed. A heat sink for conducting the heat is provided that includes a pair of substantially parallel vertical legs and a horizontal member coupled between the pair of substantially parallel vertical legs to form a nullUnull shape. The horizontal member includes an outer surface and an inner surface both having a layer of thermal interface material. The heat sink is surface mountable to a heat sink mounting pad on a surface of a printed circuit board. The heat sink mounting pad is adjacent to and thermally coupled to a heat transfer pad of an electronic device. The heat sink is thermally coupled to the electronic device.

公开(公告)号：US06225573B1

公开(公告)日：2001-05-01

申请号：US09180978

申请日：1998-11-18

Applicant: Satoshi Nakamura

Inventor： Satoshi Nakamura

IPC: H01R1204

CPC classification number: H05K3/3405 ,  H01R12/52 ,  H05K3/0052 ,  H05K3/0097 ,  H05K3/305 ,  H05K3/341 ,  H05K3/3421 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/083 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/09909 ,  H05K2201/1028 ,  H05K2201/1034 ,  H05K2203/0545 ,  H05K2203/104 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: There are provided a coating step for coating solder paste (3) onto the circuit board (1), a superimposing step for superimposing a connecting end (4a) of a terminal (4) also having a non-connecting end (4b) on the regions coated with solder paste (3), and a heating step for heating and melting the solder paste (3) in order to solder the connecting end (4a) onto the circuit board (1). A further step for coating adhesive material (6) onto the circuit board (1) is provided, and in the aforementioned superimposing step, the connecting end (4a) is brought into contact with the regions coated with the adhesive material (6). In the aforementioned heating step, the solder paste (3) is heated and caused to melt whilst the connecting end (4a) is in a bonded state with respect to the circuit board (1) by means of the adhesive material (6).

Abstract translation: 提供了一种用于将焊膏（3）涂覆到电路板（1）上的涂覆步骤，用于将也具有非连接端（4b）的端子（4）的连接端（4a）重叠在其上的叠加步骤 涂覆有焊膏（3）的区域，以及用于加热和熔化焊膏（3）的加热步骤，以将连接端（4a）焊接到电路板（1）上。 提供了将粘合剂材料（6）涂覆到电路板（1）上的另一步骤，并且在上述重叠步骤中，连接端（4a）与涂覆有粘合剂材料（6）的区域接触。 在上述加热步骤中，焊膏（3）被加热并熔化，同时连接端（4a）通过粘合材料（6）相对于电路板（1）处于接合状态。

公开(公告)号：US06191493B1

公开(公告)日：2001-02-20

申请号：US09260594

申请日：1999-03-02

Applicant: Masatoshi Yasunaga ,  Shin Nakao ,  Shinji Baba ,  Mitsuyasu Matsuo ,  Hironori Matsushima

Inventor： Masatoshi Yasunaga ,  Shin Nakao ,  Shinji Baba ,  Mitsuyasu Matsuo ,  Hironori Matsushima

IPC: H01L2144

CPC classification number: H01L21/568 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L25/10 ,  H01L25/105 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/02333 ,  H01L2224/02335 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/1131 ,  H01L2224/11332 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/1191 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16105 ,  H01L2224/16108 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4813 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/83104 ,  H01L2225/1005 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K3/303 ,  H05K3/3442 ,  H05K2201/09909 ,  H05K2201/10454 ,  H05K2201/10484 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Bonding pads are formed on a main surface of a semiconductor chip. An insulating layer having openings located on the bonding pads is formed on the main surface of the semiconductor chip. Base metal layers are formed on the bonding pads. A buffer coat film having a portion laid on a periphery of the base metal layer is formed on the insulating layer. Connection layers are formed on the base metal layers. First conductors are formed on the connection layers. A seal resin exposing only top surfaces of the first conductors is formed. Lumpish second conductors are formed on the top surfaces of the first conductor. Thereby, a resin seal semiconductor package can be made compact and it has improved electrical characteristics and high reliability.

Abstract translation: 接合焊盘形成在半导体芯片的主表面上。 在半导体芯片的主表面上形成具有位于接合焊盘上的开口的绝缘层。 在接合焊盘上形成基底金属层。 在绝缘层上形成具有放置在基底金属层周围的部分的缓冲涂膜。 连接层形成在基底金属层上。 第一导体形成在连接层上。 形成仅露出第一导体的顶表面的密封树脂。 在第一导体的顶表面上形成笨重的第二导体。 因此，可以使树脂密封半导体封装紧凑并且具有改善的电特性和高可靠性。

公开(公告)号：US6037667A

公开(公告)日：2000-03-14

申请号：US139168

申请日：1998-08-24

Applicant: David R. Hembree ,  Salman Akram

Inventor： David R. Hembree ,  Salman Akram

IPC: G01R1/04 ,  H01L21/60 ,  H01L23/498 ,  H05K3/00 ,  H05K3/06 ,  H05K3/24 ,  H05K3/32 ,  H05K3/38 ,  H05K3/40 ,  H01L21/321

CPC classification number: H01L24/81 ,  H01L23/49811 ,  H01L23/49838 ,  H05K3/325 ,  H05K3/4007 ,  G01R1/0483 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/16 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K2201/0367 ,  H05K2201/0969 ,  H05K2201/09909 ,  H05K2201/10734 ,  H05K2203/0554 ,  H05K2203/167 ,  H05K3/002 ,  H05K3/064 ,  H05K3/243 ,  H05K3/388

Abstract: A socket assembly for removably receiving a solder ball of a chip package and methods for forming the same. The socket assembly is a raised construction formed over a substrate and includes a socket, a ball contact structure, and an electrical trace. A relatively thick photoresist layer, which may have a thickness in a range from about 20 microns to about 450 microns, is used in the process of forming the socket assembly. The photoresist layer may have formed therein a patterned opening used as a mold for the socket assembly. Alternatively, the photoresist layer may be an integral and permanent component of the socket assembly. The socket assembly is configured such that a solder ball may-be disposed in the socket so as to be electrically connected to the socket assembly. Optionally, the socket assembly includes one or more ball penetration structures for facilitating the establishment of electrical contact and for adapting the socket assembly to solder balls of different dimensions. The socket assembly limits the amount of vertical deformation of the solder ball so that the chip package remains reusable.

Abstract translation: 一种用于可拆卸地接收芯片封装的焊球的插座组件及其形成方法。 插座组件是形成在衬底上的凸起结构，并且包括插座，球接触结构和电迹线。 在形成插座组件的过程中使用可以具有在约20微米至约450微米范围内的厚度的相对厚的光致抗蚀剂层。 光致抗蚀剂层可以在其中形成用作插座组件的模具的图案化开口。 或者，光致抗蚀剂层可以是插座组件的整体和永久性部件。 插座组件被构造成使得焊球可以设置在插座中以便电连接到插座组件。 可选地，插座组件包括一个或多个球穿透结构，用于促进建立电接触并使插座组件适应不同尺寸的焊球。 插座组件限制焊球的垂直变形量，使得芯片封装保持可重复使用。