公开(公告)号：US20150195911A1

公开(公告)日：2015-07-09

申请号：US14661635

申请日：2015-03-18

Applicant: FUJITSU COMPONENT LIMITED

Inventor： Shinya YAMAMOTO

IPC: H05K1/11 ,  H05K1/09

CPC classification number: H05K1/113 ,  H05K1/09 ,  H05K1/116 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/38 ,  H05K3/4007 ,  H05K3/42 ,  H05K2201/099 ,  Y10T29/49155

Abstract: A printed circuit board includes: a substrate; a land that is disposed on a surface of the substrate, and includes a central portion and a plurality of extended portions, the central portion having the same shape and the same size as a land of a surface mount device, and the extended portions being up-and-down symmetry and right-and-left symmetry with respect to a straight line which passes through the center of the central portion; gaps that are disposed on the surface of the substrate, each of the gaps being disposed on a periphery of the central portion and between the extended portions; and a resist that is disposed on the surface of the substrate, and has an opening portion formed at a position corresponding to the central portion and the gaps.

Abstract translation: 印刷电路板包括：基板; 设置在所述基板的表面上并且包括中心部分和多个延伸部分的区域，所述中心部分具有与表面安装装置的平台相同的形状和尺寸相同的尺寸，并且所述延伸部分向上 相对于穿过中心部分的中心的直线对称和右对称; 设置在基板的表面上的间隙，每个间隙设置在中心部分的周边和延伸部分之间; 以及设置在基板的表面上的抗蚀剂，并且具有形成在与中心部分和间隙相对应的位置处的开口部分。

公开(公告)号：US20150156860A1

公开(公告)日：2015-06-04

申请号：US14278522

申请日：2014-05-15

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chang Bo LEE ,  Dae Jo HONG ,  Hyo Seung NAM

IPC: H05K1/02

CPC classification number: H05K1/111 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/2081 ,  Y02P70/611

Abstract: A solder resist opening structure that exposes an electrode pad through a solder resist opening. The solder resist opening has a bottom diameter of about 80 μm or less with a first tolerance less than about 2.5 μm, the bottom diameter being smaller than a diameter of the electrode pad; an inverted trapezoidal cross section with a top diameter larger than the bottom diameter; and a diameter difference between the top diameter and the bottom diameter of about 10 μm or more with a second tolerance less than about 2.5 μm

Abstract translation: 阻焊剂开口结构，其通过阻焊剂开口暴露电极焊盘。 阻焊剂开口的底部直径为约80μm以下，第一公差小于约2.5μm，底部直径小于电极焊盘的直径; 顶部直径大于底部直径的倒梯形横截面; 上述直径和底部直径之间的直径差为约10μm以上，第二公差小于约2.5μm

公开(公告)号：US08982574B2

公开(公告)日：2015-03-17

申请号：US13479957

申请日：2012-05-24

Applicant: Mauro Scandiuzzo ,  Luca Perilli ,  Roberto Canegallo

Inventor： Mauro Scandiuzzo ,  Luca Perilli ,  Roberto Canegallo

IPC: H05K7/10 ,  H01L23/48 ,  H01L23/64 ,  H01L25/065 ,  H01L25/00 ,  G01R31/302 ,  H05K1/02 ,  H01L23/522 ,  H01L23/00

CPC classification number: H01L23/48 ,  G01R31/3025 ,  H01L23/5223 ,  H01L23/642 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06531 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/13062 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/19015 ,  H01L2924/19041 ,  H05K1/0239 ,  H05K1/0243 ,  H05K1/0245 ,  H05K1/0259 ,  H05K2201/0191 ,  H05K2201/099 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Contactless differential coupling structures can be used to communicate signals between circuits located on separate chips or from one chip to a probing device. The contactless coupling structures avoid problems (breaks, erosion, corrosion) that can degrade the performance of ohmic-type contact pads. The contactless coupling structures comprise pairs of conductive pads placed in close proximity. Differential signals are applied across a first pair of differential pads, and the signals are coupled wirelessly to a mating pair of conductive pads. Circuitry for generating and receiving differential signals is described.

Abstract translation: 非接触式差分耦合结构可以用于在位于单独芯片上或从一个芯片到探测装置的电路之间传送信号。 非接触式耦合结构避免了可能降低欧姆型接触焊盘性能的问题（断裂，侵蚀，腐蚀）。 非接触耦合结构包括靠近放置的一对导电焊盘。 差分信号跨越第一对差分焊盘施加，并且信号被无线地耦合到一对导电焊盘。 描述用于产生和接收差分信号的电路。

公开(公告)号：US08917107B2

公开(公告)日：2014-12-23

申请号：US13563258

申请日：2012-07-31

Applicant: Sang-Guk Han ,  Seok-Joon Moon ,  Beom-jun Jin

Inventor： Sang-Guk Han ,  Seok-Joon Moon ,  Beom-jun Jin

IPC: G01R31/00 ,  G01R31/28 ,  H01L23/538 ,  H05K1/02 ,  H01L21/66 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H05K1/11 ,  H05K3/28 ,  H05K3/32

CPC classification number: H01L25/0657 ,  G01R31/2808 ,  G01R31/2818 ,  G11C5/02 ,  G11C5/025 ,  G11C5/06 ,  G11C29/04 ,  G11C29/12 ,  G11C29/56 ,  G11C29/56016 ,  G11C2029/5602 ,  H01L22/30 ,  H01L22/32 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/538 ,  H01L24/09 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0912 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/181 ,  H05K1/0268 ,  H05K1/111 ,  H05K1/117 ,  H05K1/181 ,  H05K3/002 ,  H05K3/245 ,  H05K3/28 ,  H05K3/288 ,  H05K3/323 ,  H05K2201/0187 ,  H05K2201/035 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/099 ,  H05K2201/10159 ,  H05K2203/162 ,  Y10T29/49117 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.

Abstract translation: 提供具有印刷电路板的电子设备。 在一个实施例中，印刷电路板包括要与外部装置耦合的多个外部焊盘和用于测试电路的多个旁路焊盘。 外部焊盘被暴露，并且多个旁路焊盘中的至少一个不暴露于PCB的外表面。 还提供了使用电子设备的系统和测试电子设备的方法。

公开(公告)号：US20140347822A1

公开(公告)日：2014-11-27

申请号：US14223235

申请日：2014-03-24

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Masaaki MIZUSHIRO

IPC: H05K1/18 ,  H05K3/24 ,  H05K3/30

CPC classification number: H05K3/3494 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/185 ,  H05K3/243 ,  H05K3/244 ,  H05K3/284 ,  H05K3/3452 ,  H05K2201/099 ,  H05K2203/1105 ,  Y10T29/49144

Abstract: A module includes a wiring board; a plurality of mounting electrodes for component mounting, the mounting electrodes being disposed on one principal surface of the wiring board; a plurality of components mounted on the one principal surface of the wiring board and solder-connected to the mounting electrodes; a solder resist being a photosensitive resin configured to cover the one principal surface of the wiring board, with a plating electrode layer of each mounting electrode exposed; and a sealing resin layer disposed on the one principal surface of the wiring board, the sealing resin layer being configured to cover the photosensitive resin and the components connected to the mounting electrodes. A recess substantially wedge-shaped in cross section is provided at a boundary between the plating electrode layer of each mounting electrode and the solder resist, and the recess is filled with resin of the sealing resin layer.

Abstract translation: 模块包括布线板; 多个用于部件安装的安装电极，所述安装电极设置在所述布线板的一个主表面上; 安装在所述布线板的一个主表面上并与所述安装电极焊接连接的多个部件; 阻焊层，其被配置为覆盖所述布线板的所述一个主表面，并且每个安装电极的镀覆电极层露出; 以及密封树脂层，其设置在所述布线板的一个主表面上，所述密封树脂层被构造成覆盖所述感光性树脂和与所述安装电极连接的部件。 在每个安装电极的电镀电极层和阻焊剂之间的边界处设置横截面为大致楔形的凹部，并且该凹部填充有密封树脂层的树脂。

公开(公告)号：US20140202740A1

公开(公告)日：2014-07-24

申请号：US14224216

申请日：2014-03-25

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Takuya HANDO ,  Tatsuya ITO ,  Satoshi HIRANO ,  Atsuhiko SUGIMOTO

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/09

CPC classification number: H05K1/0298 ,  H01L21/4846 ,  H01L23/49822 ,  H01L2224/16225 ,  H05K1/09 ,  H05K1/111 ,  H05K1/113 ,  H05K3/0055 ,  H05K3/3452 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099

Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

Abstract translation: 在堆积步骤中，将多个树脂绝缘层和多个导电层以多层布置交替层叠在可分离地层叠在基材侧上的金属箔上，从而形成布线层压体部分。 在钻井工序中，通过激光钻孔在最外层的树脂绝缘层上形成多个开口，露出连接端子。 随后，在去污步骤中，去除开口内部的污迹。 在堆积步骤之后执行的基材除去步骤中，除去基材并暴露金属箔。

公开(公告)号：US20140191382A1

公开(公告)日：2014-07-10

申请号：US14133074

申请日：2013-12-18

Applicant: Sony Corporation

Inventor： Hiroshi Asami

IPC: H01L23/495 ,  H05K3/10 ,  H05K1/11

CPC classification number: H05K3/108 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/81 ,  H01L2224/73204 ,  H01L2924/12042 ,  H05K1/111 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3478 ,  H05K3/3484 ,  H05K2201/099 ,  H05K2201/10977 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A circuit substrate includes: a mounting region having an exposed surface that is planarized, and in which a predetermined chip is to be mounted; patterns provided in the mounting region, and including respective top faces that form a part of the exposed surface; and solder bumps provided on the respective patterns, and having substantially same shape as one another.

Abstract translation: 电路基板包括：具有被平坦化的暴露表面并且其中将安装预定芯片的安装区域; 设置在安装区域中的图案，并且包括形成暴露表面的一部分的相应顶面; 以及设置在各个图案上的焊料凸块，并且具有彼此基本相同的形状。

公开(公告)号：US20140153196A1

公开(公告)日：2014-06-05

申请号：US14091056

申请日：2013-11-26

Applicant: TDK Corporation

Inventor： Shuichi Takizawa ,  Kenichi Kawabata

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/09118 ,  H05K2201/099 ,  Y02P70/611

Abstract: An electronic module is provided with a circuit board 2, a chip component 3 surface-mounted on the circuit board 2 and a mold member 4 that seals the chip component 3. The circuit board 2 includes a land 7 and a resist pattern 8A that partially covers the land 7. The chip component 3 has a bottom electrode 6b and a side electrode 6c. The resist pattern 8A has an overlapped portion overlapped with the bottom electrode 6b of the chip component 3 in a planar view. A portion of the mold member 4 is filled at least in a first gap D1 between the resist pattern 8A and the first solder portion 10a.

Abstract translation: 电子模块设置有电路板2，表面安装在电路板2上的芯片部件3和密封芯片部件3的模具部件4.电路板2包括焊盘7和抗蚀剂图案8A，其部分地 芯片部件3具有底部电极6b和侧面电极6c。 抗蚀剂图案8A在平面图中具有与芯片部件3的底部电极6b重叠的重叠部分。 至少在抗蚀剂图案8A和第一焊料部分10a之间的第一间隙D1中填充模具构件4的一部分。

公开(公告)号：US20140146507A1

公开(公告)日：2014-05-29

申请号：US14045732

申请日：2013-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Won LEE

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/15311 ,  H05K3/3436 ,  H05K2201/0195 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

Abstract: In a circuit board for a semiconductor package, the contact pad of the circuit board is partially exposed through a contact hole and a subsidiary pad is provided around the contact hole in such a way that the contact hole is defined by the subsidiary pad. A subsidiary film having the subsidiary pad is provided on a mask pattern for protecting an internal circuit pattern and the contact pad from their surroundings. A contact terminal is provided on the subsidiary film in such a way that the contact hole is at least partially filled with the contact terminal and the subsidiary pad is covered with the contact terminal and an external body is bonded to the contact terminal. The contact area between the circuit board and the contact terminal is enlarged due to the subsidiary pad, thereby increasing the contact reliability of the semiconductor package.

Abstract translation: 在用于半导体封装的电路板中，电路板的接触焊盘通过接触孔部分暴露，并且辅助焊盘以接触孔由辅助焊盘限定的方式设置在接触孔周围。 具有辅助垫的辅助膜设置在掩模图案上，用于保护内部电路图案和接触垫与其周围。 接触端子设置在辅助膜上，使得接触孔至少部分地被接触端子填充，并且辅助垫被接触端子覆盖，并且外部主体结合到接触端子。 由于辅助焊盘，电路板和接触端子之间的接触面积扩大，从而增加了半导体封装的接触可靠性。

公开(公告)号：US20140144682A1

公开(公告)日：2014-05-29

申请号：US13891888

申请日：2013-05-10

Applicant: RF MICRO DEVICES, INC.

Inventor： John August Orlowski ,  Donald Joseph Leahy

IPC: H05K1/09 ,  H05K3/00

CPC classification number: H05K3/00 ,  H01L23/15 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81444 ,  H01L2224/81815 ,  H01L2924/181 ,  H05K3/244 ,  H05K3/3436 ,  H05K2201/0376 ,  H05K2201/099 ,  H05K2201/10674 ,  H05K2203/073 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01047

Abstract: An electronic substrate includes one or more conductive features. In order to preserve the performance and conductivity of the one or more conductive features, the exposed portions of the conductive features are deposited with a protective layer comprising a layer of silver, followed by a layer of gold. By covering the exposed portions of the conductive features of the electronic substrate with the protective layer, oxidation and exposure of the conductive features is prevented, thereby preserving the performance and conductivity of the copper features. Further, during a soldering process, the protective layer is substantially dissolved, thereby allowing the solder to join directly with the underlying conductive features and improving the performance of the electronic substrate.

Abstract translation: 电子基板包括一个或多个导电特征。 为了保持一个或多个导电特征的性能和导电性，导电特征的暴露部分被沉积有包含一层银的保护层，随后是一层金。 通过用保护层覆盖电子基板的导电特征的暴露部分，防止导电特征的氧化和曝光，从而保持铜特征的性能和导电性。 此外，在焊接工艺期间，保护层基本上溶解，从而允许焊料直接与下面的导电特征相结合并且改善了电子衬底的性能。