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    Miniaturized co-fired electrical interconnects for implantable medical devices
    162.
    发明申请
    Miniaturized co-fired electrical interconnects for implantable medical devices 审中-公开
    用于可植入医疗器械的小型化共烧电互连

    公开(公告)号：US20070060970A1

    公开(公告)日：2007-03-15

    申请号：US11227375

    申请日：2005-09-15

    Applicant: Jeremy Burdon ,  Joyce Yamamoto

    Inventor： Jeremy Burdon ,  Joyce Yamamoto

    IPC: A61N1/00

    CPC classification number: A61N1/3754 ,  H01L23/10 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09627 ,  H05K2201/09709 ,  H01L2924/00

    Abstract: The invention includes a family of miniaturized, hermetic electrical feedthrough assemblies adapted for implantation within a biological system. An electrical feedthrough assembly according to the invention can be used as a component of an implantable medical device (IMD) such as an implantable pulse generator, cardioverter-defibrillator, physiologic sensor, drug-delivery system and the like. Such assemblies require biocompatibility and resistance to degradation under applied bias current or voltage. Such an assembly is fabricated by interconnected electrical pathways, or vias, of a conductive metallic paste disposed between ceramic green-state material. The layers are stacked together and sintered to form a substantially monolithic dielectric structure with at least one embedded metallization pathway extending through the structure. The metallization pathway reliably conducts electrical signals even when exposed to body fluids and tissue and providing electrical communication between internal IMD circuitry and active electrical components and/or circuitry coupled to the exterior of an IMD.

    Abstract translation: 本发明包括一系列适于植入生物系统的小型化，密封电气馈通组件。 根据本发明的电馈通组件可以用作可植入医疗装置（IMD）的组件，例如可植入脉冲发生器，心律转复除颤器，生理传感器，药物递送系统等。 这样的组件需要在施加的偏置电流或电压下的生物相容性和耐劣化性。 这种组件由布置在陶瓷绿色材料之间的导电金属膏的互连电路或通路制成。 层叠在一起并烧结以形成具有延伸穿过该结构的至少一个嵌入金属化路径的基本上单片的电介质结构。 金属化路径即使暴露于体液和组织也可靠地传导电信号，并提供内部IMD电路与耦合到IMD外部的有源电气部件和/或电路之间的电气通信。

    Via connection structure with a compensative area on the reference plane
    163.
    发明申请
    Via connection structure with a compensative area on the reference plane 有权
    通过在参考平面上具有补偿区域的连接结构

    公开(公告)号：US20060226533A1

    公开(公告)日：2006-10-12

    申请号：US11103048

    申请日：2005-04-11

    Applicant: Shin-Shing Jiang ,  Sheng-Yuan Lee

    Inventor： Shin-Shing Jiang ,  Sheng-Yuan Lee

    IPC: H01L23/04

    CPC classification number: H01L23/66 ,  H01L23/49827 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0251 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/093 ,  H05K2201/09627 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2201/0979 ,  H01L2924/00

    Abstract: The invention discloses a via connection structure with compensative area on a reference plane. The substrate has several conductive layers isolated by the insulation layers. When two conductive lines formed on different conductive layers where a reference plane is sandwiched in, these two conductive lines are not electrical connected because of the insulation layers. Furthermore, a via connection structure is common used to connect these two conductive lines. When a non-conductive area, i.e. the compensative area, on the reference plane is overlapped with a portion of one conductive line and is close to the via connection structure, it compensates the capacitive effect of the via connection structure. By this compensative area and the variety of the via connection structure, the vertical connection between different layers has a well impedance-matched condition and transmits the signal correctly

    Abstract translation: 本发明公开了一种在参考平面上具有补偿区域的通孔连接结构。 衬底具有由绝缘层隔离的多个导电层。 当形成在不同导电层上的两个导线被夹在基准面上时，这两条导线由于绝缘层而不是电连接的。 此外，通常使用通孔连接结构来连接这两条导线。 当参考平面上的非导电区域（即，补偿区域）与一条导线的一部分重叠并且靠近通孔连接结构时，它补偿了通孔连接结构的电容效应。 通过该补偿区域和通孔连接结构的种类，不同层之间的垂直连接具有良好的阻抗匹配条件并正确传输信号

    Techniques for reducing the number of layers in a multilayer signal routing device
    166.
    发明授权
    Techniques for reducing the number of layers in a multilayer signal routing device 失效
    用于减少多层信号路由设备中的层数的技术

    公开(公告)号：US07069646B2

    公开(公告)日：2006-07-04

    申请号：US10407460

    申请日：2003-04-07

    Applicant: Guy M. A. F. Duxbury ,  Aneta Wyrzykowska ,  Luigi G. Difilippo ,  Herman Kwong

    Inventor： Guy M. A. F. Duxbury ,  Aneta Wyrzykowska ,  Luigi G. Difilippo ,  Herman Kwong

    IPC: H05K3/36

    CPC classification number: H05K1/115 ,  H05K1/0298 ,  H05K1/112 ,  H05K3/0005 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09627 ,  H05K2201/10734 ,  Y10T29/49016 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: Techniques for reducing the number of layers in a multilayer signal routing device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method wherein the multilayer signal routing device has a plurality of electrically conductive signal path layers for routing a plurality of electrical signals thereon. The method may comprise forming a plurality of electrically conductive vias in the multilayer signal routing device for electrically connecting at least two of the plurality of electrically conductive signal path layers, wherein the plurality of vias are arranged so as to form at least one channel in at least one other of the plurality of electrically conductive signal path layers. The method may also comprise grouping at least a portion of the plurality of electrical signals based at least in part upon their proximity to the at least one channel so that they may be efficiently routed therein.

    Abstract translation: 公开了用于减少多层信号路由设备中的层数的技术。 在一个特定的示例性实施例中，这些技术可以被实现为一种方法，其中多层信号路由设备具有用于在其上路由多个电信号的多个导电信号路径层。 所述方法可以包括在所述多层信号路由设备中形成多个导电通孔，用于电连接所述多个导电信号路径层中的至少两个，其中所述多个通孔被布置成在其中形成至少一个通道 多个导电信号路径层中的至少另一个。 该方法还可以包括至少部分地基于它们与至少一个信道的接近度来分组多个电信号的至少一部分，使得它们可以被有效地路由到其中。

    Circuitized substrate with improved impedance contol circuitry, method of making same, electrical assembly and information handling system utilizing same
    168.
    发明申请
    Circuitized substrate with improved impedance contol circuitry, method of making same, electrical assembly and information handling system utilizing same 有权
    具有改进的阻抗轮廓线路的电路化衬底，其制造方法，使用其的电气组装和信息处理系统

    公开(公告)号：US20060065433A1

    公开(公告)日：2006-03-30

    申请号：US10953923

    申请日：2004-09-29

    Applicant: Charles Danoski ,  Irving Memis ,  Steven Rosser

    Inventor： Charles Danoski ,  Irving Memis ,  Steven Rosser

    IPC: H05K7/06

    CPC classification number: H01L23/66 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/112 ,  H05K2201/093 ,  H05K2201/09627 ,  H05K2201/09663 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155

    Abstract: A circuitized substrate designed to substantially eliminate impedance disruptions during passage of signals through signal lines of the substrate's circuitry. The substrate includes a first conductive layer with a plurality of conductors on which an electrical component may be positioned and electrically coupled. The pads are coupled to signal lines (e.g., using thru-holes) further within the substrate and these signal lines are further coupled to a second plurality of conductive pads located even further within the substrate. The signal lines are positioned so as to lie between the substrate's first conductive layer and a voltage plane within a third conductive layer below the second conductive layer including the signal lines. A second voltage plane may be used adjacent the first voltage plane of the third conductive layer. Thru-holes may also be used to couple the signal lines coupled to the first conductors to a second plurality of conductors which form part of the third conductive layer. A method of making the substrate, and an electrical assembly and information handling system (e.g., computer) utilizing the substrate are also disclosed.

    Abstract translation: 电路化基板被设计为基本上消除信号通过基板电路的信号线时的阻抗中断。 衬底包括具有多个导体的第一导电层，电组件可以在其上定位和电耦合。 这些焊盘在衬底内进一步耦合到信号线（例如，使用通孔），并且这些信号线还被进一步耦合到位于衬底内的另外多个导电衬垫。 信号线被定位成位于衬底的第一导电层和位于包括信号线的第二导电层下面的第三导电层内的电压平面之间。 可以在第三导电层的第一电压平面附近使用第二电压平面。 通孔也可用于将耦合到第一导体的信号线耦合到形成第三导电层的一部分的第二多个导体。 还公开了制造衬底的方法，以及利用衬底的电组件和信息处理系统（例如，计算机）。

    Wiring board
    169.
    发明申请
    Wiring board 有权
    接线板

    公开(公告)号：US20060043572A1

    公开(公告)日：2006-03-02

    申请号：US10927134

    申请日：2004-08-27

    Applicant: Yasuhiro Sugimoto ,  Kazunaga Higo ,  Kazuhiro Suzuki

    Inventor： Yasuhiro Sugimoto ,  Kazunaga Higo ,  Kazuhiro Suzuki

    IPC: H01L29/40

    CPC classification number: H01L23/66 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/09627 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2201/09809

    Abstract: A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via conductors as defined herein; a signal through-hole as defined herein; a signal through-hole conductor as defined herein; a first path end pad as defined herein; a second path end pad as defined herein; a shield through-hole as defined herein; and a shield through-hole conductor as defined herein; wherein: a signal transmission path is formed as defined herein; at least one of said conductor layers is disposed on each of said first and second main surface sides; said surface conductor on said first main surface side and said conductor line form a strip line, a microstrip line, or a coplanar waveguide with constant characteristic impedance Z0; an inner surface of said shield through-hole is covered with said shield through-hole conductor; and an interaxis distance between said signal through-hole conductor and said shield through-hole conductor is adjusted as defined herein.

    Abstract translation: 一种布线板，包括：板芯，具有第一主表面和第二主表面; 包括导体线的导体层; 电介质层与所述导体层交替地层叠在所述第一和第二主表面中的至少一个上; 通孔导体; 如本文所定义的信号通孔; 如本文所定义的信号通孔导体; 如本文所定义的第一路径端垫; 如本文所定义的第二路径端垫; 如本文所定义的屏蔽通孔; 和如本文所定义的屏蔽通孔导体; 其中：如本文所定义的形成信号传输路径; 所述导体层中的至少一个设置在所述第一和第二主表面侧的每一个上; 所述第一主表面侧的所述表面导体和所述导体线形成具有恒定特性阻抗Z0的带状线，微带线或共面波导; 所述屏蔽通孔的内表面被所述屏蔽通孔导体覆盖; 并且如本文所定义的那样调节所述信号通孔导体和所述屏蔽通孔导体之间的间隔距离。

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