公开(公告)号：US07765692B2

公开(公告)日：2010-08-03

申请号：US12237955

申请日：2008-09-25

Applicant: Masaru Takada ,  Hiroyuki Kobayashi ,  Kenji Chihara ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Mitsuhiro Kondo

Inventor： Masaru Takada ,  Hiroyuki Kobayashi ,  Kenji Chihara ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Mitsuhiro Kondo

IPC: H01K3/10 ,  B28B19/00

CPC classification number: H01L24/32 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/112 ,  H05K1/116 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/027 ,  H05K3/242 ,  H05K3/243 ,  H05K3/28 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4038 ,  H05K3/421 ,  H05K3/428 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09381 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/0959 ,  H05K2201/09781 ,  H05K2203/0554 ,  H05K2203/0571 ,  H05K2203/107 ,  H05K2203/175 ,  Y10S428/901 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.

Abstract translation: 在具有导体电路（6）的绝缘板（7）的表面上印刷包括热固性树脂的阻焊剂。 然后将阻焊剂热固化以形成具有低热膨胀系数的绝缘膜（1）。 然后将激光束（2）施加到要形成开口的绝缘膜的部分，以烧掉用于形成开口（10）的相同部分，由此导体电路（6）暴露。 该开口可以通过在其内表面上形成金属电镀膜而形成为导电孔。 优选地，形成外部连接垫以覆盖开口。 通过使用在电镀完成后优选用激光束切断的电镀铅来形成金属涂膜。

公开(公告)号：US07755203B2

公开(公告)日：2010-07-13

申请号：US11708027

申请日：2007-02-20

Applicant: Takao Nishimura ,  Kazuyuki Aiba

Inventor： Takao Nishimura ,  Kazuyuki Aiba

IPC: H01L29/00

CPC classification number: H01L21/563 ,  H01L23/49838 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75743 ,  H01L2224/83096 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/83855 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/28 ,  H05K3/305 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/09909 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/00012 ,  H01L2924/3512

Abstract: A circuit substrate for improving the reliability and productivity of a semiconductor device, and that semiconductor device. In a circuit substrate to which a semiconductor element is to be flip-chip mounted, at least one island-shaped electrically conductive layer is selectively disposed together with a wiring layer at an element mounting area where the semiconductor element is to be mounted, and an insulating resin layer is disposed over the island-shaped electrically conductive layer. The semiconductor element is secured at the element mounting area to the circuit substrate by an adhesion material to make a semiconductor device. With this, delaminating of the wiring layer inside the semiconductor device is suppressed, and the damage of an electrode is suppressed. The circuit substrate has high reliability and the semiconductor device, having the circuit substrate, is implemented.

Abstract translation: 一种用于提高半导体器件的可靠性和生产率的电路基板，以及该半导体器件。 在半导体元件将要倒装芯片安装的电路基板中，至少一个岛状导电层与要安装半导体元件的元件安装区域的布线层一起选择性地布置，并且 绝缘树脂层设置在岛状导电层上。 半导体元件通过粘合材料固定在元件安装区域到电路基板以制造半导体器件。 由此，能够抑制半导体装置内的布线层的分层，抑制电极的损伤。 电路基板具有高可靠性，并且实现了具有电路基板的半导体器件。

公开(公告)号：US20100136803A1

公开(公告)日：2010-06-03

申请号：US12573979

申请日：2009-10-06

Applicant: Hidehiro NAKAMURA

Inventor： Hidehiro NAKAMURA

IPC: H01R12/00 ,  B32B37/12

CPC classification number: H05K1/142 ,  H05K1/147 ,  H05K3/365 ,  H05K2201/09781 ,  H05K2201/10681 ,  Y10T156/10

Abstract: There is provided a wiring board insertion connector having only a small restriction on the structure of a wiring board to be inserted to the connector, having high connection reliability such as high durability against repetitive insertion and pullout, and having a relatively simple structure.The wiring board insertion connector includes: a first substrate; a second substrate; a spacer layer that is located between the first substrate and the second substrate; and openings for accommodating a wiring board at predetermined positions in the spacer layer. The first substrate has a wiring layer, a deformable layer, a rigid layer, and a resin layer formed in this order from the side of the spacer layer. The rigid layer has window portions formed at the regions corresponding to the openings, when seen from a thickness direction of the connector. The wiring layer extends at least to the regions corresponding to the window portions when seen from the thickness direction of the connector, the wiring layer protruding toward opening regions at the window portions.

Abstract translation: 提供了一种布线板插入连接器，其对插入连接器的布线板的结构只有很小的限制，具有高的连续可靠性，例如对重复插入和拔出的高耐久性，并且具有相对简单的结构。 布线板插入连接器包括：第一基板; 第二基板; 位于所述第一基板和所述第二基板之间的间隔层; 以及用于将布线板容纳在间隔层中的预定位置的开口。 第一基板具有布线层，可变形层，刚性层和从间隔层的侧面依次形成的树脂层。 当从连接器的厚度方向看时，刚性层具有形成在与开口对应的区域处的窗口部分。 当从连接器的厚度方向看时，布线层至少延伸到对应于窗口部分的区域，布线层朝窗口部分的开口区域突出。

公开(公告)号：US07719124B2

公开(公告)日：2010-05-18

申请号：US11938635

申请日：2007-11-12

Applicant: Hideki Takahashi

Inventor： Hideki Takahashi

IPC: H01L23/544

CPC classification number: H05K1/0269 ,  H05K3/0008 ,  H05K3/1216 ,  H05K3/303 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/09918 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49144

Abstract: A printed wiring board is disclosed. The printed wiring board includes a board recognition mark formed of a conductive foil, a first component land covered with resist, and a second component land not covered with the resist. The board recognition mark is defined by an area of the conductive foil exposed from a resist opening having the same shape and size as the conductive foil.

Abstract translation: 公开了一种印刷线路板。 印刷电路板包括由导电箔形成的板识别标记，被抗蚀剂覆盖的第一部件焊盘和未被抗蚀剂覆盖的第二部件焊盘。 板识别标记由从具有与导电箔相同的形状和尺寸的抗蚀剂开口暴露的导电箔的区域限定。

公开(公告)号：US07708856B2

公开(公告)日：2010-05-04

申请号：US10595550

申请日：2003-12-05

Applicant: Govindarajan Natarajan ,  Raschid J. Bezama

Inventor： Govindarajan Natarajan ,  Raschid J. Bezama

IPC: B32B38/04 ,  C03B29/00

CPC classification number: B32B18/00 ,  C04B35/645 ,  C04B2237/32 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/561 ,  C04B2237/562 ,  C04B2237/565 ,  C04B2237/567 ,  C04B2237/62 ,  C04B2237/64 ,  C04B2237/66 ,  C04B2237/702 ,  H01L21/4857 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09781 ,  Y10T156/108 ,  Y10T428/24926

Abstract: A method to control the post sinter distortion of hot pressing sintered multilayer ceramic laminate by placing a non-densifying structure in the green ceramic laminate prior to sintering. One or more non-densifying structures are placed on one or more ceramic greensheets which are then stacked and laminated to form a green ceramic laminate. The laminate is then sintered and the non-densifying structure will control the dimensions of the hot pressed multilayer ceramic substrate. The method can be used to control post sinter dimensions in MLC substrates manufactured as either single or multi-up substrates by placing the non-densifying structure in the kerf area between the individual product ups prior to sintering.

Abstract translation: 一种通过在烧结之前在生坯陶瓷层压板中放置非致密化结构来控制热压烧结多层陶瓷层压体的烧结后变形的方法。 将一个或多个非致密结构放置在一个或多个陶瓷刮板上，然后将其堆叠并层压以形成生坯陶瓷层压板。 然后将层压体烧结，并且非致密化结构将控制热压多层陶瓷基板的尺寸。 该方法可用于控制通过在烧结之前将非致密化结构放置在各个产品之间的切口区域中，将MLC衬底中的烧结后尺寸制作为单层或多层衬底。

公开(公告)号：USRE41242E1

公开(公告)日：2010-04-20

申请号：US10850584

申请日：1998-09-28

Applicant: Motoo Asai ,  Yoji Mori

Inventor： Motoo Asai ,  Yoji Mori

IPC: H05K1/14

CPC classification number: H01L23/50 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15173 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/114 ,  H05K1/116 ,  H05K3/3457 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09627 ,  H05K2201/09781 ,  H05K2201/10734 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

Abstract: According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 μm in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 μm in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.

Abstract translation: 根据本发明的封装板，形成在其上安装有IC芯片的封装板的顶表面上的每个焊盘的直径小（133至170μm），所以金属部分被 封装板表面上的焊盘也很小。 另一方面，形成在其上安装有母板等的封装基板的底面上的每个焊盘的直径大（直径为600μm），因此焊盘上的金属部分 封装板的表面也很大。 因此，在导体电路58U和58U之间形成虚设图形58M，用于在封装板的IC芯片侧表面上形成信号线，从而增加表面上的金属部分，并调节IC芯片侧之间的金属部分的速率 和封装板的母板侧，保护封装板在制造过程中以及在运行期间不发生翘曲。

公开(公告)号：US07691662B2

公开(公告)日：2010-04-06

申请号：US11703699

申请日：2007-02-08

Applicant: Toru Okada ,  Masanao Fujii ,  Yutaka Noda

Inventor： Toru Okada ,  Masanao Fujii ,  Yutaka Noda

IPC: H01L21/00

CPC classification number: H05K3/303 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/148 ,  H01L31/0203 ,  H05K3/3494 ,  H05K2201/09781 ,  H05K2201/10121 ,  H05K2201/10727 ,  H05K2203/0195 ,  H05K2203/082 ,  H05K2203/111 ,  Y02P70/613

Abstract: An optical module is produced by coating, with respect to a substrate having a substrate surface provided with terminal pads and landing pads a solder material on the terminal pads, mounting an optical element package having terminals and a flat top surface on the substrate using the landing pads so that the top surface becomes approximately parallel to the substrate surface and a gap is formed between a bottom surface of the optical element package and the substrate surface, preheating the terminal pads simultaneously as the mounting, and electrically connecting the terminal pads to corresponding terminals of the optical element package by melting the solder material and thereafter hardening the solder material.

Abstract translation: 通过涂覆相对于具有设置有端子焊盘和着陆焊盘的衬底的衬底的衬底，通过涂覆在端子焊盘上的焊料材料，使用着陆层将具有端子的光学元件封装和平坦顶表面安装在衬底上来制造光学模块 衬垫，使得顶表面变得大致平行于衬底表面，并且在光学元件封装的底表面和衬底表面之间形成间隙，同时预热端子焊盘作为安装，并且将端子焊盘电连接到相应的端子 通过熔化焊料材料，然后硬化焊料材料。

公开(公告)号：US20100078200A1

公开(公告)日：2010-04-01

申请号：US12242408

申请日：2008-09-30

Applicant: Jr-Yi SHEN

Inventor： Jr-Yi SHEN

IPC: H05K1/00 ,  C23F1/02

CPC classification number: H05K1/028 ,  H05K3/281 ,  H05K3/386 ,  H05K2201/09727 ,  H05K2201/09781

Abstract: A flex circuit comprises a base film, a first adhesive layer coupled with the base film, at least two signal traces coupled with the first adhesive layer, and at least one dummy trace positioned between the two signal traces and coupled with the first adhesive layer. The flex circuit comprises a second adhesive layer coupled with the signal traces, the dummy trace, and the first adhesive layer, and a cover film coupled with the second adhesive layer.

Abstract translation: 柔性电路包括基膜，与基膜结合的第一粘合剂层，与第一粘合剂层耦合的至少两个信号迹线以及位于两个信号迹线之间并与第一粘合剂层耦合的至少一个虚拟迹线。 柔性电路包括与信号迹线，虚拟迹线和第一粘合剂层耦合的第二粘合剂层和与第二粘合剂层耦合的覆盖膜。

公开(公告)号：US07674984B2

公开(公告)日：2010-03-09

申请号：US11426399

申请日：2006-06-26

Applicant: Tomoyuki Kubo

Inventor： Tomoyuki Kubo

IPC: H05K1/00

CPC classification number: B41J2/14072 ,  H05K1/0271 ,  H05K1/189 ,  H05K3/245 ,  H05K3/3457 ,  H05K2201/035 ,  H05K2201/09781 ,  H05K2201/10681 ,  H05K2201/10689 ,  H05K2201/2009 ,  Y10T428/24917

Abstract: In order to prevent stress caused by bending a flexible wiring board from being applied to the connection section between the flexible wiring board and a driving IC, solder is deposited as a reinforcement member, on both sides of the driving IC connected onto the flexible wiring board.

Abstract translation: 为了防止弯曲柔性布线板施加到柔性布线板和驱动IC之间的连接部分上的应力引起的焊料作为加强件沉积在连接到柔性布线板上的驱动IC的两侧 。

公开(公告)号：US20100052802A1

公开(公告)日：2010-03-04

申请号：US12584192

申请日：2009-09-01

Applicant: Junichi Arai

Inventor： Junichi Arai

IPC: H03B1/00

CPC classification number: H03L1/04 ,  H05K1/0206 ,  H05K1/0212 ,  H05K2201/09781 ,  H05K2201/10022 ,  H05K2201/10075 ,  H05K2201/10462 ,  H05K2201/10545 ,  H05K2203/165

Abstract: A constant-temperature type crystal oscillator includes: a crystal unit that is installed on one principal surface of a circuit substrate, and chip resistors, which function as heating elements, and which are installed on the other principal surface of the circuit substrate so as to face a principal surface of the crystal unit, the chip resistors heating up the crystal unit to keep an operational temperature of the crystal unit constant. A heating metal film facing the principal surface of the crystal unit is provided on the one principal surface of the circuit substrate. A heat conducting material is interposed between the principal surface of the crystal unit and the heating metal film to perform thermal coupling therebetween. The heating metal film is thermally coupled to electrode terminals of the chip resistors via a plurality of electrode through holes.

Abstract translation: 恒温型晶体振荡器包括：安装在电路基板的一个主表面上的晶体单元和用作加热元件的片式电阻器，并且安装在电路基板的另一个主表面上，以便 面对晶体单元的主表面，芯片电阻加热晶体单元以保持晶体单元的工作温度恒定。 在电路基板的一个主表面上设置面对晶体单元的主表面的加热金属膜。 导热材料插入在晶体单元的主表面和加热金属膜之间，以在它们之间进行热耦合。 加热金属膜通过多个电极通孔热耦合到芯片电阻器的电极端子。