公开(公告)号：US09585263B2

公开(公告)日：2017-02-28

申请号：US14515152

申请日：2014-10-15

Applicant: Continental Automotive Systems, Inc.

Inventor： Jennifer L. Matoy

IPC: H05K5/00 ,  H05K3/32 ,  H01R12/55 ,  H05K3/40 ,  H01R12/58

CPC classification number: H05K5/0069 ,  H01R12/55 ,  H01R12/58 ,  H05K3/325 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/1034 ,  H05K2201/10446 ,  H05K2201/1059

Abstract: A printed circuit board assembly includes a printed circuit board (PCB) having an end. The end includes surfaces defining a plurality of electrically conductive notches therein. A plurality of electrically conductive pins is provided with each pin being received in an associated notch in a press-fitted manner so as to make electrical connection with the PCB.

Abstract translation: 印刷电路板组件包括具有端部的印刷电路板（PCB）。 端部包括在其中限定多个导电凹口的表面。 多个导电销设置有每个销以压配合方式容纳在相关联的切口中，以便与PCB电连接。

公开(公告)号：US20160087583A1

公开(公告)日：2016-03-24

申请号：US14848772

申请日：2015-09-09

Applicant: Seiko Epson Corporation

Inventor： Yoshiaki Matsumoto

IPC: H03B5/36 ,  H05K1/02

CPC classification number: H03B5/368 ,  H03B5/36 ,  H03B2200/0026 ,  H05K1/0215 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/10075

Abstract: An oscillator includes a circuit board including a supporting substrate (base member), a first VCXO (a first oscillator circuit), a second VCXO (a second oscillator circuit), and a ground terminal (terminal for ground). The first VCXO and the second VCXO are configured such that a second output frequency that is output from the second VCXO is higher than a first output frequency that is output from the first VCXO. The second VCXO is placed closer to the ground terminal than the first VCXO.

Abstract translation: 振荡器包括电路板，其包括支撑基板（基底构件），第一VCXO（第一振荡电路），第二VCXO（第二振荡电路）和接地端子（接地端子）。 第一VCXO和第二VCXO被配置为使得从第二VCXO输出的第二输出频率高于从第一VCXO输出的第一输出频率。 第二个VCXO比第一个VCXO更靠近接地终端。

公开(公告)号：US09215802B2

公开(公告)日：2015-12-15

申请号：US14234604

申请日：2012-12-25

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Jyun Suzuki ,  Naoki Kito ,  Masami Hasegawa ,  Chizuo Nakashima

IPC: H05K1/00 ,  H05K1/03 ,  H05K3/00 ,  H05K1/18 ,  H05K3/40

CPC classification number: H05K1/0306 ,  H05K1/183 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/0909 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09354

Abstract: A wiring substrate includes a substrate body formed of a plate-like ceramic, having a front surface, a back surface, and a height of 0.8 mm or less; a cavity opening at the front surface and having a rectangular shape as viewed in plane; and side walls having a thickness of 0.3 mm or less between a side surface of the cavity and a side surface of the substrate body. The wiring substrate further includes an electrically conductive layer having the form of a frame and formed on the front surface to surround an opening of the cavity; a ceramic surface having the form of a frame and located adjacently to the electrically conductive layer and along the outer periphery of the front surface; and a via conductor formed in the substrate body along the side surface of the cavity between a bottom surface of the cavity and the front surface.

Abstract translation: 布线基板包括由板状陶瓷形成的基板主体，具有前表面，背面和0.8mm以下的高度; 在前表面开口的空腔，在平面上具有矩形形状; 以及在空腔的侧表面和基板主体的侧表面之间具有0.3mm或更小的厚度的侧壁。 布线基板还包括具有框架形式并形成在前表面上以包围空腔的开口的导电层; 陶瓷表面，其具有框架的形式并且与导电层相邻并且沿着前表面的外周定位; 以及形成在所述基板主体中的所述通孔导体，其沿​​着所述空腔的底表面和所述前表面之间的所述空腔的侧表面。

公开(公告)号：US09173292B1

公开(公告)日：2015-10-27

申请号：US13385859

申请日：2012-03-09

Applicant: Sergey Sokol ,  Ekrem Oran

Inventor： Sergey Sokol ,  Ekrem Oran

IPC: H05K1/11 ,  H05K3/32

CPC classification number: H05K1/117 ,  H05K1/0219 ,  H05K1/025 ,  H05K3/32 ,  H05K2201/09181 ,  H05K2201/09336 ,  H05K2201/09727 ,  H05K2201/10189 ,  H05K2201/10446

Abstract: An edge launch and fabrication method wherein spaced elongated slots are formed through a circuit board. The slots are plated at least along one side thereof connecting ground planes of the circuit board thus forming spaced edge plated regions. Circuit modules are produced by singulating the circuit board along a cut line offset outwardly from the plated slot sides to form an edge launch outwardly extending from and between the spaced edge plated regions.

Abstract translation: 边缘发射和制造方法，其中间隔的细长槽通过电路板形成。 这些槽至少沿着连接电路板的接地平面的一侧进行电镀，从而形成间隔开的边缘电镀区域。 电路模块通过沿着从电镀槽侧向外偏移的切割线分割电路板而产生，以形成从间隔边缘镀覆区域之间向外延伸的边缘发射。

公开(公告)号：US09148066B2

公开(公告)日：2015-09-29

申请号：US13567527

申请日：2012-08-06

Applicant: Lien-Hsing Chen ,  Li-Hao Liu ,  Cheng-Te Tsai

Inventor： Lien-Hsing Chen ,  Li-Hao Liu ,  Cheng-Te Tsai

IPC: H01F5/00 ,  H02M7/00 ,  H01F27/29 ,  H02M3/00 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H01F27/40 ,  H05K3/40

CPC classification number: H02M7/003 ,  H01F5/00 ,  H01F27/292 ,  H01F27/402 ,  H01F2027/297 ,  H02M3/00 ,  H05K1/144 ,  H05K1/145 ,  H05K1/148 ,  H05K1/18 ,  H05K1/189 ,  H05K3/3405 ,  H05K3/3447 ,  H05K3/403 ,  H05K2201/042 ,  H05K2201/047 ,  H05K2201/09181 ,  H05K2201/1003

Abstract: A miniaturized voltage-transforming device includes a first circuit board and a second circuit board parallel to and separated from each other by a predetermined distance so that there is no physical connection therebetween, and a transformer having a plurality of primary-side pins and a plurality of secondary-side pins, wherein the transformer is located beside the first circuit board and the second circuit board, and has its primary-side pins and secondary-side pins directly or indirectly connected to the first circuit board and the second circuit board physically, so that the transformer is electrically connected to the first circuit board and the second circuit board via the primary-side pins and the secondary-side pins.

Abstract translation: 小型化电压转换装置包括第一电路板和彼此平行并分离预定距离的第二电路板，使得它们之间不存在物理连接，以及具有多个初级侧引脚和多个 其中所述变压器位于所述第一电路板和所述第二电路板旁边，并且其初级侧引脚和次级侧引脚在物理上直接或间接地连接到第一电路板和第二电路板， 使得变压器经由初级侧引脚和次级侧引脚电连接到第一电路板和第二电路板。

公开(公告)号：US09147099B2

公开(公告)日：2015-09-29

申请号：US14247137

申请日：2014-04-07

Applicant: SYNAPTICS INCORPORATED

Inventor： Armando Leon Perezselsky ,  Richard Brian Nelson

IPC: G06K9/00 ,  H01L23/498 ,  H05K1/02 ,  H01L23/48 ,  H01L23/60 ,  H05K1/14 ,  H05K3/00

CPC classification number: G06K9/00053 ,  G06K9/0002 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/60 ,  H01L2924/0002 ,  H05K1/0259 ,  H05K1/141 ,  H05K3/0052 ,  H05K2201/09181 ,  H05K2201/10151 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A biometric sensor apparatus and method are disclosed, which may comprise a flexible substrate comprising a first side surface and a second side surface opposing the first side surface; a biometric sensor portion comprising biometric image sensing elements formed on the second side surface forming at least part of a biometric sensor array sensing capacitively induced changes induced by a biometric in the vicinity of the biometric image sensing elements; a biometric sensor controller integrated circuit mounted to the flexible substrate on one of the first side surface and the second side surface of the flexible substrate; an edge surface of the flexible substrate including at least one conductively plated perforation in the flexible substrate; and an electro-static discharge element formed on or as part of the flexible substrate and electrically connected to the at least one conductively plated perforation.

Abstract translation: 公开了一种生物测定传感器装置和方法，其可以包括柔性基板，该柔性基板包括第一侧表面和与第一侧表面相对的第二侧表面; 生物测定传感器部分包括形成在所述第二侧表面上的生物测定图像感测元件，其形成生物测定传感器阵列的至少一部分，以感测由所述生物测定图像感测元件附近的生物特征引起的电容诱导变化; 生物传感器控制器集成电路，其安装在所述柔性基板的所述柔性基板的所述第一侧表面和所述第二侧表面之一上; 所述柔性基板的边缘表面包括在所述柔性基板中的至少一个导电电镀穿孔; 以及形成在所述柔性基板上或作为所述柔性基板的一部分并电连接到所述至少一个导电电镀穿孔的静电放电元件。

公开(公告)号：US20150262753A1

公开(公告)日：2015-09-17

申请号：US14726785

申请日：2015-06-01

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kazuo HATTORI ,  Isamu FUJIMOTO

IPC: H01G2/06 ,  H05K1/18 ,  H01G4/12

CPC classification number: H01G2/065 ,  H01G2/06 ,  H01G4/12 ,  H05K1/141 ,  H05K1/181 ,  H05K3/3442 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: A multilayer ceramic capacitor includes flat inner electrodes that are laminated on each other. An interposer includes a substrate that is larger than the multilayer ceramic capacitor. A first mounting electrode to mount the multilayer ceramic capacitor is located on a first principal surface of the substrate, and a first external connection electrode for connection to an external circuit board is located on a second principal surface. A recess is located in a side surface of the interposer. A connecting conductor is located in the wall surface of the recess. The connecting conductor is located at a position spaced apart by a predetermined distance from the side surface of the interposer.

Abstract translation: 多层陶瓷电容器包括彼此层叠的平坦的内部电极。 插入器包括比多层陶瓷电容器大的衬底。 安装多层陶瓷电容器的第一安装电极位于基板的第一主表面上，并且用于连接到外部电路板的第一外部连接电极位于第二主表面上。 凹槽位于插入器的侧表面中。 连接导体位于凹部的壁表面中。 连接导体位于与插入件的侧表面间隔开预定距离的位置处。

公开(公告)号：US09032617B2

公开(公告)日：2015-05-19

申请号：US13326845

申请日：2011-12-15

Applicant: David J. Braun ,  Mark G. Clark ,  John R. Dangler ,  Matthew S. Doyle ,  Thomas D. Kidd ,  Jason T. Stoll

Inventor： David J. Braun ,  Mark G. Clark ,  John R. Dangler ,  Matthew S. Doyle ,  Thomas D. Kidd ,  Jason T. Stoll

IPC: H01R12/61 ,  H01R12/79 ,  H05K3/36 ,  H05K1/02 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H01R12/52 ,  H01R12/77

CPC classification number: H01R43/01 ,  H01R12/52 ,  H01R12/613 ,  H01R12/778 ,  H01R12/79 ,  H05K1/0219 ,  H05K1/118 ,  H05K1/147 ,  H05K1/189 ,  H05K3/3447 ,  H05K3/36 ,  H05K3/363 ,  H05K2201/041 ,  H05K2201/058 ,  H05K2201/09181 ,  H05K2201/09618 ,  H05K2201/10189 ,  Y10T29/49174 ,  Y10T29/49194 ,  Y10T29/4922

Abstract: A cable assembly for interconnecting a plurality of circuit boards together by using a connector assembly connected to each of the circuit boards. The cable assembly includes a first cable having a first end part and a second cable having a second end part. A first periphery of the first end part has a plurality of first half vias that collectively form a column along a width direction of the connector assembly. A second periphery of the second end part has a plurality of second half vias that collectively form a column along the width direction of the connector assembly. The first and second end parts are coupled together to form a connecting unit, such that the first half vias and the second half vias are joined together to form full vias.

Abstract translation: 一种电缆组件，用于通过连接到每个电路板的连接器组件将多个电路板互连在一起。 电缆组件包括具有第一端部的第一电缆和具有第二端部的第二电缆。 第一端部的第一周边具有沿着连接器组件的宽度方向共同形成列的多个第一半通孔。 第二端部的第二周边具有沿着连接器组件的宽度方向共同形成列的多个第二半通孔。 第一和第二端部联接在一起以形成连接单元，使得第一半通孔和第二半通孔连接在一起以形成完整的通孔。

公开(公告)号：US08952518B2

公开(公告)日：2015-02-10

申请号：US14006527

申请日：2012-07-20

Applicant: Mahiro Tsujino ,  Manabu Miyahara

Inventor： Mahiro Tsujino ,  Manabu Miyahara

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/057 ,  H01L23/10

CPC classification number: H01L24/42 ,  H01L23/057 ,  H01L23/10 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/16195 ,  H01L2924/16251 ,  H01L2924/171 ,  H05K3/3442 ,  H05K2201/09172 ,  H05K2201/09181 ,  H05K2201/09409 ,  H05K2201/09909 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device housing package includes a base body having, on its upper surface, a mounting region of a semiconductor device; a frame body having a frame-like portion disposed on the upper surface of the base body, surrounding the mounting region, and an opening penetrating through from an inner side of the frame-like portion to an outer side thereof; a flat plate-like insulating member disposed in the opening, extending from an interior of the frame body to an exterior thereof; wiring conductors disposed on an upper surface of the insulating member, extending from the interior of the frame body to the exterior thereof; and a metallic film disposed on a part of the upper surface of the insulating member, the metallic film lying outside the frame body surrounding the wiring conductors.

Abstract translation: 半导体器件壳体封装包括：基体，其上表面具有半导体器件的安装区域; 框架体，其具有设置在基体的上表面上的框状部分，围绕安装区域，以及从框状部分的内侧穿过其外侧的开口; 设置在所述开口中的平板状绝缘构件，从所述框体的内部延伸到其外部; 布线导体设置在绝缘构件的上表面上，从框体的内部延伸到其外部; 以及设置在所述绝缘构件的上表面的一部分上的金属膜，所述金属膜位于围绕所述布线导体的框架体的外侧。

公开(公告)号：US08829362B2

公开(公告)日：2014-09-09

申请号：US13571145

申请日：2012-08-09

Applicant: Satoshi Masuda

Inventor： Satoshi Masuda

IPC: H05K1/11 ,  H01L23/66 ,  H01L23/367 ,  H01L25/07 ,  H01L23/498 ,  H01L23/50

CPC classification number: H01L23/3677 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/66 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2924/1423 ,  H01L2924/15157 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/021 ,  H05K1/0215 ,  H05K1/0243 ,  H05K3/4629 ,  H05K2201/09181 ,  H05K2201/10416 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An electronic device including a first ground conductor layer positioned at an underside of a first insulation layer; a second ground conductor layer positioned at an upper side of the first insulation layer; a second insulation layer positioned at an upper side of the second ground conductor layer; a first connection pattern formed on an inside wall of a first opening penetrating the first insulation layer and the second insulation layer and interconnecting the first ground conductor layer and the second ground conductor layer; a conductive member provided in the first opening and connected to the first ground conductor layer; and an electronic element mounted on the member and grounded to the member.

Abstract translation: 一种电子设备，包括位于第一绝缘层下侧的第一接地导体层; 位于所述第一绝缘层的上侧的第二接地导体层; 位于所述第二接地导体层的上侧的第二绝缘层; 形成在穿过所述第一绝缘层的第一开口和所述第二绝缘层的内壁上并且互连所述第一接地导体层和所述第二接地导体层的第一连接图案; 导电构件，设置在所述第一开口中并连接到所述第一接地导体层; 以及安装在构件上并接地到构件的电子元件。