公开(公告)号：US09560739B2

公开(公告)日：2017-01-31

申请号：US14376744

申请日：2013-04-10

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Tomohiro Nishida ,  Seiji Mori ,  Makoto Wakazono

IPC: H05K1/02 ,  H05K3/34 ,  H05K3/28 ,  H01L23/498 ,  H05K3/24 ,  H05K1/11

CPC classification number: H05K1/0213 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/244 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2203/0571 ,  H05K2203/0588 ,  H01L2924/00012 ,  H01L2924/00

Abstract: To provide a wiring substrate which can prevent short circuit between connection terminals, and which realizes reduction of the pitch between the connection terminals. The wiring substrate of the present invention includes a layered structure including one or more insulation layers and one or more conductor layers, and the wiring substrate is characterized in that a plurality of connection terminals are formed on the layered structure so as to be separated from one another; a filling member is filled between the connection terminals; and each of the connection terminals has a side surface composed of a contact surface which is in contact with the filling member, and a spaced surface which is not in contact with the filling member and which is located above the contact surface and below the top surface of the filling member.

Abstract translation: 为了提供能够防止连接端子之间短路的布线基板，实现了连接端子间的间距的减小。 本发明的布线基板包括具有一个或多个绝缘层和一个或多个导体层的层状结构，并且布线基板的特征在于，在层叠结构上形成多个连接端子以与其分离 另一个; 填充构件填充在连接端子之间; 并且每个连接端子具有由与填充构件接触的接触表面构成的侧表面和与填充构件不接触并且位于接触表面上方并在顶表面下方的间隔表面 的填充构件。

公开(公告)号：US20170018535A1

公开(公告)日：2017-01-19

申请号：US15262304

申请日：2016-09-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Guk Han ,  Seok-Joon Moon ,  Beom-jun Jin

IPC: H01L25/065 ,  G11C5/06 ,  H01L21/66 ,  H01L23/00 ,  H05K1/11 ,  H05K1/18

CPC classification number: H01L25/0657 ,  G01R31/2808 ,  G01R31/2818 ,  G11C5/02 ,  G11C5/025 ,  G11C5/06 ,  G11C29/04 ,  G11C29/12 ,  G11C29/56 ,  G11C29/56016 ,  G11C2029/5602 ,  H01L22/30 ,  H01L22/32 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/538 ,  H01L24/09 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0912 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/181 ,  H05K1/0268 ,  H05K1/111 ,  H05K1/117 ,  H05K1/181 ,  H05K3/002 ,  H05K3/245 ,  H05K3/28 ,  H05K3/288 ,  H05K3/323 ,  H05K2201/0187 ,  H05K2201/035 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/099 ,  H05K2201/10159 ,  H05K2203/162 ,  Y10T29/49117 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.

Abstract translation: 提供具有印刷电路板的电子设备。 在一个实施例中，印刷电路板包括要与外部装置耦合的多个外部焊盘和用于测试电路的多个旁路焊盘。 外部焊盘被暴露，并且多个旁路焊盘中的至少一个不暴露于PCB的外表面。 还提供了使用电子设备的系统和测试电子设备的方法。

公开(公告)号：US20170013713A1

公开(公告)日：2017-01-12

申请号：US15274363

申请日：2016-09-23

Applicant: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC

Inventor： Kedar G. Shah ,  Satinderpall S. Pannu ,  Vanessa Tolosa ,  Angela C. Tooker ,  Heeral J. Sheth ,  Sarah H. Felix ,  Terri L. Delima

IPC: H05K1/11 ,  H05K3/40 ,  A61N1/05 ,  H05K3/20 ,  H05K3/12 ,  H05K1/09 ,  H05K3/28

CPC classification number: H05K1/11 ,  A61N1/05 ,  A61N1/0553 ,  H05K1/09 ,  H05K1/097 ,  H05K3/007 ,  H05K3/12 ,  H05K3/20 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0338 ,  H05K2201/099 ,  Y10T29/49147

Abstract: Thicker electrodes are provided on microelectronic device using thermo-compression bonding. A thin-film electrical conducting layer forms electrical conduits and bulk depositing provides an electrode layer on the thin-film electrical conducting layer. An insulating polymer layer encapsulates the electrically thin-film electrical conducting layer and the electrode layer. Some of the insulating layer is removed to expose the electrode layer.

Abstract translation: 使用热压结合在微电子器件上提供较厚的电极。 薄膜导电层形成电导管，并且本体沉积在薄膜导电层上提供电极层。 绝缘聚合物层封装电薄膜导电层和电极层。 除去绝缘层中的一些以露出电极层。

公开(公告)号：US20170013710A1

公开(公告)日：2017-01-12

申请号：US14849614

申请日：2015-09-10

Applicant: Subtron Technology Co., Ltd.

Inventor： Chin-Sheng Wang ,  Ching-Sheng Chen ,  Mei-Chin Chang ,  Ching-Ta Chen

IPC: H05K1/09 ,  H05K3/18 ,  H05K1/11

CPC classification number: H05K1/09 ,  H05K1/111 ,  H05K3/181 ,  H05K3/188 ,  H05K3/244 ,  H05K2201/0338 ,  H05K2201/0344 ,  H05K2201/09472 ,  H05K2201/099 ,  H05K2203/072

Abstract: A circuit board includes a substrate, a patterned copper layer, a phosphorous-containing electroless plating palladium layer, an electroless plating palladium layer and an immersion plating gold layer. The patterned copper layer is disposed on the substrate. The phosphorous-containing electroless plating palladium layer is disposed on the patterned copper layer, wherein in the phosphorous-containing electroless plating palladium layer, a weight percentage of phosphorous is in a range from 4% to 6%, and a weight percentage of palladium is in a range from 94% to 96%. The electroless plating palladium layer is disposed on the phosphorous-containing electroless plating palladium layer, wherein in the electroless plating palladium layer, a weight percentage of palladium is 99% or more. The immersion plating gold layer is disposed on the electroless plating palladium layer.

Abstract translation: 电路板包括基板，图案化铜层，含磷化学镀钯层，无电镀钯层和浸镀金层。 图案化铜层设置在基板上。 含磷化学镀钯层设置在图案化的铜层上，其中，在含磷化学镀钯层中，磷的重量百分比为4〜6％，钯的重量百分比为 在94％至96％的范围内。 无电镀钯层配置在含磷化学镀钯层上，其中，在化学镀钯层中，钯的重量百分比为99％以上。 浸镀金层设置在化学镀钯层上。

公开(公告)号：US20160349867A1

公开(公告)日：2016-12-01

申请号：US14892006

申请日：2015-05-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Wenjin Fan ,  Taofeng Xie ,  Ming Hu

IPC: G06F3/041

CPC classification number: G06F3/041 ,  G06F3/0416 ,  H05K3/28 ,  H05K3/361 ,  H05K2201/0376 ,  H05K2201/09881 ,  H05K2201/099

Abstract: Embodiments of the invention provide a touch panel and a display device, which relates to the technical field of display and solves the problem that the connecting electrodes of an existing touch panel are easily eroded by water, oxygen, etc. in the air. A touch panel comprises a circuit binding area formed with a plurality of connecting electrodes for binding and electrically connecting with a circuit board. The touch panel further comprises a protective layer at least covering one side surface of the connecting electrode.

Abstract translation: 本发明的实施例提供一种与显示技术领域相关的触摸面板和显示装置，并且解决了现有触摸面板的连接电极容易被空气中的水，氧等侵蚀的问题。 触摸面板包括与多个连接电极形成的电路装订区域，用于与电路板结合并电连接。 触摸面板还包括至少覆盖连接电极的一个侧表面的保护层。

公开(公告)号：US09460757B2

公开(公告)日：2016-10-04

申请号：US14071430

申请日：2013-11-04

Applicant: HGST Netherlands B.V.

Inventor： Edgar Dennis Rothenberg ,  Yiduo Zhang

IPC: G11B33/12 ,  H05K1/11 ,  H01R12/59 ,  H05K1/02 ,  G11B5/48

CPC classification number: G11B33/122 ,  G11B5/4846 ,  H01R12/592 ,  H05K1/118 ,  H05K2201/09445 ,  H05K2201/099

Abstract: A flexible printed circuit (FPC) may have reduced-tolerance electrical connection pads that comprise a connection portion and an adjacent window portion, where the position of a component that is mechanically and electrically connected to the FPC is limited by the geometry of the connection portion of the respective connection pads. The window portion includes an area void of conductive material and bounded by the connection portion on one side and may be bounded by peripheral portions on the other sides, where the peripheral portions are significantly narrower than the connection portion. A portion of the peripheral portions extending from the connection portion may be tucked under a portion of the FPC cover layer to prevent peeling of the peripheral portions.

Abstract translation: 柔性印刷电路（FPC）可以具有包含连接部分和相邻窗口部分的减小公差的电连接焊盘，其中机械地和电连接到FPC的部件的位置被连接部分的几何形状所限制 的各个连接焊盘。 窗口部分包括导电材料区域，并且由一侧上的连接部分限定，并且可以由另一侧的周边部分限定，其中周边部分比连接部分明显窄。 从连接部分延伸的周边部分的一部分可以卷在FPC覆盖层的一部分下面，以防止周边部分的剥离。

公开(公告)号：US20160205785A1

公开(公告)日：2016-07-14

申请号：US14911895

申请日：2014-09-03

Applicant: ZIZALA LICHTSYSTEME GMBH

Inventor： Dietmar KIESLINGER ,  Peter WURM

IPC: H05K3/30 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K3/305 ,  H05K1/181 ,  H05K3/341 ,  H05K3/3436 ,  H05K2201/099 ,  H05K2201/10106 ,  Y02P70/613

Abstract: A method for positionally stable soldering of at least one component part contact face (11) of an electronic component part (1) to at least one corresponding carrier plate contact face (12) of a carrier plate (2), said method having the following steps: a) mounting at least two adhesive points (3a, 3b, 8a, 8b, 9a, 9b) on the carrier plate (2), wherein the position of each adhesive point (3a, 3b, 8a, 8b, 9a, 9b) is predefined, b) fitting the printed carrier plate (2) with the at least one electronic component part (1), wherein the position of the adhesive points (3a, 3b, 8a, 8b, 9a, 9b) is predefined in step a) in such a way that the at least one electronic component part (1) contacts the at least two adhesive points (3a, 3b, 8a, 8b, 9a, 9b) substantially in an edge region formed by the at least one side face (5a, 5b, 5c, 5d) and the lower face 6 and the at least one component part contact face (11) at least partially overlaps the at least one carrier plate contact face (12), c) waiting for completion of a curing process of the adhesive points (3a, 3b, 8a, 8b, 9a, 9b) for a predefinable period of time t, d) heating the solder material (13) in order to establish an electrical, mechanical and/or thermal connection between the at least one component part contact face (11) and the at least one carrier plate contact face (12).

Abstract translation: 一种用于将电子部件（1）的至少一个部件接触面（11）位置稳定地焊接到载体板（2）的至少一个对应的载板接触面（12）的方法，所述方法具有以下 步骤：a）在承载板（2）上安装至少两个粘合点（3a，3b，8a，8b，9a，9b），其中每个粘合点（3a，3b，8a，8b，9a，9b）的位置 ）预定义，b）将所述印刷载体板（2）与所述至少一个电子部件部件（1）相配合，其中所述粘合剂点（3a，3b，8a，8b，9a，9b）的位置在步骤 a）使得所述至少一个电子部件部分（1）基本上在由所述至少一个侧面形成的边缘区域中接触所述至少两个粘合点（3a，3b，8a，8b，9a，9b） （5a，5b，5c，5d）和下表面6和至少一个部件接触面（11）至少部分地与至少一个载板接触面（12）重叠，c）等待 用于完成粘合剂点（3a，3b，8a，8b，9a，9b）的固化过程，以达到预定时间t; d）加热焊料材料（13）以便建立电，机械和/ 或所述至少一个部件接触面（11）和所述至少一个承载板接触面（12）之间的热连接。

公开(公告)号：US09386699B2

公开(公告)日：2016-07-05

申请号：US13995208

申请日：2011-12-21

Applicant: Kiyohiro Hine ,  Akio Furusawa ,  Masato Mori

Inventor： Kiyohiro Hine ,  Akio Furusawa ,  Masato Mori

IPC: H05K1/18 ,  H05K3/34 ,  B23K1/19 ,  B23K35/02 ,  B23K35/26 ,  C22C13/00 ,  H05K13/04 ,  B23K35/24

CPC classification number: H05K1/181 ,  B23K1/19 ,  B23K35/0261 ,  B23K35/24 ,  B23K35/262 ,  C22C13/00 ,  H05K3/3442 ,  H05K3/3452 ,  H05K3/3463 ,  H05K3/3484 ,  H05K13/0465 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10636 ,  H05K2203/1476 ,  Y02P70/611 ,  Y02P70/613

Abstract: The present invention has an aspect to provide a mounted structure of which heat-resistant fatigue characteristic is improved. A mounted structure is provided with a substrate having a substrate electrode, an electronic component having a component electrode, and a bonding part bonding the substrate electrode and the component electrode, wherein the bonding part is constituted by a solder reinforcing part and a solder bonding part, the solder reinforcing part is a side vicinity part of the bonding part, and is constituted by In of 3 wt % or more and 8 wt % or less and Sn of 88 wt % or more, and the solder bonding part is constituted by a Sn—Bi system solder material and In of 0 wt % or more and less than 3 wt %.

Abstract translation: 本发明的一个方面是提供一种提高耐热疲劳特性的安装结构。 安装结构设置有具有基板电极的基板，具有部件电极的电子部件和接合基板电极和部件电极的接合部，其中，接合部由焊料增强部和焊接部 焊料加强部是接合部的侧部附近，由3重量％以上且8重量％以下的Sn和88重量％以上的Sn构成，焊接部由 Sn-Bi系焊料和0重量％以上且小于3重量％的In。

公开(公告)号：US09237686B2

公开(公告)日：2016-01-12

申请号：US14119148

申请日：2013-02-26

Applicant: PANASONIC CORPORATION

Inventor： Koji Motomura ,  Arata Kishi ,  Hiroki Maruo ,  Yasuhiro Suzuki ,  Hironori Munakata

IPC: H05K13/04 ,  H05K3/34 ,  H01L23/00 ,  H01L21/48

CPC classification number: H05K13/0465 ,  H01L21/4867 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/0556 ,  H01L2224/06181 ,  H01L2224/06187 ,  H01L2224/16235 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/81192 ,  H01L2224/8159 ,  H01L2224/816 ,  H01L2224/81815 ,  H01L2224/81862 ,  H01L2224/81885 ,  H01L2224/83886 ,  H01L2924/01322 ,  H05K3/3442 ,  H05K3/3452 ,  H05K3/3463 ,  H05K2201/099 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A wiring board on which an electronic component is to be mounted includes a resist having an opening exposing a joint face which is part of the surface of a wiring layer and to which a terminal of the electronic component is to be joined. In the placing step, the electronic component is placed on the wiring board such that the terminal covers the opening entirely and contacts the solder paste applied onto the joint face. Next, the solder paste applied onto the joint face is heated to melt solder and soften thermosetting resin. This allows the solder to gather in a first space within the opening closed with the wiring layer and the electronic component, while allowing the thermosetting resin to gather in a second space formed between a top side of the resist and a lateral side of the electronic component.

Abstract translation: 要安装电子部件的布线板包括具有露出作为布线层的表面的一部分的接合面的开口的抗蚀剂，并且电子部件的端子要被接合。 在放置步骤中，将电子部件放置在布线板上，使得端子完全覆盖开口并且接触施加到接合面上的焊膏。 接下来，将涂覆在接合面上的焊膏加热熔化焊料并软化热固性树脂。 这允许焊料在布线层和电子部件闭合的开口内的第一空间中聚集，同时允许热固性树脂聚集在形成在抗蚀剂的顶侧和电子部件的侧面之间的第二空间中 。

公开(公告)号：US09148958B2

公开(公告)日：2015-09-29

申请号：US14587556

申请日：2014-12-31

Applicant: FUJITSU LIMITED

Inventor： Yoshiyuki Hiroshima ,  Akiko Matsui ,  Mitsuhiko Sugane ,  Takahide Mukoyama ,  Tetsuro Yamada ,  Takahiro Ooi

IPC: H05K7/00 ,  H05K1/18

CPC classification number: H05K1/181 ,  H05K1/18 ,  H05K2201/099

Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.