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    Method for manufacturing an electronic assembly; an electronic assembly, a cover and a substrate
    11.
    发明授权
    Method for manufacturing an electronic assembly; an electronic assembly, a cover and a substrate 有权
    电子组件的制造方法 电子组件，盖子和基板

    公开(公告)号：US07884289B2

    公开(公告)日：2011-02-08

    申请号：US12297022

    申请日：2007-04-11

    Applicant: Johannes W. Weekamp ,  Cornelis Slob ,  Jacob M. Scheer ,  Freerk E. Van Straten

    Inventor： Johannes W. Weekamp ,  Cornelis Slob ,  Jacob M. Scheer ,  Freerk E. Van Straten

    IPC: H05K7/02

    CPC classification number: B81C1/00833 ,  B81C1/00269 ,  B81C2203/035 ,  H05K3/341 ,  H05K2201/10371 ,  H05K2201/10477 ,  H05K2203/1147 ,  Y02P70/613 ,  Y10T29/49117

    Abstract: The present invention relates to a method for manufacturing an electronic assembly (50) comprising an electronic component, a cavity and a substrate which method comprises; —providing an electronic component (10) having a first pattern with a substantially closed configuration; —providing a cover (18) on a surface of the electronic component, which cover together with said surface defines a cavity (20), the closed configuration of the first pattern substantially enclosing the cover at said surface; —providing a substrate (30) having a second pattern with a substantially closed configuration, which closed configuration at least partially corresponds to the closed configuration of the first pattern and comprises a solder pad; —disposing solder material at the solder pad; —positioning the electronic component and the substrate so as to align both the substantially closed configurations of the first and second pattern, while the substrate supports a top surface (28) of the cover; —reflow-soldering the solder material, therewith providing a soldered connection (52) between the first and second pattern. Furthermore the present invention relates to an electronic assembly (50), a cover (18) and a substrate (30).

    Abstract translation: 本发明涉及一种用于制造电子组件（50）的方法，所述电子组件（50）包括电子部件，空腔和基板，所述方法包括： - 提供具有基本上封闭构造的第一图案的电子部件（10） - 提供与所述表面一起覆盖的所述电子部件的表面上的盖子（18）限定空腔（20），所述第一图案的所述封闭构造基本上在所述表面上包围所述盖子; - 提供具有基本封闭构造的第二图案的衬底（30），该封闭构造至少部分对应于第一图案的封闭构造，并且包括焊盘; - 在焊料垫上涂抹焊料; - 定位所述电子部件和所述基板，以使所述第一和第二图案的所述基本上封闭的构造对准，同时所述基板支撑所述盖的顶表面（28）; - 回流焊接焊料材料，从而在第一和第二图案之间提供焊接连接（52）。 此外，本发明涉及电子组件（50），盖（18）和基板（30）。

    DOWNWARD-FACING OPTICAL COMPONENT MODULE
    12.
    发明申请
    DOWNWARD-FACING OPTICAL COMPONENT MODULE 有权
    下行光学组件模块

    公开(公告)号：US20100277883A1

    公开(公告)日：2010-11-04

    申请号：US12433751

    申请日：2009-04-30

    Applicant: Yoshinari Matsuda ,  Ramon Osuna ,  Ivan Cazarez ,  Rogelio Ruiz

    Inventor： Yoshinari Matsuda ,  Ramon Osuna ,  Ivan Cazarez ,  Rogelio Ruiz

    IPC: H05K1/14

    CPC classification number: H05K1/141 ,  H05K1/182 ,  H05K3/3442 ,  H05K2201/049 ,  H05K2201/10106 ,  H05K2201/10151 ,  H05K2201/10477

    Abstract: A motherboard for an electronic device comprising a main printed circuit board (PCB) with a through-hole extending between the upper component surface and the lower surface. The motherboard includes a carrier PCB having a top surface and a bottom surface, and at least one component, e.g. an optical device, sensor, or the like, coupled to the top surface. The carrier PCB is mounted in an in an inverted orientation with respect to the main PCB such that the top surface of the carrier PCB faces the upper component surface of the main PCB. The carrier PCB is aligned with the main PCB such that the component is substantially aligned with the through hole of the main PCB and is visible from the lower surface of the PCB.

    Abstract translation: 一种用于电子设备的母板，包括具有在上部部件表面和下部表面之间延伸的通孔的主印刷电路板（PCB）。 主板包括具有顶表面和底表面的载体PCB，以及至少一个部件，例如， 耦合到顶表面的光学装置，传感器等。 载体PCB相对于主PCB以相反方向安装，使得载体PCB的顶表面面向主PCB的上部组件表面。 载体PCB与主PCB对准，使得该部件基本上与主PCB的通孔对准，并且可从PCB的下表面看到。

    METHOD OF PRODUCING WIRE-CONNECTION STRUCTURE, AND WIRE-CONNECTION STRUCTURE
    13.
    发明申请
    METHOD OF PRODUCING WIRE-CONNECTION STRUCTURE, AND WIRE-CONNECTION STRUCTURE 有权
    生产线连接结构的方法和电线连接结构

    公开(公告)号：US20100276191A1

    公开(公告)日：2010-11-04

    申请号：US12839344

    申请日：2010-07-19

    Applicant: Hiroto Sugahara

    Inventor： Hiroto Sugahara

    IPC: H05K1/11

    CPC classification number: H05K3/361 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/81 ,  H01L24/82 ,  H01L2224/1624 ,  H01L2224/24105 ,  H01L2224/24227 ,  H01L2224/811 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H05K3/0032 ,  H05K3/363 ,  H05K2201/10477 ,  H05K2203/013 ,  H01L2924/00

    Abstract: For electrically connecting a wiring formed on one surface of an insulating substrate such as an FPC to an individual electrode arranged facing the other surface of the substrate, firstly, a through hole and a notch are formed by irradiating a laser beam from above onto the FPC. Next, the FPC is arranged to be positioned such that the individual electrode, the through hole and the notch are overlapped in a plan view. Next, an electroconductive liquid droplet having a diameter greater than a width of the notch is jetted, toward an area formed with the notch, from the one surface side of the FPC. The landed electroconductive liquid droplet flows along the notch in a thickness direction of the substrate due to an action of a capillary force and reaches assuredly to the individual electrode, thereby electrically connecting the wiring and electrode arranged sandwiching the insulating substrate assuredly.

    Abstract translation: 为了将形成在诸如FPC的绝缘基板的一个表面上的布线电连接到与基板的另一表面相对布置的单独电极，首先通过从上方将激光束照射到FPC上而形成通孔和凹口 。 接下来，将FPC布置成使得各个电极，通孔和凹口在平面图中重叠。 接下来，从FPC的一个表面侧向具有凹口的区域喷射直径大于凹口宽度的导电液滴。 着陆的导电液滴由于毛细管力的作用而沿着基板的厚度方向沿着切口流动，并且确实地到达各个电极，从而可靠地将布线和电极布置在绝缘基板上。

    Method of producing wire-connection structure, and wire-connection structure
    14.
    发明授权
    Method of producing wire-connection structure, and wire-connection structure 有权
    电线连接结构的制造方法，线连接结构

    公开(公告)号：US07781324B2

    公开(公告)日：2010-08-24

    申请号：US11475876

    申请日：2006-06-28

    Applicant: Hiroto Sugahara

    Inventor： Hiroto Sugahara

    IPC: H01L21/44

    CPC classification number: H05K3/361 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/81 ,  H01L24/82 ,  H01L2224/1624 ,  H01L2224/24105 ,  H01L2224/24227 ,  H01L2224/811 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H05K3/0032 ,  H05K3/363 ,  H05K2201/10477 ,  H05K2203/013 ,  H01L2924/00

    Abstract: For electrically connecting a wiring formed on one surface of an insulating substrate such as an FPC to an individual electrode arranged facing the other surface of the substrate, firstly, a through hole and a notch are formed by irradiating a laser beam from above onto the FPC. Next, the FPC is arranged to be positioned such that the individual electrode, the through hole and the notch are overlapped in a plan view. Next, an electroconductive liquid droplet having a diameter greater than a width of the notch is jetted, toward an area formed with the notch, from the one surface side of the FPC. The landed electroconductive liquid droplet flows along the notch in a thickness direction of the substrate due to an action of a capillary force and reaches assuredly to the individual electrode, thereby electrically connecting the wiring and electrode arranged sandwiching the insulating substrate assuredly.

    Abstract translation: 为了将形成在诸如FPC的绝缘基板的一个表面上的布线电连接到与基板的另一表面相对布置的单独电极，首先通过从上方将激光束照射到FPC上而形成通孔和凹口 。 接下来，将FPC布置成使得各个电极，通孔和凹口在平面图中重叠。 接下来，从FPC的一个表面侧向具有凹口的区域喷射直径大于凹口宽度的导电液滴。 着陆的导电液滴由于毛细管力的作用而沿着基板的厚度方向沿着切口流动，并且确实地到达各个电极，从而可靠地将布线和电极布置在绝缘基板上。

    Method of manufacturing pins of miniaturization chip module
    16.
    发明申请
    Method of manufacturing pins of miniaturization chip module 审中-公开
    小型化芯片模块制造方法

    公开(公告)号：US20090162976A1

    公开(公告)日：2009-06-25

    申请号：US12003254

    申请日：2007-12-21

    Applicant: Kuan-Hsing Li ,  Kuo-Hsien Liao

    Inventor： Kuan-Hsing Li ,  Kuo-Hsien Liao

    IPC: H01L21/60

    CPC classification number: H05K3/3442 ,  H01L21/4853 ,  H01L23/04 ,  H01L23/49811 ,  H01L23/552 ,  H01L2924/16152 ,  H01L2924/167 ,  H01L2924/3025 ,  H05K2201/10242 ,  H05K2201/10477 ,  H05K2201/10924 ,  Y02P70/613

    Abstract: A method of manufacturing a miniaturization chip module includes steps of providing a chip module having a substrate, wherein the substrate has a plurality of bonding pads spaced on a rear surface of substrate; providing a lead frame including a plurality of spaced metallic studs, wherein the metallic studs are attached onto the bonding pads; and forming metallic blocks as I/O pins by removing a part of each metallic stud and a part of the lead frame which is not in contact with the substrate.

    Abstract translation: 一种制造小型化芯片模块的方法包括提供具有基板的芯片模块的步骤，其中所述基板具有在基板的后表面上间隔开的多个焊盘; 提供包括多个间隔开的金属螺柱的引线框架，其中所述金属螺柱附接到所述接合焊盘上; 并且通过去除每个金属柱的一部分和不与基板接触的引线框架的一部分，将金属块形成为I / O引脚。

    Thermally improved placement of power-dissipating components onto a circuit board
    17.
    发明授权
    Thermally improved placement of power-dissipating components onto a circuit board 有权
    功率耗散元件在电路板上的散热改进

    公开(公告)号：US07443025B2

    公开(公告)日：2008-10-28

    申请号：US11146234

    申请日：2005-06-07

    Applicant: Rudi Verbist

    Inventor： Rudi Verbist

    IPC: H01L23/34

    CPC classification number: H05K1/181 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K2201/09709 ,  H05K2201/10477 ,  H05K2201/10689 ,  H05K2203/1572 ,  Y02P70/611 ,  H01L2924/00

    Abstract: The invention refers to an electronic system, comprising several power-dissipating components, and a circuit board, wherein said power-dissipating components are mounted both to a top side and a bottom side of said circuit board. Further, the invention refers to method for mounting power-dissipating components onto a circuit board, comprising the steps of (a) determining the thermal behavior of said power-dissipating components; and (b) determining, in accordance thereto, the placement of said power-dissipating components on both a top side and a bottom side of said circuit board.

    Abstract translation: 本发明涉及一种电子系统，包括若干功率消耗部件和电路板，其中所述功率消耗部件都安装在所述电路板的顶侧和底侧。 此外，本发明涉及将功率耗散部件安装到电路板上的方法，其包括以下步骤：（a）确定所述功率耗散部件的热行为; 和（b）根据此确定所述电力消耗部件在所述电路板的顶侧和底侧上的布置。

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