公开(公告)号：US07131194B2

公开(公告)日：2006-11-07

申请号：US10420522

申请日：2003-04-22

Applicant: Takashi Hashimoto

Inventor： Takashi Hashimoto

IPC: H05K3/30

CPC classification number: H05K3/4614 ,  H05K1/0306 ,  H05K3/125 ,  H05K3/1275 ,  H05K3/207 ,  H05K3/386 ,  H05K3/4069 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2201/09981 ,  H05K2203/013 ,  H05K2203/0534 ,  H05K2203/061 ,  H05K2203/063 ,  H05K2203/1173 ,  Y10T29/49002 ,  Y10T29/49073 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/49224

Abstract: Wirings 2B1 are formed by application of heat treatment after an ink jet system is used to discharge a conductive liquid L onto a provisional substrate 5 having a predetermined repellent property, bonding an insulating layer 4B1 to the wirings 2B1 with an adhesive material 3B1 therebetween, peeling and removing the provisional substrate 5, and bonding and fixing the wirings 2B1 together with the insulating film 4B1 to a main substrate 1 by an adhesive material 3B1.

Abstract translation: 在使用喷墨系统将导电液体L排出到具有预定排斥性的临时基板5上之后，通过施加热处理形成布线2B1，将绝缘层4B1与布线2B1接合 粘合材料3B 1，剥离和去除临时基板5，并且通过粘合剂材料3B B1将布线2B 1与绝缘膜4B 1一起粘合并固定到主基板1。

公开(公告)号：US20060234493A1

公开(公告)日：2006-10-19

申请号：US11423530

申请日：2006-06-12

Applicant: Takashi HASHIMOTO

Inventor： Takashi HASHIMOTO

IPC: H01L21/4763

CPC classification number: H05K3/4614 ,  H05K1/0306 ,  H05K3/125 ,  H05K3/1275 ,  H05K3/207 ,  H05K3/386 ,  H05K3/4069 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2201/09981 ,  H05K2203/013 ,  H05K2203/0534 ,  H05K2203/061 ,  H05K2203/063 ,  H05K2203/1173 ,  Y10T29/49002 ,  Y10T29/49073 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/49224

Abstract: Wirings 2B1 are formed by application of heat treatment after an ink jet system is used to discharge a conductive liquid L onto a provisional substrate 5 having a predetermined repellent property, bonding an insulating layer 4B1 to the wirings 2B1 with an adhesive material 3B1 therebetween, peeling and removing the provisional substrate 5, and bonding and fixing the wirings 2B1 together with the insulating film 4B1 to a main substrate 1 by an adhesive material 3B1.

Abstract translation: 在使用喷墨系统将导电液体L排出到具有预定排斥性的临时基板5上之后，通过施加热处理形成布线2B1，将绝缘层4B1与布线2B1接合 粘合材料3B 1，剥离和去除临时基板5，并且通过粘合剂材料3B B1将布线2B 1与绝缘膜4B 1一起粘合并固定到主基板1。

公开(公告)号：US20060197184A1

公开(公告)日：2006-09-07

申请号：US11164614

申请日：2005-11-30

Applicant: Kiyoshi OI ,  Noriyoshi SHIMIZU ,  Tomoo YAMASAKI

Inventor： Kiyoshi OI ,  Noriyoshi SHIMIZU ,  Tomoo YAMASAKI

IPC: H01L29/00

CPC classification number: H05K1/0231 ,  H01G4/232 ,  H01G4/30 ,  H01G4/38 ,  H01L23/49822 ,  H01L27/0805 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19106 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/162 ,  H05K1/185 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H01L2224/0401

Abstract: A capacitor parts of the present invention, includes a substrate, a plurality of capacitor elements arranged on the substrate and composed of a lower electrode, a dielectric layer, and an upper electrode respectively, a lower electrode rewiring layer formed over the plurality of capacitor elements and connected electrically to lower electrodes of the plurality of capacitor elements respectively to act as a common electrode, and an upper electrode rewiring layer formed over the plurality of capacitor elements and connected electrically to upper electrodes of the plurality of capacitor elements respectively to act as another common electrode, wherein the plurality of capacitor elements are connected electrically in parallel in a state of the capacitor parts, thus, the impedance is reduced in a wide high-frequency band by changing impedances among the plurality of capacitor elements.

Abstract translation: 本发明的电容器部件包括基板，分别配置在基板上的多个电容器元件，分别由下电极，电介质层和上电极构成，下电极重布线层形成在多个电容元件上 并且分别与多个电容器元件的下电极电连接起来用作公共电极，以及形成在所述多个电容器元件上并且分别电连接到所述多个电容器元件的上电极的上电极重新布线层，以分别作为另一个 公共电极，其中多个电容器元件在电容器部分的状态下并联电连接，因此通过改变多个电容器元件之间的阻抗，在宽的高频带中阻抗减小。

公开(公告)号：US20060180917A1

公开(公告)日：2006-08-17

申请号：US11345626

申请日：2006-02-02

Applicant: Srdjan Djordjevic ,  Wolfgang Hoppe

Inventor： Srdjan Djordjevic ,  Wolfgang Hoppe

IPC: H01L23/52

CPC classification number: H05K1/115 ,  H05K1/0216 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/429 ,  H05K2201/09227 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09627 ,  H05K2201/10689 ,  H05K2203/1572

Abstract: A circuit board includes a first group of layers located close to a top side of the circuit board, and a second group of layers located close to an underside of the circuit board. Signals which are fed to input and output contact terminals on the top side of the circuit board are passed along at least one of the layers of the group. Signals which are fed to input and output contact terminals on the underside of the circuit board are passed along at least one of the layers of the second group. The contact-making holes for connecting the input and output contact terminals to the layers of the first and second groups are preferably formed as blind contact-making holes.

Abstract translation: 电路板包括位于电路板的顶侧附近的第一组层，以及位于电路板的下侧附近的第二组层。 馈送到电路板顶部的输入和输出接触端子的信号沿着该组的至少一个层通过。 馈送到电路板下侧的输入和输出接触端子的信号沿着第二组的至少一层传送。 用于将输入和输出接触端子连接到第一和第二组的层的接触孔优选地形成为盲接触形成孔。

公开(公告)号：US07086147B2

公开(公告)日：2006-08-08

申请号：US10768836

申请日：2004-01-29

Applicant: David Vincent Caletka ,  Krishna Darbha ,  Donald W. Henderson ,  Lawrence P. Lehman ,  George Henry Thiel

Inventor： David Vincent Caletka ,  Krishna Darbha ,  Donald W. Henderson ,  Lawrence P. Lehman ,  George Henry Thiel

IPC: H05K3/34 ,  H01L23/48

CPC classification number: H01L23/49811 ,  B23K3/0623 ,  B23K2101/40 ,  H01L21/563 ,  H01L23/13 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05026 ,  H01L2224/05078 ,  H01L2224/05551 ,  H01L2224/05568 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15787 ,  H05K1/113 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/0116 ,  H05K2201/0133 ,  H05K2201/0382 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/09509 ,  H05K2201/0969 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49149 ,  Y10T29/49171 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05552

Abstract: Solder balls such as, low melt C4 solder balls, undergo volume expansion during reflow, such as may occur during attachment of chip modules to a PCB. Where the solder balls are encapsulated, expansion pressure can cause damage to device integrity. A volume expansion region in the semiconductor chip substrate beneath each of the solder balls accommodated this volume expansion. Air-cushioned diaphgrams, deformable materials and non-wettable surfaces may be used to permit return of the solder during cooling to its original site. A porous medium with voids sufficient to accommodate expansion may also be used.

Abstract translation: 诸如低熔点C4焊球的焊球在回流期间经历体积膨胀，例如在将芯片模块附接到PCB期间可能发生。 当焊球被封装时，膨胀压力可能会损坏器件的完整性。 在每个焊球下方的半导体芯片基板中的体积膨胀区容纳该体积膨胀。 可以使用气垫缓冲图，可变形材料和不可润湿的表面，以允许在冷却期间焊料返回到其原始位置。 也可以使用具有足以适应膨胀的空隙的多孔介质。

公开(公告)号：US20060157272A1

公开(公告)日：2006-07-20

申请号：US11384744

申请日：2006-03-20

Applicant: Christopher Jones

Inventor： Christopher Jones

IPC: H05K1/11

CPC classification number: H05K3/421 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/15311 ,  H05K1/115 ,  H05K3/243 ,  H05K3/4602 ,  H05K2201/0367 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2203/0574 ,  H05K2203/0733 ,  H05K2203/1476 ,  Y10T29/49165

Abstract: A system may include a first microvia pad, a second microvia pad having a projection extending in a direction toward the first microvia pad, and a microvia electrically coupled to the first microvia pad and to the second microvia pad.

Abstract translation: 系统可以包括第一微孔垫，具有沿朝向第一微孔垫的方向延伸的突起的第二微孔垫，以及电耦合到第一微孔垫和第二微孔垫的微孔。

公开(公告)号：US07078311B2

公开(公告)日：2006-07-18

申请号：US10744197

申请日：2003-12-22

Applicant: Mitsutoshi Higashi ,  Hideaki Sakaguchi ,  Hiroko Koike

Inventor： Mitsutoshi Higashi ,  Hideaki Sakaguchi ,  Hiroko Koike

IPC: H01L21/20

CPC classification number: H01G4/33 ,  H01G2/06 ,  H01G4/228 ,  H01L21/4857 ,  H01L23/49822 ,  H01L27/0805 ,  H01L28/40 ,  H01L28/65 ,  H01L2924/0002 ,  H05K2201/0179 ,  H05K2201/09509 ,  H01L2924/00

Abstract: There is provided a capacitor embedded in a substrate having a small thickness and requiring only a small space for short connection lines. The substrate-embedded capacitor comprises a substrate having an opening, a first conductive layer on the substrate, a dielectric layer on the first conductive layer, a second conductive layer on the dielectric layer, and an insulating layer formed on the second conductive layer and having an opening. In the substrate-embedded capacitor, the first conductive layer and the second conductive layer are exposed through the openings in the substrate and the insulating layer, respectively.

公开(公告)号：US20060154434A1

公开(公告)日：2006-07-13

申请号：US11172794

申请日：2005-07-05

Applicant: Rabindra Das ,  John Lauffer ,  Voya Markovich ,  James Matthews

Inventor： Rabindra Das ,  John Lauffer ,  Voya Markovich ,  James Matthews

IPC: H01L21/20 ,  H01L21/44

CPC classification number: H05K1/162 ,  H05K3/4611 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2203/0207

Abstract: A method of forming a capacitive substrate in which first and second conductors are formed opposite a dielectric, with one of these electrically coupled to a thru-hole connection. Each functions as an electrode for the resulting capacitor. The substrate is then adapted for being incorporated within a larger structure to form a circuitized substrate such as a printed circuit board or a chip carrier. Additional capacitors are also possible.

Abstract translation: 一种形成电容基板的方法，其中第一和第二导体与电介质相对地形成，其中一个电气基板电耦合到通孔连接。 每个都用作所得电容器的电极。 然后将衬底适用于并入更大的结构中以形成诸如印刷电路板或芯片载体的电路化衬底。 附加的电容器也是可能的。

公开(公告)号：US20060145331A1

公开(公告)日：2006-07-06

申请号：US11179864

申请日：2005-07-11

Applicant: Suk Cho ,  Chang Ryu ,  Doo Lee

Inventor： Suk Cho ,  Chang Ryu ,  Doo Lee

IPC: H01L21/4763 ,  H01L23/12

CPC classification number: H05K1/185 ,  H01L21/4857 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K3/4623 ,  H05K3/4652 ,  H05K2201/09509 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: A method of fabricating a printed circuit board (PCB) including embedded chips, composed of forming a hollow portion for chip insertion through a substrate, inserting the chip into the hollow portion, fixing the chip to the substrate by use of a plating process to form a central layer having an embedded chip, and then laminating a non-cured resin layer and a circuit layer having a circuit pattern on the central layer. Also, a PCB including embedded chips fabricated using the above method is provided.

Abstract translation: 一种制造包括嵌入式芯片的印刷电路板（PCB）的方法，所述印刷电路板（PCB）由形成用于通过基板进行芯片插入的中空部分，将所述芯片插入所述中空部分中，通过电镀工艺将所述芯片固定到所述基板 具有嵌入式芯片的中心层，然后在中心层上层叠未固化树脂层和具有电路图案的电路层。 此外，提供了包括使用上述方法制造的嵌入式芯片的PCB。

公开(公告)号：US07072168B2

公开(公告)日：2006-07-04

申请号：US10889312

申请日：2004-07-13

Applicant: Yasuyoshi Horikawa ,  Tomoo Yamasaki ,  Kiyoshi Ooi

Inventor： Yasuyoshi Horikawa ,  Tomoo Yamasaki ,  Kiyoshi Ooi

IPC: H01G4/005

CPC classification number: H01G9/012 ,  H01G9/042 ,  H01G9/0425 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/50 ,  H01L2221/68345 ,  H01L2224/05001 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/112 ,  H05K1/162 ,  H05K3/205 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09763 ,  H05K2201/10674 ,  H05K2203/0315 ,  Y10T29/417 ,  Y10T29/43 ,  H01L2924/00014

Abstract: A capacitor device of the present invention includes a substrate, a float electrode formed on the substrate, a valve metal film formed on the float electrode, a dielectric film formed on the valve metal film by applying an anodic oxidation to a part of the valve metal film, and a pair of electrodes provided in areas overlapping with two different parts of the float electrode on the dielectric film respectively.

Abstract translation: 本发明的电容器装置包括基板，形成在基板上的浮动电极，形成在浮动电极上的阀金属膜，通过对阀金属的一部分施加阳极氧化而形成在阀金属膜上的电介质膜 膜和一对电极，其分别设置在与电极上的浮动电极的两个不同部分重叠的区域中。