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    Electrical coupling of a stiffener to a chip carrier
    191.
    发明授权
    Electrical coupling of a stiffener to a chip carrier 有权

    公开(公告)号：US06534848B1

    公开(公告)日：2003-03-18

    申请号：US09657194

    申请日：2000-09-07

    Applicant: Terry J. Dornbos ,  Raymond A. Phillips, Jr. ,  Mark V. Pierson ,  William J. Rudik ,  David L. Thomas

    Inventor： Terry J. Dornbos ,  Raymond A. Phillips, Jr. ,  Mark V. Pierson ,  William J. Rudik ,  David L. Thomas

    IPC: H01L2302

    CPC classification number: H05K3/0061 ,  H01L21/4846 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10977

    Abstract: A method and structure for conductively coupling a metallic stiffener to a chip carrier. A substrate has a conductive pad on its surface and an adhesive layer is formed on the substrate surface. The metallic stiffener is placed on the adhesive layer, wherein the adhesive layer mechanically couples the stiffener to the substrate surface and electrically couples the stiffener to the pad. The adhesive layer is then cured such as by pressurization at elevated temperature. Embodiments of the present invention form the adhesive layer by forming an electrically conductive contact on the pad and setting a dry adhesive on the substrate, such that the electrically conductive contact is within a hole in the dry adhesive. The electrically conductive contact electrically couples the stiffener to the pad. The curing step includes curing both the dry adhesive and the electrically conductive contact, resulting in the dry adhesive adhesively coupling the stiffener to the substrate. The electrically conductive contact may include an electrically conductive adhesive or a metallic solder. Additional embodiments of the present invention form the adhesive layer by applying an electrically conductive adhesive on the substrate, wherein after the stiffener is placed on the adhesive layer, the electrically conductive adhesive mechanically and electrically couples the stiffener to the surface of the substrate.

    Decoupling capacitor method and structure using metal based carrier
    195.
    发明授权
    Decoupling capacitor method and structure using metal based carrier 有权
    使用金属载体去耦电容器的方法和结构

    公开(公告)号：US06461493B1

    公开(公告)日：2002-10-08

    申请号：US09472136

    申请日：1999-12-23

    Applicant: Mukta S. Farooq ,  Shaji Farooq ,  John U. Knickerbocker ,  Robert A. Rita ,  Srinivasa N. Reddy

    Inventor： Mukta S. Farooq ,  Shaji Farooq ,  John U. Knickerbocker ,  Robert A. Rita ,  Srinivasa N. Reddy

    IPC: C25D502

    CPC classification number: H05K3/445 ,  H01G4/10 ,  H05K1/053 ,  H05K1/162 ,  H05K3/4069 ,  H05K2201/09554 ,  H05K2203/0315 ,  H05K2203/1142

    Abstract: A process for fabricating a structure using a metal carrier and forming a double capacitor structure. The process comprises forming a first via hole through the metal carrier, forming a dielectric layer around the metal carrier and inside the first via hole, forming a second via hole through the dielectric layer and the metal carrier, and filling at least one of the via holes with conductive material. In one preferred embodiment, the process further comprises forming a third via hole through the metal carrier before the forming of a dielectric layer, wherein the dielectric layer is formed around the metal carrier, inside the first via hole, and inside the third via hole. The first via hole, the second via hole, and the third via hole are all filled with a conductive material. In one preferred embodiment, the dielectric layer comprises a top surface opposed to a bottom surface, and electrodes are formed on at least one of the top surface and the bottom surface of the dielectric layer.

    Abstract translation: 一种使用金属载体制造结构并形成双电容器结构的方法。 该工艺包括形成通过金属载体的第一通孔，在金属载体周围形成电介质层，并在第一通孔内部形成介电层，形成穿过电介质层和金属载体的第二通孔，并填充至少一个通孔 孔与导电材料。 在一个优选实施例中，该方法还包括在形成电介质层之前通过金属载体形成第三通孔，其中介电层围绕金属载体形成在第一通孔的内部，以及在第三通孔的内部。 第一通孔，第二通孔和第三通孔均填充有导电材料。 在一个优选实施例中，电介质层包括与底表面相对的顶表面，并且在介电层的顶表面和底表面中的至少一个上形成电极。

    Process for preparing a multi-layer circuit assembly
    197.
    发明申请
    Process for preparing a multi-layer circuit assembly 审中-公开
    制备多层电路组件的方法

    公开(公告)号：US20020127494A1

    公开(公告)日：2002-09-12

    申请号：US09802001

    申请日：2001-03-08

    Inventor： Lance C. Sturni ,  Kevin C. Olson

    IPC: G03C005/00

    CPC classification number: C09D5/4488 ,  H01L21/481 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/142 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/056 ,  H05K3/0023 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/388 ,  H05K3/426 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0179 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2203/0582 ,  H05K2203/135 ,  H01L2924/00

    Abstract: A process for fabricating a multi-layer circuit assembly is provided comprising the following steps: (a) providing a perforate metal core; (b) applying a dielectric polymer onto all exposed surfaces of the metal core to form a conformal coating of substantially uniform thickness on all exposed surfaces of the metal core; (c) ablating the surface of the dielectric polymer in a predetermined pattern to expose sections of the metal core; (d) applying a layer of metal to all surfaces to form metallized vias through the metal core; and (e) applying a resinous photosensitive layer to the metal layer. Additional processing steps such as circuitization may be included. Circuit assemblies produced by the process of the present invention comprise component layers having high via density and thermal coefficients of expansion that are compatible with those of semiconductor chips and rigid wiring boards which may be attached as components of the circuit assembly.

    Abstract translation: 提供一种制造多层电路组件的方法，包括以下步骤：（a）提供穿孔金属芯; （b）将介电聚合物施加到所述金属芯的所有暴露表面上以在所述金属芯的所有暴露表面上形成基本均匀厚度的共形涂层; （c）以预定图案烧蚀电介质聚合物的表面以暴露金属芯的部分; （d）将金属层施加到所有表面以形成通过所述金属芯的金属化通孔; 和（e）将树脂感光层施加到金属层。 可以包括诸如电路化的附加处理步骤。 通过本发明的方法制造的电路组件包括具有与可以作为电路组件的组件附接的半导体芯片和刚性布线板相容的高通孔密度和热膨胀系数的组件层。

    Printed circuit device
    198.
    发明授权
    Printed circuit device 有权
    印刷电路器件

    公开(公告)号：US06423910B1

    公开(公告)日：2002-07-23

    申请号：US09457948

    申请日：1999-12-09

    Applicant: David William Strickley

    Inventor： David William Strickley

    IPC: H01R1204

    CPC classification number: H05K3/4084 ,  H05K3/0061 ,  H05K3/4038 ,  H05K3/429 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/0397 ,  H05K2201/09554

    Abstract: A printed circuit device comprising, a printed circuit board having an electrically conductive heat plane associated with a surface thereof, the circuit board having an opening formed therein which exposes a ground layer or track of the circuit board, a wall defining the opening being provided with an electrically conductive coating which is electrically connected to the ground layer or track, the heat plane being provided with a cut-out defining a projection which is bent to extend into the opening, the projection being secured to said coating electrically to connect the coating and the ground layer or track to the heat plane. The invention also resides in a method of manufacturing a printed circuit device and in a heat plane for use in such a device.

    Abstract translation: 一种印刷电路装置，包括：具有与其表面相关的导电热平面的印刷电路板，所述电路板具有形成在其中的开口，其暴露所述电路板的接地层或轨道，限定所述开口的壁设置有 导电涂层，其电连接到接地层或轨道，所述热平面设置有切口，所述切口限定突起，所述突出部被弯曲以延伸到所述开口中，所述突起被电固定到所述涂层以连接所述涂层和 地层或轨道到热平面。 本发明还涉及制造印刷电路器件的方法，并且在用于这种器件的热平面中。

    Multilayer wiring board, semiconductor device and methods for manufacturing such multilayer wiring board and semiconductor device
    200.
    发明申请
    Multilayer wiring board, semiconductor device and methods for manufacturing such multilayer wiring board and semiconductor device 失效
    多层布线基板，半导体装置及制造这种多层布线基板及半导体装置的方法

    公开(公告)号：US20010038145A1

    公开(公告)日：2001-11-08

    申请号：US09848799

    申请日：2001-05-04

    Inventor： Naohiro Mashino

    IPC: H01L023/10 ,  H01L023/34

    CPC classification number: H01L23/49822 ,  H01L23/642 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/053 ,  H05K1/056 ,  H05K1/141 ,  H05K1/162 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09809 ,  H05K2203/0315

    Abstract: A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser and the condenser electrode metal layer. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole. An insulating layer is formed on the condenser electrode metal layer and is provided with a via hole to communicate with the metal substrate through the second and first contact holes. A metal substrate contact metal layer formed on an inner wall of the via hole, so that the metal substrate contact metal layer comes into electrical contact with the metal substrate.

    Abstract translation: 多层布线板包括：作为芯的金属基板，形成为覆盖金属层的电容器电介质层，以及形成为覆盖电容器电介质层的电容器电极金属层，由金属基板限定冷凝器， 冷凝器和电容器电极金属层。 电容电介质层设置有与金属基板连通的第一接触孔，并且电容器电极金属层设置有与第一接触孔连通的第二接触孔，第二接触孔的直径大于 第一接触孔。 绝缘层形成在电容器电极金属层上，并且设置有通孔，以通过第二和第一接触孔与金属基板连通。 金属基板接触金属层形成在通孔的内壁上，金属基板接触金属层与金属基板电接触。

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