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    Episeal pressure sensor and method for making an episeal pressure sensor
    221.
    发明授权
    Episeal pressure sensor and method for making an episeal pressure sensor 有权

    公开(公告)号：US06928879B2

    公开(公告)日：2005-08-16

    申请号：US10375645

    申请日：2003-02-26

    Applicant: Aaron Partridge ,  Markus Lutz

    Inventor： Aaron Partridge ,  Markus Lutz

    IPC: B81B3/00 ,  G01L9/00 ,  H01L29/84

    CPC classification number: B81C1/00047 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C2201/0109 ,  B81C2201/0177 ,  B81C2203/0145 ,  G01L9/0045 ,  G01L9/0054 ,  G01L9/0073

    Abstract: A method for making a pressure sensor by providing a wafer including a base silicon layer, a buried sacrificial layer, and a top silicon layer. The top silicon layer is arranged over the buried sacrificial layer and the buried sacrificial layer is arranged over the base silicon layer. Etching vents through the top silicon layer to the buried sacrificial layer and removing a portion of the buried sacrificial layer. Depositing silicon to seal the vents and arranging a strain gauge or a capacitance contact on the wafer. A method for making a pressure sensor including providing a bulk wafer and depositing a sacrificial layer on the bulk wafer. Depositing silicon on the sacrificial layer and the bulk wafer to form an encapsulation layer. Etching vents through the encapsulation layer to the sacrificial layer and removing the sacrificial layer. Closing the vents with a silicon deposition and arranging a strain gauge or a capacitance contact on the encapsulation layer. A pressure sensing device including a substrate, an encapsulation layer with vents, and voids between the substrate and the encapsulation layer. A portion of the encapsulation layer above the voids forms a membrane and deposited silicon plugs fill the vents. A strain gauge or a top capacitive contact arranged on the membrane.

    Episeal pressure sensor and method for making an episeal pressure sensor
    222.
    发明申请
    Episeal pressure sensor and method for making an episeal pressure sensor 有权
    Episeal压力传感器和制造episeal压力传感器的方法

    公开(公告)号：US20050142688A1

    公开(公告)日：2005-06-30

    申请号：US11064658

    申请日：2005-02-23

    Applicant: Aaron Partridge ,  Markus Lutz

    Inventor： Aaron Partridge ,  Markus Lutz

    IPC: B81B3/00 ,  G01L9/00 ,  H01L29/84 ,  H01L21/00

    CPC classification number: B81C1/00047 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C2201/0109 ,  B81C2201/0177 ,  B81C2203/0145 ,  G01L9/0045 ,  G01L9/0054 ,  G01L9/0073

    Abstract: A method for making a pressure sensor by providing a wafer including a base silicon layer, a buried sacrificial layer, and a top silicon layer. The top silicon layer is arranged over the buried sacrificial layer and the buried sacrificial layer is arranged over the base silicon layer. Etching vents through the top silicon layer to the buried sacrificial layer and removing a portion of the buried sacrificial layer. Depositing silicon to seal the vents and arranging a strain gauge or a capacitance contact on the wafer. A method for making a pressure sensor including providing a bulk wafer and depositing a sacrificial layer on the bulk wafer. Depositing silicon on the sacrificial layer and the bulk wafer to form an encapsulation layer. Etching vents through the encapsulation layer to the sacrificial layer and removing the sacrificial layer. Closing the vents with a silicon deposition and arranging a strain gauge or a capacitance contact on the encapsulation layer. A pressure sensing device including a substrate, an encapsulation layer with vents, and voids between the substrate and the encapsulation layer. A portion of the encapsulation layer above the voids forms a membrane and deposited silicon plugs fill the vents. A strain gauge or a top capacitive contact arranged on the membrane.

    Abstract translation: 一种通过提供包括基底硅层，掩埋牺牲层和顶部硅层的晶片来制造压力传感器的方法。 顶层硅层布置在掩埋牺牲层上方，掩埋牺牲层布置在基底硅层上。 蚀刻通孔通过顶部硅层到掩埋牺牲层并去除一部分掩埋牺牲层。 沉积硅以密封通风口并在晶片上布置应变计或电容接触。 一种用于制造压力传感器的方法，包括提供体晶片并在体晶片上沉积牺牲层。 在牺牲层和体晶片上沉积硅以形成封装层。 蚀刻通过封装层到达牺牲层并去除牺牲层。 用硅沉积封闭通风口，并在封装层上布置应变计或电容接触。 一种压力感测装置，包括基底，通气孔的封装层以及基底和封装层之间的空隙。 空隙之上的封装层的一部分形成膜并且沉积的硅塞填充通风口。 布置在膜上的应变计或顶部电容接触。

    Methods of forming void regions, dielectric regions and capacitor constructions
    223.
    发明授权
    Methods of forming void regions, dielectric regions and capacitor constructions 有权
    形成空隙区域，电介质区域和电容器结构的方法

    公开(公告)号：US06902984B2

    公开(公告)日：2005-06-07

    申请号：US10827933

    申请日：2004-04-19

    Applicant: Jerome Michael Eldridge

    Inventor： Jerome Michael Eldridge

    IPC: B81B3/00 ,  H01L21/02 ,  H01L21/311 ,  H01L21/20

    CPC classification number: B81C1/00119 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00047 ,  B81C2201/0109 ,  B81C2201/0146 ,  H01L21/31138 ,  H01L28/40

    Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.

    Abstract translation: 一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。 另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。

    Method for making a micromechanical device by removing a sacrificial layer with multiple sequential etchants
    225.
    发明申请
    Method for making a micromechanical device by removing a sacrificial layer with multiple sequential etchants 审中-公开
    通过用多个顺序蚀刻剂去除牺牲层来制造微机械装置的方法

    公开(公告)号：US20050045276A1

    公开(公告)日：2005-03-03

    申请号：US10922565

    申请日：2004-08-19

    Applicant: Satyadev Patel ,  Andrew Huibers ,  Gregory Schaadt ,  Peter Heureux

    Inventor： Satyadev Patel ,  Andrew Huibers ,  Gregory Schaadt ,  Peter Heureux

    IPC: B81B3/00 ,  C23F1/00 ,  H01L21/00 ,  H01L21/302 ,  H01L21/306 ,  H01L21/461

    CPC classification number: B81C1/00476 ,  B81C1/00547 ,  B81C2201/0109 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/112 ,  B82Y30/00

    Abstract: An etching method, such as for forming a micromechanical device, is disclosed. One embodiment of the method is for releasing a micromechanical structure, comprising, providing a substrate; providing a sacrificial layer directly or indirectly on the substrate; providing one or more micromechanical structural layers on the sacrificial layer; performing a first etch to remove a portion of the sacrificial layer, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of the sacrificial layer; performing a second etch to remove additional sacrificial material in the sacrificial layer, the second etch comprising providing a gas that chemically but not physically etches the additional sacrificial material. Another embodiment of the method is for etching a silicon material on or within a substrate, comprising: performing a first etch to remove a portion of the silicon, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of silicon; performing a second etch to remove additional silicon, the second etch comprising providing an etchant gas that chemically but not physically etches the additional silicon.

    Abstract translation: 公开了一种诸如用于形成微机械装置的蚀刻方法。 该方法的一个实施例是用于释放微机械结构，包括：提供衬底; 在衬底上直接或间接提供牺牲层; 在所述牺牲层上提供一个或多个微机械结构层; 执行第一蚀刻以去除牺牲层的一部分，所述第一蚀刻包括提供蚀刻剂气体并激发蚀刻剂气体，以允许蚀刻剂气体在物理或化学和物理上移除牺牲层的该部分; 执行第二蚀刻以去除牺牲层中的附加牺牲材料，第二蚀刻包括提供化学上但不物理蚀刻附加牺牲材料的气体。 该方法的另一实施例是用于在衬底上或衬底内蚀刻硅材料，包括：执行第一蚀刻以去除硅的一部分，第一蚀刻包括提供蚀刻剂气体并激发蚀刻剂气体以允许蚀刻剂 物理或化学和物理的气体去除硅的部分; 执行第二蚀刻以去除附加的硅，第二蚀刻包括提供蚀刻剂气体，其化学地但不物理地蚀刻附加的硅。

    Three dimensional microstructures and method of making
    226.
    发明授权
    Three dimensional microstructures and method of making 失效
    三维微结构及其制作方法

    公开(公告)号：US06861205B2

    公开(公告)日：2005-03-01

    申请号：US10072360

    申请日：2002-02-06

    Applicant: Lawrence E. Bowman ,  Glen C. Dunham

    Inventor： Lawrence E. Bowman ,  Glen C. Dunham

    IPC: B81C1/00 ,  G03F7/00

    CPC classification number: B81C99/0095 ,  B33Y10/00 ,  B33Y70/00 ,  B81C2201/0109 ,  B81C2201/0159

    Abstract: A method of forming complex three-dimensional microstructures wherein an external stimulus is applied to a first layer of a photosensitive material, thereby creating voids in the first layer, and any material present in those voids is removed. A sacrificial material is then provided within at least a portion of the voids. This sacrificial layer fills the voids, either in whole or in part, and enables a second layer of photosensitive material to be stacked upon the first, while still preserving the pattern formed in the first layer. Once the sacrificial layer has been applied, a second layer of photosensitive material may then be stacked onto the first. Successive layers of photosensitive material and sacrificial material may be added until a final, complex three-dimensional structure is created. The sacrificial material may then be removed with a solvent such as carbon dioxide.

    Abstract translation: 形成复合三维微结构的方法，其中将外部刺激施加到感光材料的第一层，从而在第一层中产生空隙，并且去除存在于那些空隙中的任何材料。 然后在空隙的至少一部分内提供牺牲材料。 该牺牲层全部或部分地填充空隙，并且使第二层感光材料首先堆叠在一起，同时仍然保留形成在第一层中的图案。 一旦施加了牺牲层，则可以将第二层感光材料层叠在第一层上。 可以加入感光材料和牺牲材料的连续层，直到产生最终的复杂三维结构。 然后可以用诸如二氧化碳的溶剂除去牺牲材料。

    Multi-metal layer MEMS structure and process for making the same
    228.
    发明申请
    Multi-metal layer MEMS structure and process for making the same 有权

    公开(公告)号：US20050000932A1

    公开(公告)日：2005-01-06

    申请号：US10902984

    申请日：2004-07-30

    Applicant: Kaigham Gabriel ,  Xu Zhu

    Inventor： Kaigham Gabriel ,  Xu Zhu

    IPC: B81B3/00 ,  B81C1/00 ,  C23F1/00 ,  H01G4/00 ,  H01G5/00 ,  H01G7/00 ,  H01G9/00 ,  H01G13/00 ,  H01H59/00 ,  H01L23/48 ,  H01L23/52 ,  H04R19/00 ,  H04R19/02 ,  H04R19/04 ,  H04R31/00

    CPC classification number: B81C1/00158 ,  B81B2201/018 ,  B81B2201/0257 ,  B81C2201/0109 ,  H01G5/16

    Abstract: The present invention is directed to a structure comprised of alternating layers of metal and sacrificial material built up using standard CMOS processing techniques, a process for building such a structure, a process for fabricating devices from such a structure, and the devices fabricated from such a structure. In one embodiment, a first metal layer is carried by a substrate. A first sacrificial layer is carried by the first metal layer. A second metal layer is carried by the sacrificial layer. The second metal layer has a portion forming a micro-machined metal mesh. When the portion of the first sacrificial layer in the area of the micro-machined metal mesh is removed, the micro-machined metal mesh is released and suspended above the first metal layer a height determined by the thickness of the first sacrificial layer. The structure may be varied by providing a base layer of sacrificial material between the surface of the substrate and the first metal layer. In that manner, a portion of the first metal layer may form a micro-machined mesh which is released when a portion of the base sacrificial layer in the area of the micro-machined mesh is removed. Additionally, a second layer of sacrificial material and a third metal layer may be provided. A micro-machined mesh may be formed in a portion of the third metal layer. The structure of the present invention may be used to construct variable capacitors, switches and, when certain of the meshes are sealed, microspeakers and microphones.

    Methods of forming void regions, dielectric regions and capacitor constructions
    229.
    发明申请
    Methods of forming void regions, dielectric regions and capacitor constructions 有权

    公开(公告)号：US20040198016A1

    公开(公告)日：2004-10-07

    申请号：US10827933

    申请日：2004-04-19

    Inventor： Jerome Michael Eldridge

    IPC: H01L021/20 ,  H01L021/76

    CPC classification number: B81C1/00119 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00047 ,  B81C2201/0109 ,  B81C2201/0146 ,  H01L21/31138 ,  H01L28/40

    Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.

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