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    Method for achieving good adhesion between dielectric and organic material
    221.
    发明授权
    Method for achieving good adhesion between dielectric and organic material 有权

    公开(公告)号：US09908774B2

    公开(公告)日：2018-03-06

    申请号：US15024942

    申请日：2014-09-15

    Applicant: CAVENDISH KINETICS, INC.

    Inventor： Mickael Renault

    IPC: B81C1/00

    CPC classification number: B81C1/0038 ,  B81C1/00801 ,  B81C2201/0108 ,  B81C2201/0176 ,  B81C2201/053

    Abstract: The present invention generally relates to a method for forming a MEMS device and a MEMS device formed by the method. When forming the MEMS device, sacrificial material is deposited around the switching element within the cavity body. The sacrificial material is eventually removed to free the switching element in the cavity. The switching element has a thin dielectric layer thereover to prevent etchant interaction with the conductive material of the switching element. During fabrication, the dielectric layer is deposited over the sacrificial material. To ensure good adhesion between the dielectric layer and the sacrificial material, a silicon rich silicon oxide layer is deposited onto the sacrificial material before depositing the dielectric layer thereon.

    MEMS chip and manufacturing method therefor
    225.
    发明授权
    MEMS chip and manufacturing method therefor 有权
    MEMS芯片及其制造方法

    公开(公告)号：US09580301B2

    公开(公告)日：2017-02-28

    申请号：US14411537

    申请日：2013-06-29

    Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.

    Inventor： Dan Dai ,  Xinwei Zhang ,  Guoping Zhou ,  Changfeng Xia

    IPC: B81B7/00 ,  B81C1/00

    CPC classification number: B81C1/00825 ,  B81B7/0029 ,  B81C1/0038 ,  B81C2201/0167 ,  B81C2201/053

    Abstract: A MEMS chip (100) includes a silicon substrate layer (110), a first oxidation layer (120) and a first thin film layer (130). The silicon substrate layer includes a front surface (112) for a MEMS process and a rear surface (114), both the front surface and the rear surface being polished surfaces. The first oxidation layer is mainly made of silicon dioxide and is formed on the rear surface of the silicon substrate layer. The first thin film layer is mainly made of silicon nitride and is formed on the surface of the first oxidation layer. In the above MEMS chip, by sequentially laminating a first oxidation layer and a first thin film layer on the rear surface of a silicon substrate layer, the rear surface is effectively protected to prevent the scratch damage in the course of a MEMS process. A manufacturing method for the MEMS chip is also provided.

    Abstract translation: MEMS芯片（100）包括硅衬底层（110），第一氧化层（120）和第一薄膜层（130）。 硅衬底层包括用于MEMS工艺的前表面（112）和后表面（114），前表面和后表面都是​​抛光表面。 第一氧化层主要由二氧化硅制成，并形成在硅衬底层的后表面上。 第一薄膜层主要由氮化硅制成，并且形成在第一氧化层的表面上。 在上述MEMS芯片中，通过在硅衬底层的后表面依次层叠第一氧化层和第一薄膜层，有效地保护后表面以防止在MEMS工艺过程中的划痕损伤。 还提供了一种用于MEMS芯片的制造方法。

    RELEASE CHEMICAL PROTECTION FOR INTEGRATED COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) AND MICRO-ELECTRO-MECHANICAL (MEMS) DEVICES
    229.
    发明申请
    RELEASE CHEMICAL PROTECTION FOR INTEGRATED COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) AND MICRO-ELECTRO-MECHANICAL (MEMS) DEVICES 审中-公开
    用于集成的补充金属氧化物半导体（CMOS）和微机电（MEMS）器件的化学保护

    公开(公告)号：US20170015547A1

    公开(公告)日：2017-01-19

    申请号：US15281589

    申请日：2016-09-30

    Applicant: INVENSENSE, INC.

    Inventor： Michael J. Daneman ,  Fariborz Assaderaghi

    IPC: B81C1/00 ,  B81B7/00

    CPC classification number: B81C1/00246 ,  B81B7/0025 ,  B81B7/007 ,  B81B2207/015 ,  B81C1/00531 ,  B81C1/00539 ,  B81C1/00801 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2201/053 ,  B81C2203/0735

    Abstract: Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.

    Abstract translation: 提供了保护CMOS层免于暴露于释放化学品的系统和方法。 释放化学品用于释放与CMOS晶片集成的微机电（MEMS）器件。 在互补金属氧化物半导体（CMOS）晶片中产生的钝化开口的侧壁暴露了CMOS释放化学品接触时可能损坏的CMOS晶片的电介质层。 在一个方面，为了保护CMOS晶片并防止电介质层的暴露，钝化开口的侧壁可以被抵抗释放化学品的金属阻挡层覆盖。 另外或可选地，可以在CMOS晶片的表面上沉积绝缘阻挡层，以保护钝化层免于暴露于释放化学品。

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