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公开(公告)号：US11711909B2
公开(公告)日：2023-07-25
申请号：US17398725
申请日：2021-08-10
Applicant: KIOXIA CORPORATION
Inventor： Akitoshi Suzuki
CPC classification number: H05K7/20436 , H05K1/0203 , H05K5/006 , H05K5/0008 , H05K7/20136 , H05K7/20472 , H05K1/144 , H05K1/181 , H05K2201/042 , H05K2201/10015 , H05K2201/10159 , H05K2201/10189 , H05K2201/10409 , H05K2201/10424 , H05K2201/10522
Abstract: An electronic device includes a top plate having a first surface and a second surface that is positioned at an elevation that is lower than an elevation of the first surface, the second surface extending from a first end part of the top plate to a second end part of the top plate, a bottom plate provided under the top plate, and a circuit board placed between the top plate and the bottom plate and mounted with an electronic component. The top plate has opposing first and second edges and opposing third and fourth edges that are perpendicular to the first and the second edges, the first end part being formed at the first edge and the second end part being formed at the second edge.
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公开(公告)号：US11682845B2
公开(公告)日：2023-06-20
申请号：US17373000
申请日：2021-07-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kwanghyun Baek , Seungtae Ko , Kijoon Kim , Juho Son , Sangho Lee , Youngju Lee , Jungyub Lee , Yonghun Cheon , Dohyuk Ha
CPC classification number: H01Q21/065 , H01Q1/246 , H01Q1/42 , H04B7/0413 , H05K1/181 , H05K9/0049 , H05K2201/042 , H05K2201/10015 , H05K2201/10098 , H05K2201/10719 , H05K2201/10734
Abstract: A communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT) are provided. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. According to the disclosure, an antenna module includes a first substrate layer on which at least one substrate is stacked; an antenna coupled to an upper end surface of the first substrate layer; a second substrate layer having an upper end surface coupled to a lower end surface of the first substrate layer and on which at least one substrate is stacked; and a radio frequency (RF) element coupled to a lower end surface of the second substrate layer.
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公开(公告)号：US20230187912A1
公开(公告)日：2023-06-15
申请号：US17867398
申请日：2022-07-18
Applicant: Server Technology, Inc.
Inventor： Carrel W. Ewing , Andrew J. Cleveland , James P. Maskaly
IPC: H02B1/06 , H01R25/00 , G06F1/18 , H05K1/02 , H05K1/14 , H02B1/015 , H05K1/11 , H05K13/00 , H05K5/00 , H05K5/02
CPC classification number: H02B1/06 , H01R25/006 , G06F1/189 , H05K1/0262 , H05K1/144 , H02B1/015 , H05K1/115 , H05K13/00 , H05K1/0298 , H05K5/0026 , H05K5/0247 , Y10T29/49139 , Y10T29/49117 , Y10T29/4913 , H05K2201/042
Abstract: Methods, systems, and apparatuses provide power from multiple input power sources to adjacent outputs efficiently and reliably. Aspects of the disclosure provide a power distribution unit (PDU) that includes a number of power outputs including first and second adjacent power outputs. The PDU includes a printed circuit board having a first conducting layer electrically interconnected to a first power input connection and the first power output, a second conducting layer that is at least partially above the first conducting layer and in facing relationship thereto. The second conducting layer is electrically insulated from the first conducting layer and electrically interconnected with a second power input connection and the second power output, the first and second power outputs thereby connected to different power inputs.
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公开(公告)号：US20190215964A1
公开(公告)日：2019-07-11
申请号：US16327435
申请日：2016-09-27
Applicant: Intel Corporation
Inventor： Brian J. Long
CPC classification number: H05K1/186 , H01R12/721 , H05K1/111 , H05K1/117 , H05K1/141 , H05K1/181 , H05K1/185 , H05K3/284 , H05K3/34 , H05K3/368 , H05K3/4015 , H05K2201/042 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10159 , H05K2201/10378 , H05K2201/10545 , H05K2201/10734 , H05K2203/0228 , H05K2203/107 , H05K2203/1316 , H05K2203/1327
Abstract: Aspects of the disclosure are directed to an edge card that includes a printed circuit board having a top side and a bottom side. The top side of the printed circuit board can include one or more top-side circuit components, and a plurality of top-side metal contact fingers, at least some of the top-side metal contact fingers electrically connected to at least one of the one or more circuit components. The bottom side of the printed circuit board can include one or more bottom-side circuit components. The bottom side of the printed circuit board can also include a substrate interposer having a top side and a bottom side. The top side of the substrate interposer can include one or more passive circuit components at least partially embedded in the substrate interposer, and one or more solder balls arranged around the one or more passive circuit components.
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公开(公告)号：US20190207342A1
公开(公告)日：2019-07-04
申请号：US16234459
申请日：2018-12-27
Applicant: Arista Networks, Inc.
Inventor： Charles Melvin Aden , Robert Wilcox
CPC classification number: H01R13/514 , H01R12/724 , H01R12/73 , H01R12/79 , H01R43/26 , H05K1/144 , H05K3/368 , H05K2201/042 , H05K2201/1031 , H05K2201/10333
Abstract: Apparatus with orthogonal connectors. The apparatus includes a circuit board and the circuit board includes a set of processing devices. A first connector is coupled to the circuit board and the set of processing devices. A first housing of the first connector is configured to interface with a second housing of a second connector while the first connector and second connector are inserted into a third connector
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Patent Agency Ranking
公开(公告)号：US20190163245A1
公开(公告)日：2019-05-30
申请号：US15825703
申请日：2017-11-29
Applicant: Facebook, Inc.
Inventor： Chuankeat Kho , John Edward Fernandes , Yueming Li
CPC classification number: G06F1/20 , G06F1/185 , H05K1/0206 , H05K1/117 , H05K1/144 , H05K1/181 , H05K7/1402 , H05K7/1409 , H05K7/20409 , H05K7/20509 , H05K2201/042 , H05K2201/066
Abstract: An interface adapter may include a printed circuit board that includes an edge connector dimensioned to be inserted into an expansion socket of a computing device. The interface adapter may also include a plurality of modular computing components removably mounted to a top surface of the printed circuit board, where each modular computing component includes a connector dimensioned to be inserted into a socket of the printed circuit board and the connector of each modular computing component includes a pinout that is more compact than a pinout of the edge connector of the printed circuit board. In addition, the interface adapter may include one or more modular heatsinks coupled to a top surface of each modular computing component to facilitate heat dissipation from the top surface of the modular computing component. Various other apparatuses, systems, and methods are also disclosed.
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公开(公告)号：US20180368262A1
公开(公告)日：2018-12-20
申请号：US15562992
申请日：2015-08-21
Applicant: Renesas Electronics Corporation
Inventor： Norikazu MOTOHASHI , Tomohiro NISHIYAMA , Tadashi SHIMIZU , Shinji NISHIZONO
IPC: H05K1/18 , H05K1/11 , H05K1/14 , H02M7/00 , H02P27/06 , H01L23/31 , H01L23/495 , H02K11/33 , F02M37/08
CPC classification number: H05K1/181 , F02M37/08 , F02M2037/085 , H01L23/3107 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L23/49575 , H02K11/33 , H02K2211/03 , H02M7/003 , H02M7/48 , H02P27/06 , H05K1/115 , H05K1/14 , H05K2201/042 , H05K2201/09027 , H05K2201/09063 , H05K2201/10166
Abstract: A plurality of semiconductor devices each including a semiconductor chip having a high-side MOSFET and a semiconductor chip having a low-side MOSFET are mounted on a wiring board (PB1). The wiring board (PB1) includes a power supply wiring WV1 to which a power supply potential is supplied and output wirings WD1, WD2, and WD3 electrically connecting a low-side drain terminal of each of the plurality of semiconductor devices to a plurality of output terminals. A minimum value and a maximum value of a current path width in the power supply wiring WV1 are referred to as a first minimum width and a first maximum width, respectively, and a minimum value and a maximum value of a current path width in the output wirings WD1, WD2, and WD3 are referred to as a second minimum width and a second maximum width, respectively. When the first minimum width is smaller than the second minimum width, the first minimum width is larger than half of the second maximum width, and when the second minimum width is smaller than the first minimum width, the second minimum width is larger than half of the first maximum width.
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公开(公告)号：US20180337319A1
公开(公告)日：2018-11-22
申请号：US15979238
申请日：2018-05-14
Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Inventor： Masaki MIGITA
CPC classification number: H01L35/32 , H01L33/36 , H01L33/644 , H01L33/645 , H01L35/10 , H01S5/005 , H01S5/02216 , H01S5/02248 , H01S5/02276 , H01S5/02296 , H01S5/02415 , H01S5/02438 , H01S5/02476 , H01S5/0683 , H01S5/3401 , H05K1/0203 , H05K1/0204 , H05K1/145 , H05K2201/042 , H05K2201/10106 , H05K2201/10219
Abstract: A light emitting apparatus includes: a module including a Peltier device with a first face and a second face, a supporting member with a principal surface, and a light emitting semiconductor device, the first face being opposite to the second face; and a package housing the module, the principal surface having a first area and a second area adjacent to the first area, the supporting member supporting the first face of the Peltier device on the first area of the principal surface, and the supporting member supporting the light emitting semiconductor device on the second area of the principal surface.
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公开(公告)号：US20180303371A1
公开(公告)日：2018-10-25
申请号：US15949603
申请日：2018-04-10
Applicant: NIHON KOHDEN CORPORATION
Inventor： Norihito Konno , Minori Hosoi
IPC: A61B5/0428 , H05K1/18 , H05K1/14 , A61N1/39
CPC classification number: A61B5/04282 , A61B2562/164 , A61B2562/182 , A61N1/3925 , H05K1/147 , H05K1/181 , H05K2201/042 , H05K2201/056
Abstract: Provided is a physiological information detection sensor capable of implementing miniaturization by substantially securing a creepage distance and an air distance (e.g., implementing defibrillation protection).The physiological information detection sensor includes: a plurality of first substrates arranged in multiple tiers; a second substrate; a first connecting portion that electrically connects adjacent first substrates to each other among the plurality of first substrates; and an insulating member. Each of the plurality of first substrates has a defibrillation protection resistor mounted thereon and electrically connected to a physiological information detection unit. The second substrate has a circuit mounted thereon to process physiological information input from the physiological information detection unit via the defibrillation protection resistor. The insulating member is disposed between adjacent first substrates among the plurality of first substrates.
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公开(公告)号：US20180241285A1
公开(公告)日：2018-08-23
申请号：US15441123
申请日：2017-02-23
Applicant: Schaft Inc.
Inventor： Akihiko Sasaki , Nobuyuki Ito , Junichi Urata
CPC classification number: H02K9/005 , H02K11/33 , H05K1/0204 , H05K1/05 , H05K1/09 , H05K1/144 , H05K1/181 , H05K2201/042 , H05K2201/066 , H05K2201/10166 , H05K2201/10416
Abstract: A system includes a primary Printed Circuit Board (PCB) and a heat transfer device that is attached to the primary PCB. The primary PCB includes a heat generating device and a thermal conductive inlay attached to the heat generating device. The heat transfer device includes a secondary PCB that is thermally coupled to the primary PCB, and a heat dissipation block. The heat dissipation block has a first side attached to the thermal conductive inlay of the primary PCB and a second side attached to the secondary PCB.
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