公开(公告)号：US20120167386A1

公开(公告)日：2012-07-05

申请号：US13420167

申请日：2012-03-14

Applicant: Joel R. Goergen ,  Greg Hunt

Inventor： Joel R. Goergen ,  Greg Hunt

IPC: H05K3/42

CPC classification number: H05K3/429 ,  H05K1/0216 ,  H05K1/0237 ,  H05K3/0047 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09845 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/175 ,  Y10T29/49165

Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru-holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.

Abstract translation: 公开了一种高速路由器背板。 路由器背板在多个信号层上使用差分信号对，每个信号对夹在一对数字接地层之间。 通孔用于将差分信号对连接到外部组件。 为了降低路由复杂度，差分信号对中的至少一些在其路径的某处沿着不同的信号层路由通路对。 钻出至少一些通孔和通孔以减少孔的导电短截线长度部分。 孔的钻孔部分包括从第一轮廓到第二轮廓的转变，以减少从钻孔的端部的射频反射。

公开(公告)号：US08202118B2

公开(公告)日：2012-06-19

申请号：US12891198

申请日：2010-09-27

Applicant: Thomas S. Cohen ,  Mark W. Gailus ,  John R. Dunham

Inventor： Thomas S. Cohen ,  Mark W. Gailus ,  John R. Dunham

IPC: H01R13/648

CPC classification number: H01R12/716 ,  H01R12/585 ,  H01R12/724 ,  H01R12/727 ,  H01R13/514 ,  H01R13/6474 ,  H01R13/6587 ,  H01R13/6591 ,  H05K1/14 ,  H05K7/1445 ,  H05K2201/044 ,  H05K2201/10189 ,  H05K2203/1572

Abstract: A differential connector has a plurality of rows. Each row includes a plurality of signal conductors provided as differential pairs. Each signal conductor has a first contact end connectable to a printed circuit board, a second contact end, and an intermediate portion having a first width. For each differential pair, one first contact end lies along a first line parallel to the plurality of rows and the other first contact end lies along a second line parallel to and spaced from the first line. The differential connector further includes a plurality of ground conductors, with each ground conductor corresponding to a differential pair. Each ground conductor has a first contact end connectable to the printed circuit board, a second contact end, and an intermediate portion having a second width that is at least twice the first width.

Abstract translation: 差分连接器具有多行。 每行包括多个作为差分对提供的信号导体。 每个信号导体具有可连接到印刷电路板的第一接触端，第二接触端和具有第一宽度的中间部分。 对于每个差分对，一个第一接触端沿着平行于多个行的第一线设置，而另一个第一接触端沿着与第一线平行并与之隔开的第二线。 差分连接器还包括多个接地导体，每个接地导体对应于差分对。 每个接地导体具有可连接到印刷电路板的第一接触端，第二接触端和具有至少为第一宽度的两倍的第二宽度的中间部分。

公开(公告)号：US20120051686A1

公开(公告)日：2012-03-01

申请号：US12873980

申请日：2010-09-01

Applicant: Richard C.A. Pitwon

Inventor： Richard C.A. Pitwon

IPC: G02B6/12 ,  G02B6/40 ,  G02B6/26

CPC classification number: G02B6/12004 ,  G02B6/138 ,  H01S3/0637 ,  H01S3/094061 ,  H01S3/1603 ,  H01S3/1605 ,  H01S3/1606 ,  H01S3/1615 ,  H01S3/168 ,  H01S3/178 ,  H01S3/2308 ,  H01S3/2383 ,  H05K1/0274 ,  H05K1/142 ,  H05K2201/044

Abstract: The invention provides an optical printed circuit board, comprising: plural polymer waveguide sections from independent waveguides, each of the sections being doped with an amplifying dopant; an optical pump source to pump the plural polymer waveguide sections, wherein the plural waveguide sections are arranged close or adjacent to one another such that a the optical pump source is able to pump plural of the optical waveguide sections.

Abstract translation: 本发明提供了一种光学印刷电路板，包括：来自独立波导的多个聚合物波导部分，每个部分掺杂有放大掺杂剂; 用于泵浦多个聚合物波导部分的光泵浦源，其中多个波导部分彼此靠近或相邻地布置，使得光泵浦源能够泵浦多个光波导部分。

公开(公告)号：US08045340B2

公开(公告)日：2011-10-25

申请号：US12330410

申请日：2008-12-08

Applicant: Hans-Jürgen Heinrichs ,  Melanie Sell

Inventor： Hans-Jürgen Heinrichs ,  Melanie Sell

IPC: H05K7/02 ,  H05K7/04

CPC classification number: G06F1/185 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/10189

Abstract: The invention relates to a data processing system with a main board, in which main board has at least one multipoint connector, in which at least one riser card is accommodated, and a first daughter card is accommodated in first riser card in such a manner that first daughter card is arranged parallel to main board. The data processing system further comprises a second multipoint connector, wherein a second riser card is accommodated in second multipoint connector, and a second daughter card is accommodated in second riser card in such a manner that second daughter card is arranged parallel to main board. The First multipoint connector and the second multipoint connectors are arranged on opposite outer sides of the main board. Each daughter card comprises a respective I/O interface which each cooperates with a common rear panel and is pointed towards the common rear panel. Relative to second daughter card, first daughter card is arranged rotated by 180° about an axis running parallel to main board.

Abstract translation: 本发明涉及一种具有主板的数据处理系统，其中主板具有至少一个多点连接器，其中容纳至少一个转接卡，并且第一子卡被容纳在第一转接卡中，使得 第一个子卡与主板平行排列。 数据处理系统还包括第二多点连接器，其中第二转接卡被容纳在第二多点连接器中，并且第二子卡被容纳在第二转接卡中，使得第二子卡平行于主板布置。 第一多点连接器和第二多点连接器布置在主板的相对的外侧上。 每个子卡包括各自的I / O接口，每个I / O接口与公共后面板协作并且指向公共后面板。 相对于第二子卡，第一子卡围绕平行于主板的轴线旋转180°。

公开(公告)号：US08026450B2

公开(公告)日：2011-09-27

申请号：US11978808

申请日：2007-10-30

Applicant: Joel R. Goergen

Inventor： Joel R. Goergen

IPC: H05K1/00

CPC classification number: H05K3/4688 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0271 ,  H05K1/116 ,  H05K3/382 ,  H05K3/429 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/044 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/09327 ,  H05K2201/09354 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49163 ,  Y10T29/49165

Abstract: A circuit board comprises a center segment distributing power and low-speed signaling, and outer segments for high-speed signaling. The segments use dielectric materials with different dielectric constants, with the outer segments supporting higher-speed signal transmission.

Abstract translation: 电路板包括分配功率和低速信号的中心段，以及用于高速信令的外部段。 这些段使用具有不同介电常数的介电材料，外部段支持更高速度的信号传输。

公开(公告)号：US08018733B2

公开(公告)日：2011-09-13

申请号：US12965530

申请日：2010-12-10

Applicant: Gongxian Jia

Inventor： Gongxian Jia

IPC: H05H1/14

CPC classification number: H05K1/14 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01R12/52 ,  H05K1/0237 ,  H05K3/222 ,  H05K3/366 ,  H05K3/4046 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09809 ,  H05K2201/10189 ,  H05K2201/10287 ,  H05K2201/10356 ,  H05K2203/1572 ,  Y10T29/49139 ,  H01L2224/0401

Abstract: A circuit board interconnection system is disclosed according to the embodiments of the present invention. The system includes a first circuit board, a second circuit board, a third circuit board, a first connector and a second connector. The first connector and the second connector are mounted at two sides of the first circuit board respectively so that the second circuit board mounted on the first connector is perpendicular to the third circuit board on the second connector. The first connector and the second connector mounted respectively at two sides of the first circuit board are coupled to each other via an impedance controlled mechanism on the first circuit board. Another circuit board interconnection system, a circuit board, a connector assembly and a method for manufacturing a circuit board are disclosed according to the present invention. The circuit board adopts the impedance controlled mechanism which has a shielding function and an impedance controlled function to replace a via hole on the existing circuit board where the via hole has an uncontrollable resistance.

公开(公告)号：US20110189868A1

公开(公告)日：2011-08-04

申请号：US12938965

申请日：2010-11-03

Applicant: Brian Peter KIRK

Inventor： Brian Peter KIRK

IPC: H01R12/71 ,  H05K3/36

CPC classification number: H05K1/0228 ,  H01R13/6469 ,  H01R13/6587 ,  H05K1/0245 ,  H05K2201/044 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/10189 ,  Y10T29/49117

Abstract: A connector for connecting a first printed circuit board with a second printed circuit board that comprises a first column of differential signal pair launches offset from a second column of differential signal pair launches on the first printed circuit board so that each differential signal pair in the first column is closest to a launch of a first polarity in a corresponding differential signal pair in the second column on the first circuit board, a first column of differential signal pair launches offset from a second column of differential signal pair launches on the second printed circuit board so that each differential signal pair in the first column is closest to a launch of a second polarity, opposite the first polarity, in a corresponding signal pair in the second column on the second circuit board, and a connector electrically connecting the first column of differential signal pair launches on the first printed circuit board to the first column of differential signal pair launches on the second printed circuit board and electrically connecting the second column of differential signal pair launches on the first printed circuit board to the second column of differential signal pair launches on the second printed circuit board.

Abstract translation: 一种用于将第一印刷电路板与第二印刷电路板连接的连接器，该第二印刷电路板包括第一列差分信号对，从第二列差分信号对发射偏移，在第一印刷电路板上启动，使得第一列中的每个差分信号对在第一 列最靠近第一电路板上的第二列中对应的差分信号对中的第一极性的发射，第一列差分信号对从第二印刷电路板上的差分信号对的第二列发射偏移 使得第一列中的每个差分信号对在第二电路板上的第二列中的相应信号对中最接近与第一极性相反的第二极性的发射，以及电连接第一列差分 信号对在第一印刷电路板上发射到差分信号对lau的第一列 在所述第二印刷电路板上进行钳位，并将所述第一印刷电路板上的第二列差分信号对发射电连接到所述第二印刷电路板上的所述差分信号对的第二列。

公开(公告)号：US20110058298A1

公开(公告)日：2011-03-10

申请号：US12555583

申请日：2009-09-08

Applicant: Joseph Kuczynski ,  Melissa K. Miller ,  Heidi Williams ,  Jing Zhang

Inventor： Joseph Kuczynski ,  Melissa K. Miller ,  Heidi Williams ,  Jing Zhang

IPC: H02H5/04

CPC classification number: H05K1/0201 ,  H05K1/0268 ,  H05K3/306 ,  H05K2201/044 ,  H05K2201/10053 ,  H05K2201/10151 ,  H05K2201/10189 ,  H05K2201/10545

Abstract: A method and apparatus directed to detecting and preventing excessive heating in power connectors is disclosed. In one embodiment, a system includes a power connector having an array of pins. A circuit board, such as a midplane of a blade server chassis, has an array of electrical vias passing through the circuit board that are arranged to receive the array of pins and at least one heat flux sensor positioned on one of the vias at the back of the midplane. The heat flux sensor is configured for generating an electrical signal in relation to an applied heat flux. A controller in communication with the heat flux sensor is configured for powering off the electrical power supply in response to the electrical signal reaching a setpoint corresponding to a selected heat flux threshold.

Abstract translation: 公开了一种用于检测和防止电力连接器中的过度加热的方法和装置。 在一个实施例中，系统包括具有引脚阵列的电源连接器。 电路板，例如刀片服务器机箱的中平面，具有通过电路板的电气通孔阵列，其布置成接收引脚阵列，并且至少一个热通量传感器位于后面的通孔中的一个上 的中平面。 热通量传感器被配置为相对于施加的热通量产生电信号。 与热通量传感器通信的控制器被配置为响应于电信号达到对应于所选择的热通量阈值的设定点来断电电源。

公开(公告)号：US07863912B2

公开(公告)日：2011-01-04

申请号：US11998607

申请日：2007-11-30

Applicant: Charles Calvin Byers ,  Thomas B. Cook ,  Bradford Gene Van Treuren

Inventor： Charles Calvin Byers ,  Thomas B. Cook ,  Bradford Gene Van Treuren

IPC: G01R31/304

CPC classification number: H05K1/14 ,  H04B10/803 ,  H05K2201/044 ,  H05K2201/10121

Abstract: System including backplane, and first and second circuit boards. First circuit board is attached to backplane and has first optical signal transmitter. Second circuit board is attached to backplane and has first optical signal receiver. First optical signal transmitter and first optical signal receiver are separated by free space and form optical communication link configured for circuit board test signal communication from first circuit board to second circuit board through the free space. Method includes providing backplane and first and second circuit boards, where first circuit board is attached to backplane and has first optical signal transmitter, and second circuit board is attached to backplane and has first optical signal receiver. First optical signal transmitter and first optical signal receiver are separated by free space, and form optical communication link. Method additionally includes transmitting circuit board test signal from first circuit board to second circuit board through the free space.

Abstract translation: 系统包括背板，第一和第二电路板。 第一个电路板连接到背板，并具有第一个光信号发射器。 第二电路板连接到背板，并具有第一个光信号接收器。 第一光信号发射机和第一光信号接收机由自由空间分开，形成光通信链路，配置用于通过自由空间从第一电路板到第二电路板的电路板测试信号通信。 方法包括提供背板和第一和第二电路板，其中第一电路板连接到背板并具有第一光信号发射器，并且第二电路板附接到背板并具有第一光信号接收器。 第一光信号发射机和第一光信号接收机由空闲空间分开，形成光通信链路。 方法还包括通过自由空间将电路板测试信号从第一电路板发送到第二电路板。

公开(公告)号：US20100307798A1

公开(公告)日：2010-12-09

申请号：US12477853

申请日：2009-06-03

Applicant: Jamal S. Izadian

Inventor： Jamal S. Izadian

IPC: H05K1/03

CPC classification number: H05K1/142 ,  H01L23/642 ,  H01L23/66 ,  H01L24/16 ,  H01L24/24 ,  H01L24/82 ,  H01L25/50 ,  H01L2224/02379 ,  H01L2224/2402 ,  H01L2224/2405 ,  H01L2224/24101 ,  H01L2224/24145 ,  H01L2224/24226 ,  H01L2224/48101 ,  H01L2224/48227 ,  H01L2224/49173 ,  H01L2224/82203 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01056 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/3025 ,  H01R12/523 ,  H05K1/024 ,  H05K1/0245 ,  H05K1/025 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/0715 ,  H05K2201/09609 ,  H05K2201/097 ,  H01L2924/00

Abstract: Traditional High Speed Electronic Systems Interconnect experience several bandwidth bottlenecks along the multiplicity of signal paths that limits the information throughput. Here we build upon the cellular interconnect concept of PMTL, the Periodic Micro Transmission Line which was introduced in an earlier patent application, and provide a new type of transmission line VMPL, as the Vertical Micro Transmission Line approach to make all the elements of a high speed interconnect wideband, unified, scalable, and practical for high volume manufacturing. This provides total connectivity improvements from end-to-end of electronic systems that demands higher bandwidth, and increased information throughput, thermal management, and impeccable signal integrity. The technologies introduced here provide solutions for any level of the fan out from chips to systems, in CMOS, or Packages, and PCB's.

Abstract translation: 传统的高速电子系统互连经历了多种信号路径的带宽瓶颈，限制了信息吞吐量。 在这里，我们建立在早期专利申请中介绍的PMTL（即周期性微输电线路）的蜂窝互连概念的基础之上，并提供了一种新型的传输线VMPL，作为垂直微型传输线路的方法，使所有元素的高度 高速互连宽带，统一，可扩展，实用于大批量生产。 这提供了从端到端的电子系统的全面连接性改进，其要求更高的带宽，增加的信息吞吐量，热管理和无可挑剔的信号完整性。 这里介绍的技术为芯片到系统，CMOS或封装以及PCB中的任何级别的风扇提供了解决方案。