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公开(公告)号：US20160324002A1
公开(公告)日：2016-11-03
申请号：US15105723
申请日：2014-10-14
Applicant: Auto-Kabel Management GmbH
Inventor： Wacim TAZARINE , Simon BETSCHER , Frank GRONWALD
CPC classification number: H05K1/145 , C23C14/042 , H01L23/142 , H01L23/367 , H01L23/3677 , H01L2924/0002 , H05K1/0206 , H05K1/0209 , H05K1/056 , H05K1/111 , H05K1/117 , H05K1/142 , H05K1/181 , H05K1/182 , H05K3/28 , H05K3/282 , H05K3/368 , H05K2201/09372 , H05K2201/09554 , H05K2201/10166 , H05K2201/10689 , H05K2203/1377 , H01L2924/00
Abstract: Circuit having a first printed circuit board and a second printed circuit board. In the circuit, the printed circuit boards spaced apart from one another by means of an air gap are mechanically connected together by at least one power semiconductor.
Abstract translation: 具有第一印刷电路板和第二印刷电路板的电路。 在电路中，通过气隙彼此间隔开的印刷电路板通过至少一个功率半导体机械连接在一起。
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公开(公告)号：US08887385B2
公开(公告)日：2014-11-18
申请号：US13534217
申请日：2012-06-27
Applicant: Kai-Wen Wu
Inventor： Kai-Wen Wu
IPC: H05K3/02
CPC classification number: H05K1/0253 , H01R12/53 , H01R13/6474 , H05K1/0245 , H05K1/025 , H05K1/111 , H05K1/117 , H05K3/40 , H05K2201/09372 , H05K2201/10287 , Y10T29/49004 , Y10T29/49117 , Y10T29/4913 , Y10T29/49155
Abstract: A circuit board assembly includes a circuit board, at least one pad formed on the circuit board, and at least one connection line. Each of the at least one connection line includes a connection end connected to a respective one of the at least one pad and has the same resistance value as the respective pad.
Abstract translation: 电路板组件包括电路板，形成在电路板上的至少一个焊盘和至少一个连接线。 所述至少一个连接线中的每一个包括连接到所述至少一个焊盘中的相应一个焊盘并且具有与相应焊盘相同的电阻值的连接端。
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公开(公告)号：US20140326495A1
公开(公告)日：2014-11-06
申请号：US14240960
申请日：2012-08-27
Applicant: Jose Ricardo Paniagua
Inventor： Jose Ricardo Paniagua
CPC classification number: H05K1/116 , G06F17/5081 , G06F2217/82 , H05K1/0225 , H05K1/0245 , H05K1/0251 , H05K3/0005 , H05K3/0047 , H05K3/10 , H05K3/42 , H05K2201/0784 , H05K2201/09372 , H05K2201/095 , H05K2201/09718 , H05K2201/09727 , H05K2203/0207 , H05K2203/0242 , Y10T29/49165
Abstract: A printed circuit board for carrying high frequency signals. Conducting structures of the printed circuit board are shaped within breakout regions to limit impedance discontinuities in the signal paths between vias and conductive traces within the printed circuit board. Values of parameters of traces or anti-pads, for example, may be adjusted to provide a desired impedance. The specific values selected as part of designing a printed circuit board may match the impedance of the breakout region to that of the via. The parameters for which values are selected may include the trace width, thickness, spacing, length over an anti-pad or angle of exit from the breakout region.
Abstract translation: 用于承载高频信号的印刷电路板。 印刷电路板的导电结构在突出区域内成形，以限制印刷电路板内的通孔和导电迹线之间的信号路径中的阻抗不连续性。 痕迹或抗焊盘参数的值可以被调整以提供所需的阻抗。 选择作为设计印刷电路板的一部分的具体值可以将突破区域的阻抗与通孔的阻抗匹配。 选择值的参数可以包括迹线宽度，厚度，间隔，防焊盘上的长度或从断裂区域的出口角度。
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公开(公告)号：US12127341B2
公开(公告)日：2024-10-22
申请号：US17875683
申请日：2022-07-28
Applicant: THALES
Inventor： Geoffroy Aupee , Pierre-Yves Michaud
CPC classification number: H05K1/0298 , H05K1/181 , H05K3/10 , H05K3/42 , H05K3/4697 , H05K3/0094 , H05K3/04 , H05K2201/09372
Abstract: Embodiments provide a multilayer printed circuit board intended to connect electronic components, the board comprising a stack of a plurality of conductive layers, the conductive layers comprising two surface layers and one or more internal layers, the board comprising one or more counterbored holes, each counterbored hole comprising a portion with metallization opening onto one of the two surface layers and a portion without metallization opening onto the other surface layer; the multilayer printed circuit board may advantageously comprise one or more metal pads, each metal pad being joined to one of the two surface layers so as to occult the portion without metallization of a corresponding counterbored hole.
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公开(公告)号：US12082346B2
公开(公告)日：2024-09-03
申请号：US18175898
申请日：2023-02-28
Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Inventor： Masahiro Kyozuka
CPC classification number: H05K3/0011 , H05K1/0271 , H05K1/05 , H05K2201/093 , H05K2201/09372 , H05K2201/10204
Abstract: A wiring board includes a first insulating layer, a pad formed on one surface of the first insulating layer, a second insulating layer, formed on the one surface of the first insulating layer, and including an opening exposing the pad, and a reinforcing metal layer formed in contact with the first insulating layer, and provided around the pad so as to be separated from the pad in a plan view. The pad is disposed inside the opening without making contact with the second insulating layer. An end, on a side of the first insulating layer, in a portion of an inner side surface of the opening of the second insulating layer makes contact with the reinforcing metal layer, and an end in another portion of the inner side surface of the opening of the second insulating layer makes contact with the one surface of the first insulating layer.
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Patent Agency Ranking
公开(公告)号：US20180077789A1
公开(公告)日：2018-03-15
申请号：US15558940
申请日：2016-04-26
Applicant: CANON KABUSHIKI KAISHA
Inventor： Keita Yamazaki
CPC classification number: H05K1/0209 , H05K1/0203 , H05K1/0206 , H05K1/111 , H05K1/115 , H05K1/181 , H05K2201/09372 , H05K2201/09381 , H05K2201/094 , H05K2201/10553 , H05K2201/10727 , H05K2201/10969 , Y02P70/611
Abstract: A land group with which a terminal group of a semiconductor package has been jointed, a conductor pattern which has been arranged in a mounting area where the semiconductor package was mounted and which has been jointed with a heat radiation plate of the semiconductor package, a conductor pattern at least a part of which has been arranged on the outside of the mounting area, and a conductor pattern which connects the conductor patterns are formed on a printed-wiring board. The land group includes a land adjacent to the conductor pattern and a land which is not adjacent to the conductor pattern. The land is formed in a shape different from that of the land so as to be away from the conductor pattern.
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公开(公告)号：US20170318679A1
公开(公告)日：2017-11-02
申请号：US15523472
申请日：2015-10-29
Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
Inventor： Yoshiki SANTO
CPC classification number: H05K1/181 , B25J9/16 , H05K1/111 , H05K1/18 , H05K2201/09372 , H05K2201/09436 , H05K2201/09445 , H05K2201/10212 , H05K2201/10545 , H05K2201/10704
Abstract: A control circuit board includes first and second elements on each surface of a board member. The first and the second elements respectively have first and third edge portions, which are opposite to each other and second and fourth edge portions which are opposite to each other. A plurality of signal input pins are provided to the first edge portion, a plurality of signal output pins are provided to the third edge portion, a plurality of between-element communication input pins are provided to the second edge portion, and a plurality of between-element communication output pins are provided to the fourth edge portion, respectively. A common signal is input to the first and second elements and a communication is performed between the first element and the second element. Loss of control function can be surely prevented while suppressing enlargement of the board and increase of development/production cost.
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公开(公告)号：US09648742B2
公开(公告)日：2017-05-09
申请号：US15105723
申请日：2014-10-14
Applicant: Auto-Kabel Management GmbH
Inventor： Wacim Tazarine , Simon Betscher , Frank Gronwald
IPC: H05K7/10 , H05K1/14 , H05K1/05 , H05K3/36 , H05K7/00 , H05K1/16 , H05K1/18 , H05K3/28 , H01L23/14 , C23C14/04 , H01L23/367 , H05K1/02 , H05K1/11
CPC classification number: H05K1/145 , C23C14/042 , H01L23/142 , H01L23/367 , H01L23/3677 , H01L2924/0002 , H05K1/0206 , H05K1/0209 , H05K1/056 , H05K1/111 , H05K1/117 , H05K1/142 , H05K1/181 , H05K1/182 , H05K3/28 , H05K3/282 , H05K3/368 , H05K2201/09372 , H05K2201/09554 , H05K2201/10166 , H05K2201/10689 , H05K2203/1377 , H01L2924/00
Abstract: Circuit having a first printed circuit board and a second printed circuit board. In the circuit, the printed circuit boards spaced apart from one another by means of an air gap are mechanically connected together by at least one power semiconductor.
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公开(公告)号：US20170094771A1
公开(公告)日：2017-03-30
申请号：US15272201
申请日：2016-09-21
Applicant: CANON KABUSHIKI KAISHA
Inventor： Koji Noguchi
CPC classification number: H05K1/0203 , H05K1/0206 , H05K1/0209 , H05K1/181 , H05K2201/06 , H05K2201/09227 , H05K2201/09372 , H05K2201/10015 , H05K2201/10545
Abstract: A printed wiring board has thereon an electronic component having a heat radiation pad, and an electrolytic capacitor provided for the electronic component. The printed wiring board further has thereon another electronic component having another heat radiation pad and exhibiting a higher heat value than that of the electronic component, and another electrolytic capacitor provided for the other electronic component. The heat radiation pad of the electronic component, a ground terminal of the electrolytic capacitor, the other heat radiation pad for the other electronic component, and another ground terminal of the other electrolytic capacitor are connected by using a ground conductor. In the ground conductor, a thermal resistance between the other heat radiation pad and other ground terminal is lower than the thermal resistance between the heat radiation pad and the ground terminal.
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公开(公告)号：US20170064821A1
公开(公告)日：2017-03-02
申请号：US14840979
申请日：2015-08-31
Applicant: Kristof Darmawikarta , Daniel Sobieski , Kyu Oh Lee , Sri Ranga Sai Boyapati
Inventor： Kristof Darmawikarta , Daniel Sobieski , Kyu Oh Lee , Sri Ranga Sai Boyapati
CPC classification number: H05K1/0298 , H01L23/49822 , H01L23/49838 , H05K1/113 , H05K3/0041 , H05K3/181 , H05K3/188 , H05K3/4038 , H05K3/422 , H05K3/429 , H05K3/4644 , H05K2201/09218 , H05K2201/09372 , H05K2201/095 , H05K2201/096 , H05K2201/09654 , H05K2203/0548
Abstract: Some example forms relate to an electronic package. The electronic package includes a first dielectric layer that includes an electrical trace formed on a surface of the first dielectric layer and a second dielectric layer on the surface of the first dielectric layer. The second dielectric layer includes an opening. The electrical trace is within the opening. The electronic package includes an electrical interconnect that fills the opening and extends above an upper surface of the second dielectric layer such that the electrically interconnect is electrically connected to the electrical trace on the first dielectric layer.
Abstract translation: 一些示例形式涉及电子包装。 电子封装包括第一电介质层，其包括形成在第一电介质层的表面上的电迹线和在第一电介质层的表面上的第二电介质层。 第二电介质层包括开口。 电迹线在开口内。 电子封装包括电互连，其填充开口并且在第二电介质层的上表面上方延伸，使得电互连电连接到第一电介质层上的电迹线。
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