公开(公告)号：US11445596B2

公开(公告)日：2022-09-13

申请号：US17153856

申请日：2021-01-20

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Pei-Chang Huang

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/00

Abstract: A circuit board includes an open substrate and a heat dissipation block. The open substrate includes a substrate body, an opening and at least one first fixing portion and at least one second fixing portion. The substrate body has a top surface and a bottom surface. The opening is in the substrate body and has a first sidewall and a second sidewall opposite to the first sidewall. The first fixing portion and the second fixing portion extends from the substrate body toward the opening, in which the first fixing portion and the second fixing portion are respectively protruded from the first sidewall and the second sidewall. The heat dissipation block is directly clamped between the first fixing portion and the second fixing portion.

公开(公告)号：US20220287182A1

公开(公告)日：2022-09-08

申请号：US17826178

申请日：2022-05-27

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Yu-Hua Chen ,  Chun-Hsien Chien ,  Wen-Liang Yeh ,  Ra-Min Tain

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/46

Abstract: An embedded component structure includes a board, an electronic component, and a dielectric material layer. The board has a through cavity. The board includes an insulating core layer and a conductive member. The insulating core layer has a first surface and a second surface opposite thereto. The through cavity penetrates the insulating core layer. The conductive member extends from a portion of the first surface along a portion of the side wall of the through cavity to a portion of the second surface. The electronic component includes an electrode. The electronic component is disposed in the through cavity. The dielectric material layer is at least filled in the through cavity. The connection circuit layer covers and contacts the conductive member and the electrode. A manufacturing method of an embedded component structure is also provided.

公开(公告)号：US20220285255A1

公开(公告)日：2022-09-08

申请号：US17232109

申请日：2021-04-15

Applicant: Unimicron Technology Corp.

Inventor： Yan-Jia Peng ,  Kuo-Ching Chen ,  Pu-Ju Lin

IPC: H01L23/498 ,  H05K3/46 ,  H01L23/12 ,  H01L23/528 ,  H01L23/532 ,  H01L23/16 ,  H01L23/00 ,  H01L21/50 ,  H01L21/768

Abstract: A method of fabricating a wiring board with an embedded interposer substrate includes preparing a main substrate, forming a recess on the main substrate, placing an interposer substrate into the recess, electrically connecting a second pad of the interposer substrate and the first pad of the main substrate, and filling a gap between the interposer substrate and the main substrate with an underfill. The recess exposes a first pad of the main substrate. A second pad of interposer substrate and the first pad of the main substrate are made of the same metal and formed in different outer surface profiles. The underfill entirely touches side surfaces and a bottom surface of the interposer substrate.

公开(公告)号：US11430768B2

公开(公告)日：2022-08-30

申请号：US17182258

申请日：2021-02-23

Applicant: Unimicron Technology Corp.

Inventor： Tzu-Hsuan Wang ,  Chen-Hsien Liu

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/433 ,  H01L21/56 ,  H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L23/00

Abstract: A chip package structure includes a wiring board, a first chip, a second chip, a thermally conductive material, a molding compound and a heat dissipation part. The wiring board includes a plurality of circuit pads. The first chip is mounted on the wiring board and is electrically connected to at least one of the circuit pads. The first chip is located between the second chip and the wiring board. The thermally conductive material is located on the wiring board and penetrates the second chip and the first chip to extend to the wiring board. The molding compound is disposed on the wiring board, and the heat dissipation part is disposed on the molding material and thermally coupled to the thermally conductive material.

公开(公告)号：US11410940B2

公开(公告)日：2022-08-09

申请号：US17170736

申请日：2021-02-08

Applicant: Unimicron Technology Corp.

Inventor： Pu-Ju Lin ,  Cheng-Ta Ko ,  Yu-Hua Chen ,  Tzyy-Jang Tseng ,  Ra-Min Tain

IPC: H01L23/16 ,  H01L23/66 ,  H01L23/00 ,  H01L23/31

Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.

公开(公告)号：US20220240367A1

公开(公告)日：2022-07-28

申请号：US17198287

申请日：2021-03-11

Applicant: Unimicron Technology Corp.

Inventor： Ming-Hao WU ,  Kuo-Wei LI

IPC: H05K1/02 ,  H05K3/28 ,  B01J13/18 ,  B01J13/20 ,  C09D11/10

Abstract: A package structure having a solder mask layer with a low dielectric constant includes a substrate, a conductive structure on the substrate, and a solder mask layer on the substrate. The solder mask layer includes bubbles and a solder mask material, wherein the bubbles are disposed within the solder mask layer and the solder mask material covers the bubbles.

公开(公告)号：US20220238471A1

公开(公告)日：2022-07-28

申请号：US17200922

申请日：2021-03-15

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Ming-Ru Chen ,  Cheng-Chung Lo ,  Chin-Sheng Wang ,  Wen-Sen Tang

IPC: H01L23/00 ,  H01L25/075 ,  H01L27/12 ,  H01L33/62

Abstract: A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.

公开(公告)号：US20220217841A1

公开(公告)日：2022-07-07

申请号：US17185216

申请日：2021-02-25

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Chun Hung KUO ,  Kuo Ching CHEN

IPC: H05K1/02 ,  H05K3/20

Abstract: A circuit board is manufactured by mounting a first circuit layer, mounting a conductive bump on the first circuit layer, covering the first circuit layer with a first dielectric layer which exposes the conductive bump, mounting a second dielectric layer on the first dielectric layer with a second dielectric layer opening that exposes the conductive bump, and finally, mounting a second circuit layer on the surface of the second dielectric layer and in the second dielectric layer opening. Since the surface roughness of the second dielectric layer and the second dielectric layer opening is low, it is unlikely to form nano voids between the second dielectric layer and the second circuit layer, and the second circuit layer may be attached to the second dielectric layer firmly, which is an advantage for fine line circuit disposal.

公开(公告)号：US20220199513A1

公开(公告)日：2022-06-23

申请号：US17654405

申请日：2022-03-11

Applicant: Unimicron Technology Corp.

Inventor： Chun-Hao CHEN ,  Chia-Lung LIN ,  Chien-Hsiang CHOU ,  Yi-Lin CHIANG ,  Chien-Chen LIN

IPC: H01L23/498 ,  H01L21/48 ,  H05K1/11 ,  H05K3/06

Abstract: A wiring board includes an insulating layer, a wiring layer and a plurality of conductive columns. The insulating layer has a first surface and a second surface opposite to the first surface. The wiring layer is disposed in the insulating layer and has a third surface and a fourth surface opposite to the third surface. The insulating layer covers the third surface, and the second surface of the insulating layer is flush with the fourth surface of the wiring layer. The conductive columns are disposed in the insulating layer and connected to the wiring layer. The conductive columns extend from the third surface of the wiring layer to the first surface of the insulating layer, and protrude from the first surface.

公开(公告)号：US20220189923A1

公开(公告)日：2022-06-16

申请号：US17182258

申请日：2021-02-23

Applicant: Unimicron Technology Corp.

Inventor： Tzu-Hsuan WANG ,  Chen-Hsien LIU

IPC: H01L25/065 ,  H01L23/48 ,  H01L25/00 ,  H01L23/433 ,  H01L21/56 ,  H01L21/768

Abstract: A chip package structure includes a wiring board, a first chip, a second chip, a thermally conductive material, a molding compound and a heat dissipation part. The wiring board includes a plurality of circuit pads. The first chip is mounted on the wiring board and is electrically connected to at least one of the circuit pads. The first chip is located between the second chip and the wiring board. The thermally conductive material is located on the wiring board and penetrates the second chip and the first chip to extend to the wiring board. The molding compound is disposed on the wiring board, and the heat dissipation part is disposed on the molding material and thermally coupled to the thermally conductive material.