公开(公告)号：US20150146397A1

公开(公告)日：2015-05-28

申请号：US14404938

申请日：2013-05-30

Applicant: KYOCERA Corporation

Inventor： Yukio Fujihara ,  Kenjirou Fukuda

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/111 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15174 ,  H01L2924/181 ,  H05K1/02 ,  H05K1/112 ,  H05K1/117 ,  H05K1/181 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/0939 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: There is provided a wiring board capable of strengthening the bonding between an external terminal and a wiring of an external circuit board. A wiring board includes an insulating substrate having two main surfaces facing each other, side surfaces connecting to the two main surfaces and concave portions concave from the side surfaces and connecting to at least one of the two main surfaces; and external terminals disposed from one of the main surfaces to inner surfaces of the respective concave portions, each of the external terminals having a convex-shaped section disposed on one main surface side along each of the concave portions.

Abstract translation: 提供了能够加强外部端子与外部电路板的布线之间的接合的布线板。 布线基板包括具有彼此面对的两个主表面的绝缘基板，连接到两个主表面的侧表面和从侧表面凹入并连接到两个主表面中的至少一个的凹部; 以及外部端子，其从一个主表面设置到各个凹部的内表面，每个外部端子具有沿着每个凹部设置在一个主表面侧上的凸形部分。

公开(公告)号：US09021693B2

公开(公告)日：2015-05-05

申请号：US13477407

申请日：2012-05-22

Applicant: Jin Yong An ,  Jae Joon Lee

Inventor： Jin Yong An ,  Jae Joon Lee

IPC: H01K3/10 ,  H05K3/40 ,  H01L21/48 ,  H01L23/498 ,  H05K3/46 ,  H05K3/10 ,  H05K3/20

CPC classification number: H05K3/4007 ,  H01L21/4857 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2924/0002 ,  H05K3/108 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2203/0228 ,  H05K2203/0376 ,  H05K2203/054 ,  Y10T29/49126 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A method of manufacturing a printed circuit board, including: applying a dry film on a carrier and then patterning the dry film to form holes for forming metal bumps; forming an upper circuit layer including metal bumps charged in the holes and connection pads on the dry film; forming an insulation layer on the dry film; forming a build-up layer including a lower circuit layer on the insulation layer; removing the carrier; and removing the dry film.

Abstract translation: 一种制造印刷电路板的方法，包括：在载体上涂覆干膜，然后对干膜图案形成用于形成金属凸块的孔; 形成包含填充在孔中的金属凸块和干膜上的连接焊盘的上电路层; 在干膜上形成绝缘层; 在所述绝缘层上形成包括下电路层的堆积层; 移除载体; 并除去干膜。

公开(公告)号：US09006028B2

公开(公告)日：2015-04-14

申请号：US12558490

申请日：2009-09-11

Applicant: Ananda H. Kumar ,  Ashish Asthana ,  Farooq Quadri

Inventor： Ananda H. Kumar ,  Ashish Asthana ,  Farooq Quadri

IPC: H01L21/00 ,  G01R1/04 ,  H05K3/40 ,  G01R3/00 ,  H05K1/11 ,  H05K3/46

CPC classification number: H01L21/486 ,  G01R1/0491 ,  G01R3/00 ,  G01R31/2601 ,  H01L21/4807 ,  H01L21/4857 ,  H01L21/4867 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/10145 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15312 ,  H05K1/111 ,  H05K3/4007 ,  H05K3/4629 ,  H05K2201/0367 ,  H05K2203/308 ,  H01L2924/00 ,  H01L2924/00014

Abstract: This document describes the fabrication and use of multilayer ceramic substrates, having one or more levels of internal thick film metal conductor patterns, wherein any or all of the metal vias intersecting one or both of the major surface planes of the substrates, extend out of the surface to be used for making flexible, temporary or permanent interconnections, to terminals of an electronic component. Such structures are useful for wafer probing, and for packaging, of semiconductor devices.

Abstract translation: 本文件描述了具有一层或多层内部厚膜金属导体图案的多层陶瓷衬底的制造和使用，其中与衬底的一个或两个主表面相交的任何或全部金属通孔延伸出 用于制造柔性，暂时或永久互连的表面到电子部件的端子。 这种结构对于半导体器件的晶片探测和封装是有用的。

公开(公告)号：US08986555B2

公开(公告)日：2015-03-24

申请号：US12892047

申请日：2010-09-28

Applicant: Ji-Eun Kim ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

Inventor： Ji-Eun Kim ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

IPC: H01B13/00 ,  H05K3/40 ,  H05K3/06 ,  H05K3/20

CPC classification number: H05K3/4007 ,  H05K3/061 ,  H05K3/205 ,  H05K2201/0367 ,  H05K2203/0152 ,  H05K2203/0376

Abstract: A method of manufacturing a printed circuit board having a bump is disclosed. The method includes preparing a first carrier having a first circuit formed thereon, compressing the first carrier to one surface of an insulation layer such that the first circuit is buried, stacking an etching resist on the first carrier in accordance with where the bump is to be formed and forming the bump by etching the first carrier. In accordance with an embodiment of the present invention, the difference in height between a bump and its adjacent bump in a printed circuit board can be reduced, and thus electrical connection between an electronic component and the printed circuit board can be better implemented.

Abstract translation: 公开了一种制造具有凸块的印刷电路板的方法。 该方法包括制备其上形成有第一电路的第一载体，将第一载体压缩到绝缘层的一个表面，使得第一电路被掩埋，根据凸点将在第一载体上堆叠抗蚀剂 通过蚀刻第一载体形成和形成凸块。 根据本发明的实施例，可以减小印刷电路板中的凸块与其相邻凸块之间的高度差，从而可以更好地实现电子部件和印刷电路板之间的电连接。

公开(公告)号：US20150048495A1

公开(公告)日：2015-02-19

申请号：US14379961

申请日：2012-10-01

Applicant: HITACHI CHEMICAL COMPANY, LTD.

Inventor： Kazutaka Honda ,  Akira Nagai ,  Makoto Satou

IPC: C09J11/06 ,  C08K5/092 ,  H01L23/00 ,  C09J163/00

CPC classification number: C09J11/06 ,  B23K35/3613 ,  B23K35/3618 ,  B23K35/362 ,  C08K5/092 ,  C09J163/00 ,  H01L21/563 ,  H01L23/295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/03825 ,  H01L2224/0401 ,  H01L2224/051 ,  H01L2224/05111 ,  H01L2224/05116 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05575 ,  H01L2224/0558 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11825 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13575 ,  H01L2224/1358 ,  H01L2224/136 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/271 ,  H01L2224/27416 ,  H01L2224/27436 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73104 ,  H01L2224/81011 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/81907 ,  H01L2224/831 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2224/9205 ,  H01L2224/92122 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H05K3/305 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/8385 ,  H01L2924/00 ,  C08L63/00 ,  H01L2224/27 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01029 ,  H01L2224/11 ,  H01L2924/0001

Abstract: An adhesive for a semiconductor, comprising an epoxy resin, a curing agent, and a compound having a group represented by the following formula (1): wherein R1 represents an electron-donating group.

Abstract translation: 一种用于半导体的粘合剂，包括环氧树脂，固化剂和具有由下式（1）表示的基团的化合物：其中R1表示给电子基团。

公开(公告)号：US20150009645A1

公开(公告)日：2015-01-08

申请号：US14308853

申请日：2014-06-19

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kentaro KANEKO ,  Katsuya FUKASE

IPC: H05K1/11

CPC classification number: H05K3/4682 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83385 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H05K1/112 ,  H05K1/113 ,  H05K1/181 ,  H05K3/3436 ,  H05K3/381 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/09481 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2201/2072 ,  H05K2203/0152 ,  H05K2203/0376 ,  H05K2203/1184 ,  H05K2203/308

Abstract: A wiring substrate includes an insulating layer that is an outermost layer of the wiring substrate and includes an external exposed surface, a pad forming part formed on a side of the external exposed surface, and a pad that projects from the external exposed surface. The pad forming part includes a recess part recessed from the external exposed surface, and a weir part that projects from the external exposed surface and encompasses the recess part from a plan view. The pad includes a pad body formed within the recess part and the weir part, and an eave part formed on the weir part. The pad body includes an end part that projects to the weir part. The eave part projects in a horizontal direction from the end part of the pad body. The end part of the pad body includes a flat surface.

Abstract translation: 布线基板包括绝缘层，其是布线基板的最外层，并且包括外部暴露表面，形成在外部暴露表面侧的焊盘形成部分以及从外部暴露表面突出的焊盘。 衬垫形成部分包括从外部暴露表面凹陷的凹陷部分和从外部暴露表面突出并从俯视图包围凹部的堰部分。 衬垫包括形成在凹部和堰部内的垫体，以及形成在堰部上的檐部。 垫体包括突出到堰部分的端部。 檐部从垫体的端部沿水平方向突出。 垫体的端部包括平坦表面。

公开(公告)号：US08922234B2

公开(公告)日：2014-12-30

申请号：US14067685

申请日：2013-10-30

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Akinori Shiraishi ,  Hideaki Sakaguchi ,  Mitsutoshi Higashi

IPC: G01R31/00 ,  G01R1/073 ,  H05K3/40

CPC classification number: G01R1/07307 ,  G01R1/07314 ,  G01R1/0735 ,  G01R1/07364 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/10378 ,  H05K2203/1572 ,  Y10T29/49155

Abstract: A probe card for conducting an electrical test on a test subject includes a substrate body including a first surface, which faces toward the test subject, and a second surface, which is opposite to the first surface. A through electrode extends through the substrate body between the first surface and the second surface. A contact bump is formed in correspondence with the electrode pad and electrically connected to the through electrode. An elastic body is filled in an accommodating portion, which is formed in the substrate body extending from the first surface toward the second surface. The contact bump is formed on the elastic body.

Abstract translation: 用于对受试对象进行电气测试的探针卡包括：衬底主体，包括朝向被测试对象的第一表面;以及与第一表面相对的第二表面。 通孔在第一表面和第二表面之间延伸穿过基底本体。 与电极焊盘对应地形成接触凸块，并且电连接到贯通电极。 弹性体填充在容纳部分中，该容纳部分形成在从第一表面向第二表面延伸的基底主体中。 接触凸块形成在弹性体上。

公开(公告)号：US20140335705A1

公开(公告)日：2014-11-13

申请号：US13934238

申请日：2013-07-03

Applicant: Unimicron Technology Corp.

Inventor： Chih-Peng Fan ,  Yin-Hwa Cheng ,  Ching-Ho Hsieh ,  Ling-Kai Su ,  Yung-Hao Hsueh

IPC: H01R12/55

CPC classification number: H01R12/718 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01R13/2442 ,  H05K3/326 ,  H05K3/4092 ,  H05K2201/0367 ,  H05K2201/0397 ,  H05K2201/09036 ,  H05K2201/10265 ,  H05K2201/10719

Abstract: An electrical connector includes a base an elastic terminal and an elastic terminal. The base has a recess. The elastic terminal is connected to the base and extends to the recess. When the contact moves towards the recess, the contact is capable of pushing the contact protrusion to bend towards the bottom of the recess. In addition, the electrical connector may further include a contact protrusion connected to the elastic terminal. When the contact moves towards the recess, the contact is capable of pushing the contact protrusion to make the elastic terminal bend towards the bottom portion of the recess.

Abstract translation: 电连接器包括基座，弹性端子和弹性端子。 底座有一个凹槽。 弹性端子连接到基座并延伸到凹部。 当接触件朝向凹部移动时，触头能够推动接触突起朝向凹部的底部弯曲。 此外，电连接器还可以包括连接到弹性端子的接触突起。 当接触件朝向凹部移动时，触头能够推动接触突起，以使弹性端子朝向凹部的底部弯曲。

公开(公告)号：US20140307406A1

公开(公告)日：2014-10-16

申请号：US14246280

申请日：2014-04-07

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Hiromichi KITAJIMA

IPC: H05K1/02 ,  H01G2/06 ,  H01F27/06

CPC classification number: H01G2/065 ,  H01F17/0013 ,  H01F27/292 ,  H01L2224/16225 ,  H01L2924/15174 ,  H05K1/0306 ,  H05K1/112 ,  H05K1/115 ,  H05K3/3436 ,  H05K2201/0367 ,  H05K2201/09427 ,  H05K2201/09781 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A module includes a multilayer body including laminated ceramic green sheets that have been fired, multiple mounting terminals arranged to mount a component thereon, the mounting terminals each including an end surface that is exposed at a main surface of the multilayer body, and multiple via conductors disposed inside the multilayer body so as to correspond to the mounting terminals at positions overlapped by the corresponding mounting terminals when viewed in a plan view. The lengths of the via conductors are adjusted so that predetermined points on the mounting terminals are positioned on the same plane.

Abstract translation: 模块包括多层体，其包括已被烧制的层叠陶瓷生片，多个安装端子，用于安装其上的部件，所述安装端子各自包括暴露在所述多层体的主表面上的端面和多个通孔导体 设置在多层体内，以便在平面图中观察时，与安装端子对应于与相应的安装端子重叠的位置。 调整通孔导体的长度，使得安装端子上的预定点位于同一平面上。

公开(公告)号：US20140251946A1

公开(公告)日：2014-09-11

申请号：US14282457

申请日：2014-05-20

Applicant: XINTEC INC.

Inventor： Yi-Ming CHANG ,  I-Min LIN ,  Po-Shen LIN

IPC: H05K3/06

CPC classification number: H05K3/06 ,  H01L21/4853 ,  H01L21/7685 ,  H01L21/76852 ,  H01L21/76885 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02317 ,  H01L2224/02319 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/1148 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2924/01029 ,  H01L2924/12041 ,  H01L2924/14 ,  H05K3/244 ,  H05K3/4007 ,  H05K2201/0367 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/00

Abstract: A wiring structure for improving a crown-like defect and a fabrication method thereof are provided. The method includes the following steps. A substrate, on which a seed layer and a patterned photoresist layer with an opening are formed, is provided. A copper layer, having a bottom covering the seed layer, is formed in the opening. A barrier layer covering at least one top portion of the copper layer is formed on the copper layer. An oxidation potential of the barrier layer is greater than that of the copper layer. The patterned photoresist layer is removed to perform an etching process, wherein the copper layer and a portion of the seed layer exposed are etched to form a wiring layer. An immersion process is performed to form an anti-oxidation layer comprehensively on exposed surfaces of the barrier layer and the wiring layer.

Abstract translation: 提供了一种用于改善冠状缺陷的布线结构及其制造方法。 该方法包括以下步骤。 提供了其上形成有种子层和具有开口的图案化光致抗蚀剂层的衬底。 在开口中形成有覆盖种子层的底部的铜层。 覆盖铜层的至少一个顶部的阻挡层形成在铜层上。 阻挡层的氧化电位大于铜层的氧化电位。 去除图案化的光致抗蚀剂层以进行蚀刻工艺，其中铜层和暴露的种子层的一部分被蚀刻以形成布线层。 进行浸渍处理以在阻挡层和布线层的暴露表面上综合地形成抗氧化层。