公开(公告)号：US20080295041A1

公开(公告)日：2008-11-27

申请号：US11753644

申请日：2007-05-25

Applicant: Tingdong Zhou ,  Michael A. Christo ,  Julio A. Maldonado ,  Roger D. Weekly

Inventor： Tingdong Zhou ,  Michael A. Christo ,  Julio A. Maldonado ,  Roger D. Weekly

IPC: G06F17/50

CPC classification number: H05K1/0262 ,  G06F17/5068 ,  G06F2217/78 ,  H05K3/0005 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/09345 ,  H05K2201/09663

Abstract: A method for electronic circuit power plane design includes analyzing direct current (DC) properties of a power plane of an electronic circuit. The method includes analyzing power net inductance (PNI) properties of the power plane and identifying victim areas of the power plane having predetermined current density properties based on the DC properties and the PNI properties of the power plane. The method further includes replacing the identified victim areas with ground (GND) shapes to form a modified power plane.

Abstract translation: 一种用于电子电路电源平面设计的方法包括分析电子电路的电源平面的直流（DC）特性。 该方法包括基于电力平面的DC特性和PNI特性来分析功率平面的功率网络电感（PNI）特性和识别具有预定电流密度特性的功率平面的受害区域。 该方法还包括用地（GND）形状替换所识别的受害区域，以形成修改后的电力平面。

公开(公告)号：US07449978B2

公开(公告)日：2008-11-11

申请号：US11845990

申请日：2007-08-28

Applicant: Kunio Yamaguchi ,  Ryouhei Kimura ,  Atsushi Tanaka ,  Kenyu Morozumi

Inventor： Kunio Yamaguchi ,  Ryouhei Kimura ,  Atsushi Tanaka ,  Kenyu Morozumi

IPC: H03H9/64 ,  H05K5/04 ,  H05K9/00

CPC classification number: H05K1/0243 ,  H03H9/0259 ,  H03H9/02913 ,  H05K1/111 ,  H05K2201/09063 ,  H05K2201/09281 ,  H05K2201/09336 ,  H05K2201/10083

Abstract: In a fitting region for a SAW filter which includes langasite as its piezoelectric element, there are included an input side terminal electrode and an output side terminal electrode which are connected to an input terminal and to an output terminal of the SAW filter. To each of the terminal electrodes, at a position which is separated by just a predetermined distance from the fitting region of the SAW filter, there is connected a micro strip line which extends in mutually opposite directions along a direction which is parallel to the transmission direction of a frequency signal within the SAW filter. A slit is provided in the fitting region of the SAW filter and extends in a direction which intersects the transmission direction of the frequency signal within the SAW filter. A plurality of through holes are provided in the printed substrate and electrically connect together its surface and its rear surface which is grounded. Furthermore, there is provided a protective member which has a conductive surface and which is in contact with the surface of said filter, and said conductive surface of said protective member which is in contact with the surface of said filter is set so as to be of the same size as the surface of said filter, or so as to be smaller than it.

Abstract translation: 在包括硅灰石作为其压电元件的SAW滤波器的嵌合区域中，包括连接到SAW滤波器的输入端子和输出端子的输入侧端子电极和输出侧端子电极。 对于每个端子电极，在与SAW滤波器的嵌合区域分开只有预定距离的位置处连接有沿着与传输方向平行的方向在相互相反的方向上延伸的微带线 的SAW滤波器内的频率信号。 在SAW滤波器的装配区域中设置有狭缝，并且在与SAW滤波器内的频率信号的传输方向相交的方向上延伸。 多个通孔设置在印刷基板中，并将其表面及其背面接地电连接在一起。 此外，提供了具有导电表面并与所述过滤器的表面接触的保护构件，并且与所述过滤器的表面接触的所述保护构件的所述导电表面被设定为 与所述过滤器的表面相同的尺寸，或者比其小。

公开(公告)号：US20080142248A1

公开(公告)日：2008-06-19

申请号：US11945874

申请日：2007-11-27

Applicant: Jong-Joo LEE

Inventor： Jong-Joo LEE

IPC: H05K1/02

CPC classification number: H05K1/0228 ,  H01L23/13 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/4824 ,  H01L2924/30107 ,  H05K1/0248 ,  H05K2201/09336 ,  H05K2201/09727 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Provided is a printed circuit board having coplanar LC balance, comprising: an insulation layer, printed circuit patterns formed on the insulation layer, power source wirings supplying power in the printed circuit patterns, and at least three signal wirings formed between the power source wirings, wherein widths of signal wirings far from the power source wirings are wider than widths of signal wirings adjacent to the power source wirings to achieve LC balance, thereby reducing the skew between signal wirings and improving the quality of signal transfer.

Abstract translation: 提供一种具有共面LC平衡的印刷电路板，包括：绝缘层，形成在绝缘层上的印刷电路图案，在印刷电路图案中供电的电源布线以及形成在电源布线之间的至少三个信号布线， 其中远离电源布线的信号布线的宽度宽于与电源布线相邻的信号布线的宽度，以实现LC平衡，从而减少信号布线之间的偏斜并提高信号传输的质量。

公开(公告)号：US20080053687A1

公开(公告)日：2008-03-06

申请号：US11760800

申请日：2007-06-11

Applicant: LIANG-YAO CHANG ,  SHOU-KUO HSU

Inventor： LIANG-YAO CHANG ,  SHOU-KUO HSU

IPC: H05K1/00

CPC classification number: H05K1/0216 ,  H05K1/0237 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09663

Abstract: A printed circuit board includes a power plane, a ground plane insulated from the power plane, and at least one via. The power plane includes two power modules, an insulating medium for insulating the two power modules, and a signal transmission line positioned between the two power modules and insulated from the two power modules by the insulating medium. The at least one via connects the signal transmission line with the ground plane for conducting simultaneous switching noise (SSN) transmitted to the power modules to the ground plane.

Abstract translation: 印刷电路板包括电源平面，与电源平面绝缘的接地平面以及至少一个通孔。 电力平面包括两个电源模块，用于绝缘两个电源模块的绝缘介质，以及位于两个电源模块之间并通过绝缘介质与两个电源模块绝缘的信号传输线。 至少一个通孔将信号传输线与接地平面相连接，用于将传输到电源模块的同时开关噪声（SSN）传输到接地层。

公开(公告)号：US20080000677A1

公开(公告)日：2008-01-03

申请号：US11309921

申请日：2006-10-27

Applicant: Ying-Tso Lai ,  Yu-Chang Pai ,  Shou-Kuo Hsu

Inventor： Ying-Tso Lai ,  Yu-Chang Pai ,  Shou-Kuo Hsu

IPC: H01R12/00

CPC classification number: H05K1/0216 ,  H05K1/0265 ,  H05K2201/09336 ,  H05K2201/0969 ,  H05K2201/0979

Abstract: A printed circuit board (PCB) includes at least one power trace. A plurality of etched portions are defined in the at least one power trace, acting as electromagnetic bandgaps for transferring resonant frequencies produced around the at least one power trace to avoid working frequencies of the PCB, thereby reducing power noise around the at least one power trace.

Abstract translation: 印刷电路板（PCB）至少包括一个电源线。 在所述至少一个电力轨迹中限定多个蚀刻部分，用作电磁带隙，用于传送围绕所述至少一个电力轨迹产生的谐振频率，以避免PCB的工作频率，从而降低所述至少一个电力迹线周围的功率噪声 。

公开(公告)号：US20070295533A1

公开(公告)日：2007-12-27

申请号：US11806680

申请日：2007-06-01

Applicant: Akiyoshi Saitou ,  Takeshi Midorikawa ,  Toru Kuraishi ,  Chikayuki Kumagai ,  Masashi Fujimoto ,  Kenichiro Abe

Inventor： Akiyoshi Saitou ,  Takeshi Midorikawa ,  Toru Kuraishi ,  Chikayuki Kumagai ,  Masashi Fujimoto ,  Kenichiro Abe

IPC: H05K1/09 ,  H01R43/00

CPC classification number: H05K1/0224 ,  H01L2924/0002 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/116 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4661 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/0959 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2203/0425 ,  H05K2203/063 ,  Y10T29/49117 ,  H01L2924/00

Abstract: A buildup board includes a buildup layer having a multilayer structure and/or a core layer having a multilayer structure. The multilayer structure includes a signal wiring pattern, a pad connected to the signal wiring pattern, an insulating part arranged around the pad on the same layer as the pad, and a conductor arranged around the insulating part on the same layer as the pad. The multilayer structure has at least two different keepouts where the keepout is defined as a minimum interval between an outline of the pad and the conductor closest to the pad on the same layer.

Abstract translation: 堆积板包括具有多层结构的堆积层和/或具有多层结构的芯层。 多层结构包括信号布线图案，连接到信号布线图案的焊盘，与焊盘相同的层上布置在焊盘周围的绝缘部分，以及布置在与焊盘相同的层上的绝缘部分周围的导体。 所述多层结构具有至少两个不同的保持部，其中所述挡板被定义为所述焊盘的轮廓与最靠近所述焊盘在同一层上的导体之间的最小间隔。

公开(公告)号：US20070111576A1

公开(公告)日：2007-05-17

申请号：US11282041

申请日：2005-11-17

Applicant: Wiren Becker ,  Bruce Chamberlin ,  Gerald Fahr ,  Roland Frech ,  Dierk Kaller ,  George Katopis ,  Erich Klink ,  Thomas-Michael Winkel

Inventor： Wiren Becker ,  Bruce Chamberlin ,  Gerald Fahr ,  Roland Frech ,  Dierk Kaller ,  George Katopis ,  Erich Klink ,  Thomas-Michael Winkel

IPC: H01R13/15

CPC classification number: H05K1/11 ,  H01R12/523 ,  H01R13/6466 ,  H01R13/6471 ,  H01R13/6589 ,  H01R13/6625 ,  H05K1/0216 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/10189

Abstract: The present invention relates to computer hardware design, and in particular to a printed circuit board (card) comprising wiring dedicated to supply electric board components such as integrated circuits with at least three different reference planes. In particular at locations, where the pins of a card-to-card connector enter the layer structure of the card discontinuities brake the high frequency signal return path of a given signal wiring. In order to close the signal return path around a signal path from card to card including the connector, and thus to limit the signal coupling while concurrently keeping the card design as simple as possible, it is proposed to provide a) an additional capacitance for a given signal wiring in a discontinuity section, b) wherein the additional capacitance is formed by a voltage island placed within a signal layer located next to the given signal wiring.

Abstract translation: 本发明涉及计算机硬件设计，特别涉及一种包括专用于提供诸如具有至少三个不同参考平面的集成电路的电路板组件的布线的印刷电路板（卡）。 特别是在卡到卡连接器的引脚进入卡不连续的层结构的位置处，制动给定信号布线的高频信号返回路径。 为了封闭从包括连接器的卡到卡的信号路径周围的信号返回路径，并且因此限制信号耦合，同时保持卡设计尽可能简单，建议提供a）附加电容 在不连续部分中的给定信号布线，b）其中附加电容由放置在位于给定信号布线旁边的信号层内的电压岛形成。

公开(公告)号：US07102455B2

公开(公告)日：2006-09-05

申请号：US10783596

申请日：2004-02-19

Applicant: Yu Hsu Lin ,  Shang Tsang Yeh

Inventor： Yu Hsu Lin ,  Shang Tsang Yeh

IPC: H01P3/02

CPC classification number: H05K1/0245 ,  H01P3/02 ,  H05K1/0219 ,  H05K1/0298 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/09672 ,  H05K2201/09709

Abstract: An arrangement of differential pairs in a multi-layer printed circuit board is provided for eliminating crosstalk. The arrangement of differential pairs in the multi-layer printed circuit board includes a first differential pair, and a second differential pair. The first differential pair and the second differential pair may each be a driven pair or a victim pair. By properly arranging the first differential pair and the second differential pair, in accordance with the present invention, the resultant crosstalk on the first differential pair induced by the second differential pair, or vice versa, is substantially zero or negligible.

Abstract translation: 提供了一种用于消除串扰的多层印刷电路板中的差分对的布置。 多层印刷电路板中的差分对的布置包括第一差分对和第二差分对。 第一差分对和第二差分对可以各自为驱动对或受害对。 通过适当地布置第一差分对和第二差分对，根据本发明，由第二差分对引起的第一差分对上产生的串扰基本为零或可忽略。

公开(公告)号：US06864776B2

公开(公告)日：2005-03-08

申请号：US10670687

申请日：2003-09-25

Applicant: Shigeru Osada

Inventor： Shigeru Osada

IPC: H04N5/50 ,  H01F5/00 ,  H01F17/00 ,  H05K1/16 ,  H05K3/22

CPC classification number: H05K1/165 ,  H01F5/003 ,  H01F17/0033 ,  H05K3/222 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/097 ,  H05K2201/10636 ,  H05K2203/171 ,  Y02P70/611

Abstract: In a coupling adjusting structure for a double-tuned circuit according to the present invention, first and second coils are configured such that a pair of first conductive patterns formed on a first surface of a printed circuit and a corresponding pair of second conductive patterns formed on a second surface of the printed circuit board are connected via corresponding connecting conductors, thereby making the first and second coils low and thin. Also, one end of the first coil and the corresponding end of the second coil are disposed close to each other, a first ground conductive pattern is disposed at least on the first surface of the printed circuit, and a first jumper connected to the first ground conductive pattern is disposed between the first and second coils so as to adjust an inductive coupling of the double-tuned circuit, thereby achieving a coupling adjusting structure for a double-tuned circuit whose inductive coupling is adjustable.

Abstract translation: 在根据本发明的用于双调谐电路的耦合调整结构中，第一和第二线圈被配置为使得形成在印刷电路的第一表面上的一对第一导电图案和形成在 印刷电路板的第二表面通过相应的连接导体连接，从而使第一和第二线圈变薄和薄。 此外，第一线圈的一端和第二线圈的对应端部彼此靠近设置，第一接地导体图案至少设置在印刷电路的第一表面上，并且第一跳线连接到第一接地 导电图案设置在第一和第二线圈之间，以便调整双调谐电路的电感耦合，从而实现用于电感耦合可调节的双调谐电路的耦合调节结构。

公开(公告)号：US20050047032A1

公开(公告)日：2005-03-03

申请号：US10928172

申请日：2004-08-30

Applicant: Mitsuhiro Kanayama ,  Toru Itabashi

Inventor： Mitsuhiro Kanayama ,  Toru Itabashi

IPC: H02M3/00 ,  H05K1/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/46 ,  H02H7/00

CPC classification number: H02M3/00 ,  H05K1/0231 ,  H05K1/0298 ,  H05K1/18 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09345 ,  H05K2201/10166

Abstract: An electronic control apparatus includes an exclusive power source wiring for a charge pump circuit which is discriminated from a common power source wiring. The exclusive power source wiring is connected to the common power source wiring via a via-hole va having the impedance larger than that of the wiring pattern. Similarly, the electronic control apparatus includes an exclusive ground wiring for the charge pump circuit which is discriminated from a common ground wiring. The exclusive ground wiring is connected to the common ground via an additional via-hole vb. Furthermore, a noise-suppressing capacitor C is connected between a power source wiring and a ground wiring. The power source wiring interposes between the via-hole va and the exclusive power source wiring, and the ground wiring interposes between the via-hole vb and the exclusive ground wiring.

Abstract translation: 电子控制装置包括用于与公共电源布线区分开的用于电荷泵电路的专用电源布线。 专用电源布线经由具有比布线图案的阻抗大的阻抗的通孔va连接到公共电源布线。 类似地，电子控制装置包括用于与公共接地布线区分开的用于电荷泵电路的专用接地布线。 专用接地线通过附加的通孔vb连接到公共地。 此外，噪声抑制电容器C连接在电源布线和接地布线之间。 通孔va和专用电源布线之间的电源布线插入，并且接地布线插入通孔vb和专用接地布线之间。