公开(公告)号：US20120120614A1

公开(公告)日：2012-05-17

申请号：US13294763

申请日：2011-11-11

Applicant: Seigo UENO

Inventor： Seigo UENO

IPC: H05K7/00

CPC classification number: H05K1/183 ,  H01L23/49833 ,  H01L2224/16225 ,  H05K1/0231 ,  H05K1/162 ,  H05K1/181 ,  H05K3/4614 ,  H05K2201/10318 ,  H05K2201/10674 ,  H05K2201/2018

Abstract: There is provided a wiring board including a multilayer substrate and a reinforcing member. The multilayer substrate has a first main substrate surface formed with a chip mounting area to which an electronic chip is mounted and a second main substrate surface opposed to the first main substrate surface. The reinforcing member is fixed to either an area of the first main substrate surface other than the chip mounting area or the second main substrate surface and has a body predominantly formed of ceramic material and incorporating therein at least one capacitor.

Abstract translation: 提供了一种包括多层基板和加强件的布线板。 多层基板具有形成有安装有电子芯片的芯片安装区域的第一主基板表面和与第一主基板表面相对的第二主基板表面。 加强构件固定在除了芯片安装区域或第二主基板表面之外的第一主基板表面的区域中，并且具有主要由陶瓷材料形成并且内置有至少一个电容器的主体。

公开(公告)号：US08107255B2

公开(公告)日：2012-01-31

申请号：US12239256

申请日：2008-09-26

Applicant: Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

Inventor： Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H05K1/144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/01004 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3447 ,  H05K5/065 ,  H05K2201/042 ,  H05K2201/10318 ,  Y10T29/49146 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Provided is a circuit device that allows a plurality of circuit boards, which are stacked each other and arranged in a case member, to be sealed with a resin effectively, and a method of manufacturing the same. In a hybrid integrated circuit device, a first circuit board is overlaid with the second circuit board and both of the boards are fitted into the case member. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, an opening is provided in a side wall part of the case member, and an internal space of the case member communicates with the outside through this opening. Accordingly, in the resin sealing step, a sealing resin can be injected into the internal space of the case member from the outside through this opening.

Abstract translation: 本发明提供一种电路装置及其制造方法，其特征在于，能够使由树脂构成的多个电路基板与树脂密封而形成。 在混合集成电路装置中，第一电路板与第二电路板重叠，并且两个板都装配到壳体中。 第一电路元件布置在第一电路板的上表面上，第二电路元件布置在第二电路板的上表面上。 此外，在壳体构件的侧壁部设置有开口，壳体的内部空间通过该开口与外部连通。 因此，在树脂密封工序中，能够通过该开口从外部将密封树脂注入到壳体的内部空间。

公开(公告)号：US08102655B2

公开(公告)日：2012-01-24

申请号：US12837078

申请日：2010-07-15

Applicant: Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

Inventor： Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

IPC: H05K7/20

CPC classification number: H05K1/144 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3447 ,  H05K5/065 ,  H05K2201/042 ,  H05K2201/10318 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.

Abstract translation: 提供了能够增加封装密度并防止引入电路元件之间的热干扰的电路装置。 在混合集成电路装置中，第一电路板和第二电路板以第一电路板与第二电路板重叠的方式装配到壳体构件中。 第一电路元件布置在第一电路板的上表面上，第二电路元件布置在第二电路板的上表面上。 此外，在壳体内设置有未填充有密封树脂的中空部。 这样的结构防止作为微型计算机的第二电路元件例如由于在作为功率晶体管的第一电路元件中产生的热而不稳定地运行。

公开(公告)号：US20110317356A1

公开(公告)日：2011-12-29

申请号：US13165305

申请日：2011-06-21

Applicant: Takao ONO ,  Atsushi MORISHIMA

Inventor： Takao ONO ,  Atsushi MORISHIMA

IPC: G06F1/16 ,  H05K1/00

CPC classification number: H05K1/141 ,  G06F1/185 ,  H05K3/368 ,  H05K2201/041 ,  H05K2201/044 ,  H05K2201/10159 ,  H05K2201/10318

Abstract: The present invention is adapted to a memory system that includes: a motherboard and a module board, wherein: the motherboard comprises a module socket mounted on the motherboard; and a plurality of pins two-dimensionally arranged on the module socket, and vertically erected with respect to the motherboard: and the module board comprises a plurality of device chips installed on the module board; and a contact portion mounted on the module board, and including a plurality of through holes two-dimensionally arranged thereon, the contact portion being electrically connected to the device chips: wherein each of the pins is inserted into each of the through holes to connect electrically to the contact portion.

Abstract translation: 本发明适用于包括：主板和模块板的存储器系统，其中：所述母板包括安装在所述母板上的模块插座; 以及二维地布置在模块插座上并相对于母板垂直竖立的多个销，并且模块板包括安装在模块板上的多个装置芯片; 以及安装在所述模块基板上的接触部分，并且包括二维地布置在其上的多个通孔，所述接触部分电连接到所述器件芯片：其中每个所述引脚插入到每个所述通孔中以电连接 到接触部分。

公开(公告)号：US07981703B2

公开(公告)日：2011-07-19

申请号：US12191544

申请日：2008-08-14

Applicant: Joseph Charles Fjelstad

Inventor： Joseph Charles Fjelstad

IPC: H01L21/00

CPC classification number: H05K1/144 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K1/185 ,  H05K1/186 ,  H05K3/284 ,  H05K3/4046 ,  H05K2201/041 ,  H05K2201/10318 ,  H05K2203/065 ,  H05K2203/1316 ,  H05K2203/1327 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The present invention provides an electronic assembly 400 and a method for its manufacture 800, 900, 1000 1200, 1400, 1500, 1600, 1700. The assembly 400 uses no solder. Components 406, or component packages 402, 802, 804, 806 with I/O leads 412 are placed 800 onto a planar substrate 808. The assembly is encapsulated 900 with electrically insulating material 908 with vias 420, 1002 formed or drilled 1000 through the substrate 808 to the components' leads 412. Then the assembly is plated 1200 and the encapsulation and drilling process 1500 repeated to build up desired layers 422, 1502, 1702. Assemblies may be mated 1800. Within the mated assemblies, items may be inserted including pins 2202a, 2202b, and 2202c, mezzanine interconnection devices 2204, heat spreaders 2402, and combination heat spreaders and heat sinks 2602. Edge card connectors 2802 may be attached to the mated assemblies.

Abstract translation: 本发明提供电子组件400及其制造方法800,900,10001200,1400,1500,1600,1700。组件400不使用焊料。 具有I / O引线412的组件406或组件封装402,802,804,806被放置在800平面衬底808上。该组件被电绝缘材料908封装，电绝缘材料908具有穿过衬底形成或钻孔1000的通孔420,1002。 808到组件引线412.然后组件被电镀1200，并且重复进行封装和钻孔工艺1500以构建所需的层422,1502,1702。组件可以配合1800.在配合的组件内，物品可以被插入，包括销 2202a，2202b和2202c，夹层互连设备2204，散热器2402以及散热器和散热器2602组合。边缘卡连接器2802可以附接到配合的组件。

公开(公告)号：US20100325882A1

公开(公告)日：2010-12-30

申请号：US12827732

申请日：2010-06-30

Applicant: Joseph Ted DiBene, II ,  David H. Hartke ,  Carl E. Hoge ,  Edward J. Derian

Inventor： Joseph Ted DiBene, II ,  David H. Hartke ,  Carl E. Hoge ,  Edward J. Derian

IPC: H05K3/00

CPC classification number: H05K7/1092 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  G06F1/20 ,  H01L23/427 ,  H01L23/433 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/15192 ,  H01L2924/15312 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01R12/52 ,  H01R12/57 ,  H01R13/24 ,  H05K1/0206 ,  H05K1/0262 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K1/182 ,  H05K3/301 ,  H05K3/368 ,  H05K2201/10189 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/2018 ,  Y10T29/49124

Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.

Abstract translation: 公开了一种电源互连系统，其包括在第一电路板到第二电路板之间传递电力和接地信号的多个z轴兼容的连接器。 互连系统通过宽范围的频率提供极低的阻抗，并允许大量的电流从静电或动态从一个衬底传递到下一个衬底。 互连系统可以靠近模具定位，或者可以根据系统要求进一步远离。 互连也可用于占用两个基板之间的机械公差，同时提供低阻抗互连。

公开(公告)号：US07847393B2

公开(公告)日：2010-12-07

申请号：US12257501

申请日：2008-10-24

Applicant: Naohiro Hirose ,  Hitoshi Ito ,  Yoshiyuki Iwata ,  Masanori Kawade ,  Hajime Yazu

Inventor： Naohiro Hirose ,  Hitoshi Ito ,  Yoshiyuki Iwata ,  Masanori Kawade ,  Hajime Yazu

IPC: H01L23/48 ,  H01L21/4763

CPC classification number: H01L23/49811 ,  H01L2224/05001 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01019 ,  H01L2924/01322 ,  H01L2924/15312 ,  H05K1/111 ,  H05K1/112 ,  H05K3/28 ,  H05K3/321 ,  H05K3/3421 ,  H05K3/384 ,  H05K3/4602 ,  H05K2201/09381 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/0979 ,  H05K2201/10318 ,  Y10T428/239

Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.

Abstract translation: 一种包含衬底的封装衬底310，该衬底设置有导体层5，导电连接销100被布置成与母板建立电连接并固定到衬底的表面，其中提供用于固定导电连接销的衬垫16 用于封装衬底310.衬垫16被具有开口18的有机树脂绝缘层15覆盖，衬垫16通过该开口部分地暴露于外部。 导电连接销100通过导电粘合剂17通过开口固定到暴露于外部的焊盘，从而防止例如当执行安装时发生例如导电连接销100从基板的溶液。

公开(公告)号：US07782628B2

公开(公告)日：2010-08-24

申请号：US12239250

申请日：2008-09-26

Applicant: Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

Inventor： Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

IPC: H05K7/20

CPC classification number: H05K1/144 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3447 ,  H05K5/065 ,  H05K2201/042 ,  H05K2201/10318 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.

Abstract translation: 提供了能够增加封装密度并防止引入电路元件之间的热干扰的电路装置。 在混合集成电路装置中，第一电路板和第二电路板以第一电路板与第二电路板重叠的方式装配到壳体构件中。 第一电路元件布置在第一电路板的上表面上，第二电路元件布置在第二电路板的上表面上。 此外，在壳体内设置有未填充有密封树脂的中空部。 这样的结构防止作为微型计算机的第二电路元件例如由于在作为功率晶体管的第一电路元件中产生的热而不稳定地运行。

公开(公告)号：US20100139970A1

公开(公告)日：2010-06-10

申请号：US12633443

申请日：2009-12-08

Applicant: Kazuhiro Oshima ,  Yoshikazu Hirabayashi ,  Shigeo Nakajima ,  Yoshitaka Matsushita

Inventor： Kazuhiro Oshima ,  Yoshikazu Hirabayashi ,  Shigeo Nakajima ,  Yoshitaka Matsushita

IPC: H01R12/04 ,  H01B5/00

CPC classification number: H01L23/49811 ,  H01L2924/0002 ,  H01L2924/15312 ,  H05K3/3426 ,  H05K2201/10318 ,  H05K2201/10772 ,  H05K2201/10787 ,  H05K2201/10795 ,  Y02P70/613 ,  H01L2924/00

Abstract: A wiring board having a lead pin is provided. The wiring board having the lead pin includes a connecting pad which is formed on the wiring board, and to which the lead pin is bonded through a conductive material. The lead pin includes: a shaft portion; a head portion which is provided on one end of the shaft portion; a protruded portion which is formed on a surface side of the head portion opposed to the connection pad; and a first taper portion which is formed between the head portion and a base part of the shaft portion.

Abstract translation: 提供具有引脚的布线板。 具有引线销的布线板包括形成在布线板上的连接焊盘，引导销通过导电材料接合到该连接焊盘。 引导销包括：轴部; 头部，其设置在所述轴部的一端; 形成在所述头部的与所述连接垫相对的表面侧的突出部; 以及形成在所述头部与所述轴部的基部之间的第一锥形部。

公开(公告)号：US07616016B2

公开(公告)日：2009-11-10

申请号：US12060753

申请日：2008-04-01

Applicant: Benjamin N. Eldridge ,  Igor Y. Khandros ,  A. Nicholas Sporck

Inventor： Benjamin N. Eldridge ,  Igor Y. Khandros ,  A. Nicholas Sporck

IPC: G01R31/02

CPC classification number: H05K3/4015 ,  B23K1/0016 ,  B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D21/02 ,  G01R1/06711 ,  G01R1/07342 ,  G01R1/07364 ,  G01R1/07378 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/45014 ,  H01L2224/45144 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4092 ,  H05K7/1069 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05599

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract translation: 在探针卡组件中，可以将一系列探针元件排列在硅空间变压器上。 硅空间变压器可以以与半导体器件的间距相当的非常紧密的间距的主要触点阵列制造。 一个优选的主要接触是弹性弹簧接触。 空间变压器中的导电元件以更放松的间距被路由到第二触点。 在一个优选实施例中，第二触点适于直接连接带状电缆，带状电缆又可连接以提供对每个主触点的选择性连接。 硅空间变压器安装在固定装置中，其提供与待测试的晶片或装置的弹性连接。 可以调整该夹具以使主触头与支撑探针卡板的平面平坦化。