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公开(公告)号:US20240331979A1
公开(公告)日:2024-10-03
申请号:US18295144
申请日:2023-04-03
Applicant: Tokyo Electron Limited
Inventor: Sergey Voronin , Hamed Hajibabaeinajafabadi , Qi Wang , Andrew Metz
IPC: H01J37/32 , H01L21/311
CPC classification number: H01J37/32422 , H01J37/3244 , H01L21/31116 , H01J37/32091 , H01J37/321 , H01J2237/024 , H01J2237/332 , H01J2237/3344 , H01J2237/3345
Abstract: An apparatus for plasma processing a substrate includes a substrate holder to hold the substrate in a first portion of a vacuum chamber, and a mesh assembly segregating the first portion from a second portion of the vacuum chamber along a vertical direction, where the mesh assembly includes a vertical stack of planar meshes. The apparatus includes a mesh positioning equipment to horizontally move one of the planar meshes to adjust a vertical permeability of the stack, and a plasma generation equipment to generate plasma in the second portion of the vacuum chamber.
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公开(公告)号:US12009430B2
公开(公告)日:2024-06-11
申请号:US16782680
申请日:2020-02-05
Applicant: Tokyo Electron Limited
Inventor: Sergey Voronin , Christopher Catano , Sang Cheol Han , Shyam Sridhar , Yusuke Yoshida , Christopher Talone , Alok Ranjan
IPC: H01L29/78 , H01L21/02 , H01L21/3065 , H01L21/3213 , H01L29/66
CPC classification number: H01L29/7851 , H01L21/02252 , H01L21/3065 , H01L21/32139 , H01L29/66795
Abstract: Residue at the base of a feature in a substrate to be etched is limited so that improved profiles may be obtained when forming vertical, narrow pitch, high aspect ratio features, for example fin field effect transistor (FinFET) gates. A thin bottom layer of the feature is formed of a different material than the main layer of the feature. The bottom material may be comprised of a material that preferentially etches and/or preferentially oxidizes as compared to the main layer. The bottom layer may comprise silicon germanium. The preferential etching characteristics may provide a process in which un-etched residuals do not remain. Even if residuals remain, after etch of the feature, an oxidation process may be performed. Enhanced oxidation rates of the bottom material allow any remaining residual to be oxidized. Plasma oxidation may be used. The oxidized material may then be removed by utilizing standard oxide removal mechanisms.
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公开(公告)号:US20240136164A1
公开(公告)日:2024-04-25
申请号:US17972958
申请日:2022-10-24
Applicant: Tokyo Electron Limited
Inventor: Sergey Voronin , Blaze Messer , Yan Chen , Joel Ng , Ashawaraya Shalini , Ying Zhu , Da Song
IPC: H01J37/32
CPC classification number: H01J37/32972 , H01J37/32926
Abstract: A method of processing a substrate that includes: exposing the substrate in a plasma processing chamber to a plasma powered by applying a first power to a first electrode of the plasma processing chamber for a first time duration; and after the first time duration, determining a process endpoint by: while exposing the substrate to the plasma by applying the first power to the first electrode, applying a second power to a second electrode of the plasma processing chamber for a second time duration that is shorter than the first time duration; and obtaining an optical emission spectrum (OES) from the plasma while applying the second power to the second electrode, where an energy of the second power over the second time duration is less than an energy of the first power over a sum of the first and the second time durations by a factor of at least 2.
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公开(公告)号:US20240120181A1
公开(公告)日:2024-04-11
申请号:US17961335
申请日:2022-10-06
Applicant: Tokyo Electron Limited
Inventor: Sergey Voronin , Qi Wang
IPC: H01J37/32 , H01L21/683
CPC classification number: H01J37/32715 , H01L21/6831 , H01J37/321 , H01J2237/3346
Abstract: A method of plasma processing includes delivering direct current voltage to a substrate holder including an upper side configured to support a substrate disposed within a plasma processing chamber. The upper side is divided into a plurality of zones by a plurality of conductors electrically isolated from each other. The method further includes pulsing the direct current voltage as first direct current pulses to a first conductor of the plurality of conductors using first pulse parameters, and pulsing the direct current voltage as second direct current pulses to a second conductor of the plurality of conductors using second pulse parameters that are different from the first pulse parameters. The direct current voltage is pulsed to the second conductor while pulsing the direct current voltage to the first conductor.
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公开(公告)号:US20240096600A1
公开(公告)日:2024-03-21
申请号:US17945408
申请日:2022-09-15
Applicant: Tokyo Electron Limited
Inventor: Sergey Voronin , Qi Wang , Hamed Hajibabaeinajafabadi
IPC: H01J37/32
CPC classification number: H01J37/32211 , H01J37/32422 , H01J2237/334
Abstract: A method of plasma processing includes generating plasma by coupling a source power pulse to a plasma processing chamber containing a substrate holder configured to support a substrate. The plasma includes first ions having a first mass and second ions having a second mass greater than the first mass. The ion density ratio of the second ions to the first ions is a first ratio. The method further includes delivering an energetic ion flux of second ions to the substrate by applying a delayed bias power pulse to the substrate holder after a delay between the source power pulse and the delayed bias power pulse. The delay is chosen based on the diffusion time constants of the first ions and the second ions so that the ion density ratio of the second ions to the first ions is a second ratio that is greater than the first ratio.
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公开(公告)号:US20240053684A1
公开(公告)日:2024-02-15
申请号:US17888135
申请日:2022-08-15
Applicant: Tokyo Electron Limited
Inventor: Hamed Hajibabaeinajafabadi , Akiteru Ko , Yu-Hao Tsai , Sergey Voronin
IPC: G03F7/36 , H01L21/308
CPC classification number: G03F7/36 , H01L21/3086
Abstract: A method of processing a substrate includes receiving a substrate including a photoresist film including exposed and unexposed portions, etching parts of the unexposed portions of the photoresist film with a developing gas in a process chamber to leave a residual part of the unexposed portions, and purging the developing gas from the process chamber with a purging gas. After purging the developing gas, the residual part of the unexposed portions is etched with the developing gas. The substrate is etched using exposed portions of the photoresist film as a mask.
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47.
公开(公告)号:US11637242B2
公开(公告)日:2023-04-25
申请号:US16999441
申请日:2020-08-21
Applicant: Tokyo Electron Limited , SUNY Polytechnic Institute, College of Nanoscience and Engineering
Inventor: Sergey Voronin , Qi Wang , Shyam Sridhar , Karsten Beckmann , Martin Rodgers , Nathaniel Cady
Abstract: The performance of a ReRAM structure may be stabilized by utilizing a dry chemical gas removal (or cleaning) process to remove sidewall residue and/or etch by-products after etching the ReRAM stack layers. The dry chemical gas removal process decreases undesirable changes in the ReRAM forming voltage that may result from such sidewall residue and/or etch by-products. Specifically, the dry chemical gas removal process may reduce the ReRAM forming voltage that may otherwise result in a ReRAM structure that has the sidewall residue and/or etch by-products. In one embodiment, the dry chemical gas removal process may comprise utilizing a combination of HF and NH3 gases. The dry chemical gas removal process utilizing HF and NH3 gases may be particularly suited for removing halogen containing sidewall residue and/or etch by-products.
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公开(公告)号:US10811269B2
公开(公告)日:2020-10-20
申请号:US16277760
申请日:2019-02-15
Applicant: Tokyo Electron Limited
Inventor: Shyam Sridhar , Nayoung Bae , Sergey Voronin , Alok Ranjan
IPC: H01L21/306 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/02 , H01L21/308
Abstract: Sidewall etching of substrate features may be achieved by employing an etch stop layer formed over the features. The etch stop layer is thinner on sidewalls of the features as compared to the bottom of the features. The lateral etching of the features is achieved by use of an over etch which breaks through the etch stop layer on the sidewalls of the features but does not break through the etch stop layer formed at the bottom of the features. The use of the etch stop layer allows for lateral etching while preventing unwanted vertical etching. The lateral etching may be desirable for use in a number of structures, including but not limited to 3D structures. The lateral etching may also be used to provide vertical sidewalls by reducing the sidewall taper angle.
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公开(公告)号:US20200273711A1
公开(公告)日:2020-08-27
申请号:US16793231
申请日:2020-02-18
Applicant: Tokyo Electron Limited
Inventor: Yusuke Yoshida , Sergey Voronin , Shyam Sridhar , Caitlin Philippi , Christopher Talone , Alok Ranjan
IPC: H01L21/3065 , H01L21/311 , H01L21/67 , H01L21/3213
Abstract: In one example, a method of processing a substrate includes receiving a substrate in a processing chamber, the substrate having an etch mask positioned over an underlying layer to be etched, where the underlying layer is a silicon-containing layer. The method includes executing a first etch process that includes forming a first plasma from a first process gas that includes hydrogen bromide or chlorine and etching the underlying layer using products of the first plasma. The method includes executing a second etch process that includes forming a second plasma from a second process gas that includes fluorine and etching the substrate using products from the second plasma. The method may include alternating between the first etch process and the second etch process.
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50.
公开(公告)号:US20200105510A1
公开(公告)日:2020-04-02
申请号:US16576327
申请日:2019-09-19
Applicant: Tokyo Electron Limited
Inventor: Yusuke Yoshida , Jason Marion , Sergey Voronin , Alok Ranjan
Abstract: Methods are disclosed to detect plasma light emissions during plasma processing, to analyze light intensity data associated with the plasma source, and to adjust operating parameters for the plasma source and/or the process chamber based upon light intensity distributions associated with the plasma processing. The light intensity distributions for the plasma sources and related analysis can be conducted across multiple processing tools. For some embodiments, plasma discharge stability and/or chamber-to-chamber matching information is determined based upon light intensity data, and the operation of the processing tools are adjusted or controlled based upon stability and/or matching determinations. The disclosed embodiments thereby provide simple, low-cost solutions to assess and improve plasma sources and discharge stability for plasma processing tools such as plasma etch and deposition tools.
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