公开(公告)号：US07116208B2

公开(公告)日：2006-10-03

申请号：US11062297

申请日：2005-02-17

Applicant: Kohshi Nishimura ,  Satoshi Nakamura ,  Saizou Suzuki

Inventor： Kohshi Nishimura ,  Satoshi Nakamura ,  Saizou Suzuki

IPC: H01H85/08 ,  H01H85/48

CPC classification number: H01H85/046 ,  H01H85/0047 ,  H01H85/0411 ,  H01H85/463 ,  H01H2069/027 ,  H01H2085/0275 ,  H05K1/0272 ,  H05K1/0293 ,  H05K3/28 ,  H05K3/4611 ,  H05K3/4697 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/062 ,  H05K2201/09063 ,  H05K2201/09727 ,  H05K2201/0989 ,  H05K2201/10037 ,  H05K2201/10181 ,  H05K2203/049

Abstract: A printed wiring board includes a substrate (20) on which a wiring pattern (12) has been formed, and a fuse (6) provided on the substrate (20). One end of the fuse (6) is directly connected to a first pad (12a) of the wiring pattern (12), and the other end of the fuse (6) is directly connected to a second pad (12b) of the wiring pattern (12). The fuse (6) is covered by a protective material (7).

Abstract translation: 印刷布线板包括其上形成有布线图案（12）的基板（20）和设置在基板（20）上的熔丝（6）。 保险丝（6）的一端直接连接到布线图案（12）的第一焊盘（12a），并且熔丝（6）的另一端直接连接到第二焊盘（12b） 布线图案（12）。 保险丝（6）被保护材料（7）覆盖。

公开(公告)号：US07105923B2

公开(公告)日：2006-09-12

申请号：US10103386

申请日：2002-03-21

Applicant: Kevin P. Lyne

Inventor： Kevin P. Lyne

IPC: H01L23/34 ,  H01L23/48

CPC classification number: H01L23/49816 ,  H01L2924/0002 ,  H05K1/0231 ,  H05K1/113 ,  H05K3/3442 ,  H05K3/3452 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09772 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

Abstract: The invention provides a method and device for building one or more passive components into a chip scale package. The method includes the steps of selecting a passive component having a terminal pitch that is a multiple of the package ball pitch of a chip scale package and mounting the selected passive component terminals to ball sites of the package. A preferred embodiment of the invention uses a single metal layer polyamide tape as the substrate of the package. Additional preferred embodiments of the invention are disclosed in which the terminal pitch multiple of the package ball pitch is one or two. Devices corresponding to the disclosed methods are also disclosed.

公开(公告)号：US07094629B2

公开(公告)日：2006-08-22

申请号：US10954294

申请日：2004-10-01

Applicant: Nobuaki Hashimoto

Inventor： Nobuaki Hashimoto

IPC: H01L21/44

CPC classification number: H01L24/10 ,  H01L21/486 ,  H01L21/563 ,  H01L23/13 ,  H01L23/16 ,  H01L23/24 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K1/112 ,  H05K3/3457 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/0394 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05647 ,  H01L2224/05099 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: The semiconductor device comprises an insulating film in which penetrating holes are formed, a semiconductor chip having electrodes, a wiring pattern adhered by an adhesive over a region including penetrating holes on one side of the insulating film and electrically connected to the electrodes of the semiconductor chip, and external electrodes provided on the wiring pattern through the penetrating holes and projecting from the surface opposite to the surface of the substrate on which the wiring pattern is formed. Part of the adhesive is drawn in to be interposed between the penetrating holes and external electrodes.

公开(公告)号：US07063249B2

公开(公告)日：2006-06-20

申请号：US11000697

申请日：2004-12-01

Applicant: John M. Waldvogel ,  Brian R. Bielick ,  Herman J. Miller ,  Billy J. Van Cannon

Inventor： John M. Waldvogel ,  Brian R. Bielick ,  Herman J. Miller ,  Billy J. Van Cannon

IPC: B23K31/00

CPC classification number: H05K1/021 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10166 ,  H05K2201/10969 ,  H05K2203/042 ,  H05K2203/063

Abstract: An electrical circuit apparatus (300) that includes: a substrate (330) having a ground layer (336), at least one device aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate such that at least a portion of the substrate device aperture overlaps the heat sink, the adhesive layer having at least one device aperture and at least one solder aperture, wherein aligning the at least one substrate solder aperture with the at least one adhesive layer solder aperture and aligning the at least one substrate device aperture with the at least one adhesive layer device aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

Abstract translation: 一种电路设备（300），包括：具有接地层（336），至少一个器件孔（332）和至少一个焊料孔（334）的衬底（330）; 散热器（310）; 以及用于将所述散热器机械耦合到所述基板的接地层的粘合剂层（320），使得所述基板装置孔的至少一部分与所述散热器重叠，所述粘合剂层具有至少一个装置孔和至少一个焊料 孔，其中将所述至少一个衬底焊接孔与所述至少一个粘合剂层焊接孔对准并且将所述至少一个衬底器件孔与所述至少一个粘合剂层器件孔对准使得焊料在所述散热器和所述散热器之间的预定区域中润湿 衬底的接地层。

公开(公告)号：US20060102385A1

公开(公告)日：2006-05-18

申请号：US10517948

申请日：2003-06-14

Applicant: Andreas Heise ,  Jochen Beuss ,  Roberto Schlenker ,  Philipp Herbst

Inventor： Andreas Heise ,  Jochen Beuss ,  Roberto Schlenker ,  Philipp Herbst

IPC: H05K1/09 ,  H01H85/04

CPC classification number: H05K1/0293 ,  H01H37/761 ,  H01H85/046 ,  H01H85/463 ,  H01H2037/046 ,  H01H2085/0275 ,  H05K1/0263 ,  H05K2201/0305 ,  H05K2201/09063 ,  H05K2201/09145 ,  H05K2203/0415 ,  H05K2203/173

Abstract: In order to protect a printed circuit board (1, 1′) especially against the development of heat by simple means, said printed circuit board includes strip conductors for electronic circuits and connections for a voltage supply unit equipped with at least one SMD-component and additional electronic and/or electromechanical parts that are soldered in a suitable manner. The voltage supply unit is connected to one or several supplying strip conductors (2). At least one of the supplying strip conductors (2) includes a break to this end which is bridged in a conductive manner by means of a fuse bridge (6), said fuse bridge (6) containing or being made of a basic material, the melting point of which is lower than the melting point of the material of which the strip conductors are made.

Abstract translation: 为了通过简单的手段特别地防止印刷电路板（1,1'）保护发热，所述印刷电路板包括用于电子电路的带状导体和用于具有至少一个SMD分量和 额外的电子和/或机电零件以适当的方式焊接。 电压供应单元连接到一个或多个供电条导体（2）。 供电带状导体（2）中的至少一个包括通过熔丝桥（6）以导电方式桥接的该端部的断裂，所述熔断器桥（6）包含或由基本材料制成， 其熔点低于制造带状导体的材料的熔点。

公开(公告)号：US20050258535A1

公开(公告)日：2005-11-24

申请号：US11190350

申请日：2005-07-26

Applicant: Tongbi Jiang ,  David Kao

Inventor： Tongbi Jiang ,  David Kao

IPC: H01L23/34 ,  H05K1/00 ,  H05K1/09

CPC classification number: H05K1/0293 ,  H01L2924/0002 ,  H05K1/029 ,  H05K1/095 ,  H05K2201/0129 ,  H05K2201/0305 ,  H05K2201/10689 ,  H05K2203/107 ,  H05K2203/1105 ,  H05K2203/173 ,  H01L2924/00

Abstract: Embodiments of the invention provide thermally actuatable switches and selectively configurable circuit boards which may employ such switches. A circuit board of one embodiment includes a substrate having board leads and a plurality of electrical connectors arranged adjacent a component site. Selectively configurable circuitry may be carried by the substrate and adapted to selectively couple selected ones of the electrical connectors to selected ones of the board leads. One or more trace may be associated with each of the electrical connectors and one or more of these traces may include a thermally actuatable switch that can be selectively closed. The thermally actuatable switch may comprise a gap between two conductive lengths of the conductive trace, an exposed switch surface, and a thermally responsive member that may wet the exposed switch surface when selectively heated above an activation temperature.

Abstract translation: 本发明的实施例提供可热致动的开关和可以采用这种开关的选择性可配置的电路板。 一个实施例的电路板包括具有板引线和布置在部件部位附近的多个电连接器的基板。 可选配置的电路可以由衬底承载，并且适于选择性地将选定的电连接器耦合到选定的电路板引线。 一个或多个迹线可以与每个电连接器相关联，并且这些迹线中的一个或多个迹线可以包括可以选择性地闭合的热致动开关。 热致动开关可以包括在导电迹线的两个导电长度，暴露的开关表面和热响应部件之间的间隙，当选择性地加热到高于激活温度时，该热响应部件可以润湿暴露的开关表面。

公开(公告)号：US20050040542A1

公开(公告)日：2005-02-24

申请号：US10954294

申请日：2004-10-01

Applicant: Nobuaki Hashimoto

Inventor： Nobuaki Hashimoto

IPC: H01L23/12 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/48

CPC classification number: H01L24/10 ,  H01L21/486 ,  H01L21/563 ,  H01L23/13 ,  H01L23/16 ,  H01L23/24 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/15183 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K1/112 ,  H05K3/3457 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/0394 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05647 ,  H01L2224/05099 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: The semiconductor device comprises an insulating film in which penetrating holes are formed, a semiconductor chip having electrodes, a wiring pattern adhered by an adhesive over a region including penetrating holes on one side of the insulating film and electrically connected to the electrodes of the semiconductor chip, and external electrodes provided on the wiring pattern through the penetrating holes and projecting from the surface opposite to the surface of the substrate on which the wiring pattern is formed. Part of the adhesive is drawn in to be interposed between the penetrating holes and external electrodes.

Abstract translation: 半导体器件包括其中形成有穿透孔的绝缘膜，具有电极的半导体芯片，通过粘合剂粘附在包括在绝缘膜的一侧上的穿透孔的区域上的电连接到半导体芯片的电极的布线图案 以及通过贯通孔设置在布线图案上并从与形成布线图案的基板的表面相反的表面突出的外部电极。 粘合剂的一部分被拉入以插入在穿透孔和外部电极之间。

公开(公告)号：US06856008B2

公开(公告)日：2005-02-15

申请号：US10641037

申请日：2003-08-15

Applicant: Deepak K. Pai ,  Ronald R. Denny

Inventor： Deepak K. Pai ,  Ronald R. Denny

IPC: H05K1/14 ,  H01L23/12 ,  H05K3/28 ,  H05K3/34 ,  H05K3/36 ,  H05K3/46 ,  H01L23/02

CPC classification number: H05K3/462 ,  H01L2224/05548 ,  H05K3/28 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/4623 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/0949 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/043 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Abstract translation: 本发明提供了用于层叠和互连多个高层计数（HLC）衬底以形成多层封装或其它电路部件的多种技术。 可以在两个HLC衬底中的至少一个的导电焊盘上形成焊料凸块。 焊料凸块优选地由焊膏应用于导电焊盘形成。 粘合剂膜可以位于具有导电焊盘的HLC衬底的表面之间，其中粘合剂膜包括基本上位于导电焊盘上方的孔，使得导电焊盘和/或焊料凸块通过孔彼此面对。 然后可以将HLC基底压在一起以经由粘合剂机械地粘合两个基底。 在叠层期间或之后可以回流焊料凸点，以产生焊接段，该焊料段通过粘合膜中的孔提供两个导电焊盘之间的电连接。

公开(公告)号：US20050011677A1

公开(公告)日：2005-01-20

申请号：US10891190

申请日：2004-07-15

Applicant: Toyokazu Yoshino ,  Kouji Nakashima

Inventor： Toyokazu Yoshino ,  Kouji Nakashima

IPC: H05K3/40 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K3/4038 ,  H05K3/4046 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2201/0215 ,  H05K2201/0305 ,  H05K2201/096 ,  H05K2201/10234 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T29/49153

Abstract: To provide an interlayer-connected, multi-layer flexible printed circuit board having high bonding reliability and most suitable for micropatterning the circuit layers in the device; and to provide a high-productivity method for fabricating the device. A multi-layer flexible printed circuit board, wherein a conductor is filled in the through-holes formed in the insulating layer in the direction of the thickness thereof so as to electrically interconnect the circuit layers formed on both faces of the insulating layer, and wherein the conductor contains inside it, a copper-core solder ball having a copper ball as a core thereof.

Abstract translation: 提供层间连接的多层柔性印刷电路板，其具有高结合可靠性并且最适合于将装置中的电路层微图案化; 并且提供用于制造该器件的高生产率方法。 一种多层柔性印刷电路板，其中导电体在其厚度方向上填充在形成在绝缘层中的通孔中，以使形成在绝缘层的两个面上的电路层电连接，并且其中 导体内部含有以铜球为核心的铜芯焊球。

公开(公告)号：US06842341B1

公开(公告)日：2005-01-11

申请号：US10677458

申请日：2003-10-02

Applicant: John M. Waldvogel ,  Brian R. Bielick ,  Herman J. Miller ,  Billy J. Van Cannon

Inventor： John M. Waldvogel ,  Brian R. Bielick ,  Herman J. Miller ,  Billy J. Van Cannon

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H05K3/38 ,  H05K3/40 ,  H05K7/20

CPC classification number: H05K1/021 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10166 ,  H05K2201/10969 ,  H05K2203/042 ,  H05K2203/063

Abstract: An electrical circuit apparatus (300) that includes: a substrate (330) having a ground layer (336), at least one device aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate such that at least a portion of the substrate device aperture overlaps the heat sink, the adhesive layer having at least one device aperture and at least one solder aperture, wherein aligning the at least one substrate solder aperture with the at least one adhesive layer solder aperture and aligning the at least one substrate device aperture with the at least one adhesive layer device aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

Abstract translation: 一种电路设备（300），包括：具有接地层（336），至少一个器件孔（332）和至少一个焊料孔（334）的衬底（330）; 散热器（310）; 以及用于将所述散热器机械耦合到所述基板的接地层的粘合剂层（320），使得所述基板装置孔的至少一部分与所述散热器重叠，所述粘合剂层具有至少一个装置孔和至少一个焊料 孔，其中将所述至少一个衬底焊接孔与所述至少一个粘合剂层焊接孔对准并且将所述至少一个衬底器件孔与所述至少一个粘合剂层器件孔对准使得焊料在所述散热器和所述散热器之间的预定区域中润湿 衬底的接地层。