公开(公告)号：US4303798A

公开(公告)日：1981-12-01

申请号：US34210

申请日：1979-04-27

Applicant: Milan Paunovic

Inventor： Milan Paunovic

IPC: H05K3/06 ,  H05K3/24 ,  H05K3/42 ,  H05K1/09

CPC classification number: H05K3/24 ,  H05K3/244 ,  H05K3/42 ,  H05K2201/0341 ,  H05K3/062 ,  H05K3/426 ,  H05K3/427 ,  H05K3/428 ,  Y10S428/901

Abstract: The heat shock resistance of plated through holes in printed circuit assemblies is significantly increased by using as the through hole plating a special multi-layered arrangement comprising at least two layers of an electrically conductive metal in combination with at least one intermediate layer of a different electrically conductive metal. In preferred embodiments, the through hole plating comprises at least two layers of a stressed metal together with at least one intermediate layer of a metal having a stress in counteraction to that of one or more of the other metal layers. These through hole platings are capable of exposure to conditions of heat shock, such as encountered during high temperature soldering, without developing cracks resulting in breaks in the conducting pathways and failures.

Abstract translation: 通过使用特殊的多层布置，包括至少两层导电金属与至少一个不同电学中间层的组合，使用印刷电路组件中电镀通孔的耐热冲击性 导电金属。 在优选实施例中，通孔镀层包括至少两层应力金属以及至少一个金属中间层，其具有与一个或多个其它金属层的应力相反的应力。 这些通孔电镀能够暴露于热冲击的条件下，例如在高温焊接期间遇到的，而不会产生导致导电路径和故障中断的裂纹。

公开(公告)号：US11832385B2

公开(公告)日：2023-11-28

申请号：US17554101

申请日：2021-12-17

Applicant: DONGWOO FINE-CHEM CO., LTD.

Inventor： Ki Joon Park ,  Sung Jin Noh ,  Jungu Lee

IPC: H05K1/09 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H01L33/62 ,  H05K1/03 ,  H01L25/075

CPC classification number: H05K1/09 ,  H01L33/62 ,  H05K1/0271 ,  H01L25/075 ,  H05K1/0306 ,  H05K1/111 ,  H05K1/18 ,  H05K2201/0326 ,  H05K2201/0341 ,  H05K2201/10106

Abstract: A circuit board includes a base layer, a seed layer formed on the base layer, and a first electrode layer formed on the seed layer. The seed layer is formed of a metal oxide with a thickness of 100 to 400 Å. The circuit board may further include an insulation layer formed on the first electrode layer and a second electrode layer formed on the insulation layer.

公开(公告)号：US20170271301A1

公开(公告)日：2017-09-21

申请号：US15593160

申请日：2017-05-11

Applicant: SKYWORKS SOLUTIONS, INC.

Inventor： Sandra Louise Petty-Weeks ,  Guohao Zhang ,  Hardik Bhupendra Modi

IPC: H01L23/00 ,  H01L23/66 ,  H05K1/02 ,  H05K3/24

CPC classification number: H01L24/85 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48159 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48644 ,  H01L2224/48844 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13051 ,  H01L2924/1421 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/0243 ,  H05K3/244 ,  H05K2201/0341 ,  H01L2924/00014 ,  H01L2924/00

Abstract: This disclosure relates to a radio frequency (RF) transmission line for high performance RF applications. The RF transmission line includes a bonding layer having a bonding surface and configured to receive an RF signal, a barrier layer proximate the bonding layer, a diffusion barrier layer proximate the bonding layer and configured to prevent contaminant from entering the bonding layer, and a conductive layer proximate the diffusion barrier layer. The diffusion barrier layer has a thickness that allows the received RF signal to penetrate the diffusion barrier layer to the conductive layer. The diffusion barrier layer can be a nickel layer.

公开(公告)号：US09744624B2

公开(公告)日：2017-08-29

申请号：US14742070

申请日：2015-06-17

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Jaen-Don Lan ,  Pin-Chung Lin ,  Chen-Rui Tseng ,  Cheng-En Ho ,  Yu-An Chen

IPC: H05K3/46 ,  B23K26/402 ,  H05K3/42 ,  B23K26/382 ,  B23K103/00

CPC classification number: B23K26/402 ,  B23K26/382 ,  B23K26/389 ,  B23K2101/40 ,  B23K2103/172 ,  B23K2103/30 ,  B23K2103/42 ,  B23K2103/50 ,  H05K3/426 ,  H05K3/4644 ,  H05K2201/0341

Abstract: Disclosed is a method for manufacturing a circuit board, including preparing a substrate having a resin layer and a stop layer, forming at least one conduction hole penetrating the resin layer and stopping at the stop layer, forming a first metal layer through a sputtering process, forming a second metal layer on the first metal layer through a chemical plating process, forming a third metal layer having a circuit pattern, exposing part of the second metal layer and filling up the conduction hole through an electroplating process, and etching the second metal layer and the first metal layer under the second metal layer to expose the resin layer under the first metal layer. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and stable. The etched circuit pattern has a line width/pitch less than 10 μm for fine line width/pitch.

公开(公告)号：US09726357B2

公开(公告)日：2017-08-08

申请号：US14761981

申请日：2014-01-20

Applicant: Sharp Kabushiki Kaisha

Inventor： Masahiro Konishi ,  Yuhsuke Fujita ,  Ippei Yamaguchi ,  Takashi Nakanishi ,  Hiroyuki Nokubo

IPC: H01L21/44 ,  H01L23/532 ,  F21V23/00 ,  F21K9/00 ,  H05K3/24 ,  H01L33/62 ,  H05K1/05 ,  F21Y115/10

CPC classification number: F21V23/002 ,  F21K9/00 ,  F21Y2115/10 ,  H01L33/62 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H05K1/053 ,  H05K3/246 ,  H05K3/247 ,  H05K2201/0341 ,  H05K2201/10106 ,  H05K2201/10409 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In a light-emitting device (30), a wiring pattern including conductor wirings (160, 165) and electrodes (170, 180) is formed on a substrate (110), and an Au layer (120) is formed on the wiring pattern.

公开(公告)号：US09661750B2

公开(公告)日：2017-05-23

申请号：US14364013

申请日：2012-11-30

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Kyoung Jo ,  Seol Hee Lim ,  Chang Hwa Park ,  Sai Ran Eom ,  Ae Rim Kim

IPC: H05K1/09 ,  H05K3/18 ,  H05K3/24

CPC classification number: H05K1/092 ,  H05K3/182 ,  H05K3/188 ,  H05K3/244 ,  H05K2201/0341 ,  H05K2201/09436 ,  H05K2201/099 ,  Y10T29/49155

Abstract: Provided is a printed circuit board, including: a circuit pattern or a base pattern formed on an insulating layer; and a plurality of metal layers formed on the circuit pattern or the base pattern, wherein the metal layers includes: a silver metal layer formed of a metal material including silver; a first palladium metal layer formed at a lower part of the silver metal layer; and a second palladium metal layer formed at an upper part of the silver metal layer.

公开(公告)号：US09590155B2

公开(公告)日：2017-03-07

申请号：US13828895

申请日：2013-03-14

Applicant: Cree, Inc.

Inventor： Christopher P. Hussell ,  Jesse Colin Reiherzer ,  Erin Welch

IPC: H01L33/62 ,  H01L33/60 ,  H05K3/24 ,  H01L25/075 ,  H01L33/64

CPC classification number: H01L33/62 ,  H01L25/0753 ,  H01L33/60 ,  H01L33/641 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2933/0033 ,  H05K3/244 ,  H05K2201/0341 ,  H05K2201/099 ,  H05K2201/10106 ,  H05K2201/2054 ,  H05K2203/073 ,  H05K2203/1461 ,  H01L2924/00014

Abstract: Light emitting devices and substrates are provided with improved plating. In one embodiment, a light emitting device can include a submount and one or more light emitting diodes (LED) chips disposed over the submount. In one embodiment, the submount can include a copper (Cu) substrate, a first metallic layer of material that is highly reflective disposed over the Cu substrate for increased brightness of the device, and a second metallic layer disposed between the Cu substrate and the first metallic layer for forming a barrier therebetween.

Abstract translation: 发光器件和衬底具有改进的电镀。 在一个实施例中，发光器件可以包括底座和设置在所述底座上方的一个或多个发光二极管（LED）芯片。 在一个实施例中，底座可以包括铜（Cu）衬底，高度反射性地设置在Cu衬底上的用于增加器件亮度的第一金属材料层，以及设置在Cu衬底和第一衬底之间的第二金属层 用于在其间形成屏障的金属层。

公开(公告)号：US20170034909A1

公开(公告)日：2017-02-02

申请号：US15223241

申请日：2016-07-29

Applicant: Nitto Denko Corporation

Inventor： Daisuke YAMAUCHI ,  Hiroyuki TANABE

IPC: H05K1/02 ,  G11B5/48 ,  H05K1/09 ,  H05K3/46 ,  H05K1/03

CPC classification number: G11B5/4833 ,  G11B5/484 ,  H05K1/056 ,  H05K1/09 ,  H05K1/111 ,  H05K3/244 ,  H05K3/388 ,  H05K2201/0341 ,  H05K2201/0347 ,  H05K2201/05 ,  Y02P70/611

Abstract: A conductor trace is formed on a base insulating layer. The conductor trace includes two terminal portions and one wiring portion. The wiring portion is formed to connect the two terminal portions to each other and extend from each terminal portion. A metal cover layer is formed to cover the terminal portion and the wiring portion of the conductor trace and continuously extend from a surface of the terminal portion to a surface of the wiring portion. The metal cover layer is made of metal having magnetism lower than magnetism of nickel, and is made of gold, for example. A cover insulating layer is formed on the base insulating layer to cover a portion, of the metal cover layer formed on the conductor trace, covering the wiring portion and not to cover a portion of the metal cover layer covering the terminal portion.

Abstract translation: 在基底绝缘层上形成导体迹线。 导体迹线包括两个端子部分和一个布线部分。 布线部形成为将两个端子部彼此连接并从各端子部延伸。 形成金属覆盖层以覆盖导体迹线的端子部分和布线部分并且从端子部分的表面连续地延伸到布线部分的表面。 金属覆盖层由具有低于镍的磁性的金属制成，例如由金制成。 在绝缘层上形成覆盖绝缘层，以覆盖形成在导体迹线上的金属覆盖层的覆盖布线部分的部分，而不覆盖覆盖端子部分的金属覆盖层的一部分。

公开(公告)号：US09558859B2

公开(公告)日：2017-01-31

申请号：US14183492

申请日：2014-02-18

Applicant: RSM Electron Power, Inc.

Inventor： Ching Au ,  Manhong Zhao ,  Robert Conte

IPC: H01B1/02 ,  H05K3/24 ,  H01L23/373

CPC classification number: H01B1/02 ,  H01L23/3735 ,  H01L23/3736 ,  H01L2924/0002 ,  H05K3/244 ,  H05K2201/0341 ,  H05K2201/068 ,  Y10T428/12743 ,  Y10T428/1275 ,  Y10T428/12847 ,  Y10T428/12889 ,  Y10T428/12896 ,  Y10T428/1291 ,  H01L2924/00

Abstract: The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion, thus greatly improve the reliability of electronic packages. The slip layer substrate comprises: a base material; a first metallization layer formed on the base material; a first diffusion barrier layer formed on the first metallization layer; a slip layer formed on the first diffusion barrier layer; a second diffusion barrier layer formed on the slip layer; and a second metallization layer formed on the second diffusion barrier layer.

Abstract translation: 本发明提供了一种滑动层基材，其可以降低由它们的热膨胀失配引起的组分之间的热残余应力，从而大大提高电子封装的可靠性。 滑动层基材包括：基材; 形成在基材上的第一金属化层; 形成在第一金属化层上的第一扩散阻挡层; 形成在第一扩散阻挡层上的滑移层; 形成在滑动层上的第二扩散阻挡层; 以及形成在第二扩散阻挡层上的第二金属化层。

公开(公告)号：US09538651B2

公开(公告)日：2017-01-03

申请号：US14820978

申请日：2015-08-07

Applicant: IBIDEN CO., LTD.

Inventor： Yasushi Inagaki ,  Kota Noda

IPC: H05K1/11 ,  H05K3/06 ,  H05K1/02 ,  H05K1/09 ,  H05K3/00 ,  H05K3/20 ,  H05K3/40 ,  H05K3/18

CPC classification number: H05K1/111 ,  H05K1/0271 ,  H05K1/0296 ,  H05K1/09 ,  H05K1/115 ,  H05K3/007 ,  H05K3/06 ,  H05K3/061 ,  H05K3/188 ,  H05K3/202 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4069 ,  H05K2201/0302 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2201/098 ,  H05K2203/06 ,  Y02P70/611

Abstract: A printed wiring board includes an insulating layer, a first conductor layer embedded into a first surface of the insulating layer and including connecting portions to connect an electronic component, a second conductor layer projecting from a second surface of the insulating layer, a solder resist layer covering the first conductor layer and having an opening structure exposing the connecting portions, a barrier metal layer formed on the connecting portions such that the barrier layer is projecting from the first surface of the insulating layer, and metal posts formed on the barrier layer such that the metal posts are positioned on the connecting portions, respectively. Each metal post has width which is greater than width of a respective connecting portion, and the barrier metal layer includes a metal material which is different from a metal material forming the metal posts and a metal material forming the first conductor layer.

Abstract translation: 印刷布线板包括绝缘层，第一导体层，其嵌入绝缘层的第一表面中，并且包括用于连接电子部件的连接部分，从绝缘层的第二表面突出的第二导体层，阻焊层 覆盖第一导体层并具有露出连接部分的开口结构，形成在连接部分上的阻挡金属层，使得阻挡层从绝缘层的第一表面突出，以及形成在阻挡层上的金属柱，使得 金属柱分别位于连接部分上。 每个金属柱的宽度大于相应连接部分的宽度，并且阻挡金属层包括与形成金属柱的金属材料不同的金属材料和形成第一导体层的金属材料。