公开(公告)号：US09699894B2

公开(公告)日：2017-07-04

申请号：US14895944

申请日：2015-03-11

Applicant: Seoul National University R&DB Foundation

Inventor： Maenghyo Cho ,  Kyu Jin Cho ,  Junghyun Ryu ,  Je Sung Koh ,  Jong Gu Lee

IPC: G01R27/08 ,  H05K1/02 ,  H05K3/12 ,  G01B7/16 ,  G01R27/02 ,  G01N27/00 ,  G01R27/00 ,  G01N27/02

CPC classification number: H05K1/028 ,  G01B7/18 ,  G01B7/20 ,  G01N27/00 ,  G01N27/02 ,  G01R27/00 ,  G01R27/02 ,  G01R27/08 ,  H05K1/02 ,  H05K3/12 ,  H05K2201/07

Abstract: Disclosed herein is a deformation sensing flexible substrate using a pattern formed of a conductive material. The deformation sensing flexible substrate, using the pattern formed of the conductive material, includes a flexible substrate; and conductive patterns in which conductors including a conductive material are arranged and formed to be contactable and non-contact to each other based on deformation of the flexible substrate.

公开(公告)号：US20170181273A1

公开(公告)日：2017-06-22

申请号：US15379778

申请日：2016-12-15

Applicant: Fujitsu Technology Solutions Intellectual Property GmbH

Inventor： Wilhelm Neukam

IPC: H05K1/02 ,  H05K1/03 ,  H05K3/20 ,  H05K7/14

CPC classification number: H05K1/0275 ,  H05K1/0284 ,  H05K1/03 ,  H05K3/20 ,  H05K5/0208 ,  H05K7/1427 ,  H05K2201/0388 ,  H05K2201/07 ,  H05K2201/09154 ,  H05K2201/09681

Abstract: An assembly includes a carrier and an electrically conductive mesh, wherein the carrier includes a side surface with an edge, the electrically conductive mesh is attached to the side surface and extends over the edge of the side surface, and the edge has a radius at least as big as a minimal bending radius of electric lines of the electrically conductive mesh.

公开(公告)号：US20170094790A1

公开(公告)日：2017-03-30

申请号：US15310530

申请日：2015-03-05

Applicant: Auto-Kabel Management GmbH

Inventor： Wacim Tazarine ,  Simon Betscher ,  Frank Gronwald ,  Sohejl Rafati

IPC: H05K1/14 ,  F02N11/08 ,  H05K1/09 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/14 ,  F02N11/0862 ,  F02N11/087 ,  F02N2011/0874 ,  F02N2250/02 ,  H05K1/0204 ,  H05K1/0263 ,  H05K1/0287 ,  H05K1/056 ,  H05K1/09 ,  H05K1/111 ,  H05K1/142 ,  H05K1/145 ,  H05K2201/04 ,  H05K2201/06 ,  H05K2201/07 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10272

Abstract: Circuit arrangement for vehicles with at least one semiconductor element 30 and at least one first metal carrier plate 2a and a metal circuit board 2b. A multifaceted scope of application is provided if the carrier plate 2a is electrically insulated from the circuit board 2b and the carrier plate 2a is electrically linked with at least one of the circuit boards 2b by means of at least one semiconductor device 30 so that the carrier plate 2a and the circuit board 2b form an electrical three-pole.

公开(公告)号：US20170084976A1

公开(公告)日：2017-03-23

申请号：US15364899

申请日：2016-11-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Nobuo IKEMOTO ,  Yuki WAKABAYASHI ,  Shigeru TAGO

IPC: H01P3/08 ,  H05K1/11 ,  H01R12/62 ,  H05K3/46 ,  H01P11/00 ,  H05K1/02 ,  H05K3/36

CPC classification number: H01P3/082 ,  H01P3/08 ,  H01P11/003 ,  H01R12/62 ,  H01R24/50 ,  H01R2103/00 ,  H05K1/0219 ,  H05K1/0225 ,  H05K1/024 ,  H05K1/0242 ,  H05K1/0253 ,  H05K1/115 ,  H05K1/118 ,  H05K1/147 ,  H05K3/0052 ,  H05K3/363 ,  H05K3/4623 ,  H05K3/4632 ,  H05K2201/07 ,  H05K2201/09154 ,  H05K2201/0919 ,  H05K2201/09481 ,  H05K2201/09527 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/097 ,  H05K2201/09845 ,  H05K2201/10037 ,  H05K2201/10204 ,  Y10T29/49016

Abstract: In a high frequency signal line, a first signal line extends along a first dielectric element assembly, a first reference ground conductor extends along the first signal line, a second signal line is provided in or on the second dielectric element assembly and extends along the second dielectric element assembly, a second reference ground conductor is provided in or on the second dielectric element assembly and extends along the second signal line. A portion of a bottom surface at an end of the first dielectric element assembly and a portion of the top surface at an end of the second dielectric element assembly are joined together such that a joint portion of the first and second dielectric element assemblies includes a corner. The second signal line and the first signal line are electrically coupled together. The first and second reference ground conductors are electrically coupled together.

公开(公告)号：US20160336690A1

公开(公告)日：2016-11-17

申请号：US14948519

申请日：2015-11-23

Applicant: CommScope Technologies LLC

Inventor： Steven Richard Bopp ,  Neil Ktul Nay

IPC: H01R13/6466 ,  H01R13/6469 ,  H01R24/64 ,  H05K1/02

CPC classification number: H01R13/6466 ,  H01R13/6461 ,  H01R13/6469 ,  H01R24/64 ,  H01R2107/00 ,  H05K1/0228 ,  H05K1/0239 ,  H05K1/11 ,  H05K2201/07 ,  H05K2201/10189

Abstract: An electrical connector that includes a circuit board having a board substrate that has opposite board surfaces and a thickness measured along an orientation axis that extends between the opposite board surfaces. The circuit board has associated pairs of input and output terminals and signal traces that electrically connect the associated pairs of input and output terminals. The input and output terminals being configured to communicatively coupled to mating and cable conductors, respectively. Each associated pair of input and output terminals is electrically connected through a corresponding signal trace that has a conductive path extending along the board substrate between the corresponding input and output terminals. At least two signal traces form a broadside-coupling region in which the conductive paths of the at least two signal traces are stacked along the orientation axis and spaced apart through the thickness and extend parallel to each other for a crosstalk-reducing distance.

公开(公告)号：US20160150645A1

公开(公告)日：2016-05-26

申请号：US14947166

申请日：2015-11-20

Applicant: Amphenol Corporation

Inventor： Mark W. Gailus ,  Marc B. Cartier, JR. ,  Vysakh Sivarajan ,  David Levine

IPC: H05K1/11

CPC classification number: H05K1/0222 ,  H01R43/205 ,  H05K1/0216 ,  H05K1/0219 ,  H05K1/025 ,  H05K1/0251 ,  H05K1/0253 ,  H05K1/0298 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/4038 ,  H05K3/429 ,  H05K2201/07 ,  H05K2201/09063 ,  H05K2201/09318 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/097 ,  H05K2201/09718 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2201/10189

Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

Abstract translation: 印刷电路板包括多个层，包括附着层和布线层; 以及通过多层形成的通路图案，每个通孔图案包括形成差分信号对的第一和第二信号通孔，第一和第二信号通孔至少延伸穿过附着层; 至少延伸穿过附着层的接地通孔，包括接地导体的接地通孔; 以及位于与第一和第二信号通孔中的每一个相邻的阴影通孔，其中阴影通孔在附着层中不含导电材料。 印刷电路板还可以包括延伸通过附着层并且位于通孔图案之间的槽孔。

公开(公告)号：US20150327358A1

公开(公告)日：2015-11-12

申请号：US14275604

申请日：2014-05-12

Applicant: FUJITSU LIMITED

Inventor： Yasuo HIDAKA

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/46 ,  H05K1/03

CPC classification number: H05K1/0245 ,  H01P3/08 ,  H05K1/024 ,  H05K1/0248 ,  H05K1/0313 ,  H05K1/0366 ,  H05K1/038 ,  H05K3/0091 ,  H05K3/10 ,  H05K3/4644 ,  H05K2201/0183 ,  H05K2201/07 ,  H05K2203/0195

Abstract: A circuit may be configured to reduce electrical signal degradation. The circuit may include a first trace and a second trace that may be broadside coupled between a first ground plane and a second ground plane. The first and second traces may be configured to carry first and second signals, respectively, of a differential signal. The circuit may also include a first dielectric material disposed between the first trace and the second trace. Further, the circuit may include a second dielectric material disposed between the first trace and the first ground plane and disposed between the second trace and the second ground plane. A difference between a first dielectric constant of the first dielectric material and a second dielectric constant of the second dielectric material may suppress a mode conversion of the differential signal from a differential mode to a common mode.

Abstract translation: 电路可以被配置为减少电信号衰减。 电路可以包括可以在第一接地平面和第二接地平面之间的宽边耦合的第一迹线和第二迹线。 第一和第二迹线可以被配置为分别携带差分信号的第一和第二信号。 电路还可以包括设置在第一迹线和第二迹线之间的第一介电材料。 此外，电路可以包括设置在第一迹线和第一接地平面之间并且设置在第二迹线和第二接地平面之间的第二介电材料。 第一介电材料的第一介电常数和第二介电材料的第二介电常数之间的差异可以抑制差分信号从差分模式到共模的模式转换。

公开(公告)号：US20150054601A1

公开(公告)日：2015-02-26

申请号：US14537059

申请日：2014-11-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Nobuo IKEMOTO ,  Yuki WAKABAYASHI ,  Shigeru TAGO

IPC: H01P3/08 ,  H05K1/11 ,  H01P11/00 ,  H05K1/02

CPC classification number: H01P3/082 ,  H01P3/08 ,  H01P11/003 ,  H01R12/62 ,  H01R24/50 ,  H01R2103/00 ,  H05K1/0219 ,  H05K1/0225 ,  H05K1/024 ,  H05K1/0242 ,  H05K1/0253 ,  H05K1/115 ,  H05K1/118 ,  H05K1/147 ,  H05K3/0052 ,  H05K3/363 ,  H05K3/4623 ,  H05K3/4632 ,  H05K2201/07 ,  H05K2201/09154 ,  H05K2201/0919 ,  H05K2201/09481 ,  H05K2201/09527 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/097 ,  H05K2201/09845 ,  H05K2201/10037 ,  H05K2201/10204 ,  Y10T29/49016

Abstract: In a high frequency signal line, a first signal line extends along a first dielectric element assembly, a first reference ground conductor extends along the first signal line, a second signal line is provided in or on the second dielectric element assembly and extends along the second dielectric element assembly, a second reference ground conductor is provided in or on the second dielectric element assembly and extends along the second signal line. A portion of a bottom surface at an end of the first dielectric element assembly and a portion of the top surface at an end of the second dielectric element assembly are joined together such that a joint portion of the first and second dielectric element assemblies includes a corner. The second signal line and the first signal line are electrically coupled together. The first and second reference ground conductors are electrically coupled together.

Abstract translation: 在高频信号线中，第一信号线沿着第一介电元件组件延伸，第一参考接地导体沿着第一信号线延伸，第二信号线设置在第二电介质元件组件中或第二电介质元件组件上，并沿着第二信号线延伸 电介质元件组件，第二参考接地导体设置在第二电介质元件组件中或第二介质元件组件上并沿第二信号线延伸。 在第一介电元件组件的端部处的底表面的一部分和第二介电元件组件的端部处的顶表面的一部分被接合在一起，使得第一和第二介电元件组件的接合部分包括角部 。 第二信号线和第一信号线电耦合在一起。 第一和第二参考接地导体电耦合在一起。