公开(公告)号：US20100101850A1

公开(公告)日：2010-04-29

申请号：US12277250

申请日：2008-11-24

Applicant: HOU-YUAN CHOU

Inventor： HOU-YUAN CHOU

IPC: H05K1/11 ,  H05K3/00

CPC classification number: H05K1/0268 ,  G01R31/2818 ,  H05K1/0237 ,  H05K1/11 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2203/162 ,  Y10T29/49124 ,  Y10T29/49147

Abstract: A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.

Abstract translation: 印刷电路板包括信号层，绝缘层和参考层。 传输线位于信号层上。 探测板位于传输线上。 限定在参考层的相对侧中的两个对准的槽留下连接部分。 槽和连接部分与探测板垂直对准。 信号层，绝缘层和参考层以级联顺序配置。 信号层相对于包括狭缝和连接部分的参考层的布置减小了由探测垫引起的电容效应。

公开(公告)号：US07663376B2

公开(公告)日：2010-02-16

申请号：US11890386

申请日：2007-08-06

Applicant: Jose Gabriel Fernandez

Inventor： Jose Gabriel Fernandez

IPC: G01R31/02

CPC classification number: H05K1/167 ,  G01R1/203 ,  G01R31/3696 ,  H01M10/06 ,  H01M10/425 ,  H01R11/281 ,  H01R13/6683 ,  H05K1/0268 ,  H05K2201/093

Abstract: A printed circuit board (PCB) having capabilities to measure a voltage drop of current flowing therethrough. The PCB may optionally include other capabilities for measuring, calculating, sensing, or other processing of information and data associated with the current flow or other operating conditions associated with the PCB, such as but not limited to those associated with battery monitoring systems.

Abstract translation: 一种印刷电路板（PCB），其具有测量流过其中的电流的电压降的能力。 PCB可以可选地包括用于测量，计算，感测或其他处理与当前流或与PCB相关联的其他操作条件的信息和数据的其他能力，例如但不限于与电池监视系统相关联的那些。

公开(公告)号：US07658622B2

公开(公告)日：2010-02-09

申请号：US12386592

申请日：2009-04-21

Applicant: Victor L. Bartholomew

Inventor： Victor L. Bartholomew

IPC: H01R12/00

CPC classification number: H05K1/0219 ,  H05K1/0201 ,  H05K1/0293 ,  H05K1/117 ,  H05K3/3405 ,  H05K3/3452 ,  H05K2201/0305 ,  H05K2201/062 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/09354 ,  H05K2201/0969 ,  H05K2201/10356 ,  H05K2203/173 ,  Y10S439/943 ,  Y10T29/49155

Abstract: A transition circuit board for transitioning a cable to a connector is provided. A circuit board has an outer surface with a circuit trace, ground plane and ground link provided thereon. A cable pad and a contact pad are provided at opposite ends of the circuit trace. The ground link is electrically common with the ground plane and is located adjacent to, and separated by a space from, the circuit trace. An insulating coating is provided over at least part of the circuit trace, the ground plane and the outer surface of the circuit board. The insulating coating has a mask aperture there-through exposing an uncoated portion of the circuit trace and the ground link. A conductive jumper material is provided on the uncoated portion of the circuit trace and the ground link to electrically join the circuit trace with the ground plane.

Abstract translation: 提供了一种用于将电缆转换到连接器的转换电路板。 电路板具有外表面，其上设置有电路迹线，接地平面和接地链路。 在电路迹线的相对端设有电缆垫和接触垫。 接地链路与接地平面电气相同，并且位于与电路迹线相邻并且与电路迹线隔开的空间中。 在电路板的至少一部分，接地平面和电路板的外表面上提供绝缘涂层。 绝缘涂层在其上具有掩模孔，通过暴露电路迹线的未涂覆部分和接地链路。 在电路迹线的未涂覆部分和接地链路上提供导电跳线材料，以将电路迹线与接地平面电连接。

公开(公告)号：US07655870B2

公开(公告)日：2010-02-02

申请号：US11829972

申请日：2007-07-30

Applicant: Liang-Yao Chang ,  Shou-Kuo Hsu

Inventor： Liang-Yao Chang ,  Shou-Kuo Hsu

IPC: H05K1/03

CPC classification number: H05K1/0225 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09972

Abstract: An exemplary printed circuit board includes a power plane, and a ground plane. The power plane includes two power modules, and an insulating medium for insulating the two power modules from each other. The ground plane is insulated from the power plane, a plurality of slots is defined in the ground plane and located close to facing edges of the two power modules, and the slots are arranged in rows along the facing edges of the two power modules.

Abstract translation: 示例性印刷电路板包括电源平面和接地平面。 电力平面包括两个电源模块和用于将两个电源模块彼此绝缘的绝缘介质。 接地层与电源平面绝缘，多个槽位于接地平面内，靠近两个电源模块的相对边缘，并沿着两个电源模块的相对边缘排成行。

公开(公告)号：US07626216B2

公开(公告)日：2009-12-01

申请号：US11583212

申请日：2006-10-18

Applicant: William E. McKinzie, III

Inventor： William E. McKinzie, III

IPC: H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/0336

CPC classification number: H01P1/20 ,  H01P1/2005 ,  H05K1/0218 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0236 ,  H05K1/0239 ,  H05K1/162 ,  H05K1/165 ,  H05K1/181 ,  H05K2201/093 ,  H05K2201/09318 ,  H05K2201/09609 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09718 ,  Y10T29/49018 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A hybrid electromagnetic bandgap (EBG) structure for broadband suppression of noise on printed wiring boards includes an array of coplanar patches interconnected into a grid by series inductances, and a corresponding array of shunt LC networks connecting the coplanar patches to a second conductive plane. This combination of series inductances and shunt resonant vias lowers the cutoff frequency for the fundamental stopband. The series inductances and shunt capacitances may be implemented using surface mount component technology, or printed traces. Patches may also be interconnected by coplanar coupled transmission lines. The even and odd mode impedances of the coupled lines may be increased by forming slots in the second conductive plane disposed opposite to the transmission line, lowering the cutoff frequency and increasing the bandwidth of the fundamental stopband. Coplanar EBG structures may be integrated into power distribution networks of printed wiring boards for broadband suppression of electromagnetic noise.

Abstract translation: 用于宽带抑制印刷电路板上的噪声的混合电磁带隙（EBG）结构包括通过串联电感互连到电网中的共面贴片阵列，以及将共面贴片连接到第二导电平面的相应阵列的分流LC网络。 串联电感和并联谐振通孔的组合降低了基波阻带的截止频率。 串联电感和分流电容可以使用表面贴装元件技术或印刷迹线实现。 补片也可以通过共面耦合传输线相互连接。 可以通过在与传输线相对布置的第二导电平面中形成槽，降低截止频率并增加基带阻带的带宽来增加耦合线的偶模和奇模阻抗。 共面EBG结构可以集成到用于宽带抑制电磁噪声的印刷线路板的配电网络中。

公开(公告)号：US20090290315A1

公开(公告)日：2009-11-26

申请号：US12373154

申请日：2007-06-08

Applicant: Hiroki Iwamiya ,  Yukio Sakai ,  Yuji Osumi

Inventor： Hiroki Iwamiya ,  Yukio Sakai ,  Yuji Osumi

IPC: H05K7/00

CPC classification number: H05K1/141 ,  H05K1/0216 ,  H05K1/0237 ,  H05K1/181 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10371 ,  H05K2201/10689 ,  H05K2201/2018 ,  H05K2203/1572

Abstract: In a communication device, a ground plane disposed on the upper or lower surface of a board or inside the board includes a first ground region disposed on a semiconductor circuit and connected thereto, and a second ground region disposed under an amplifier-and connected thereto. The first ground region and the second ground region do not overlap with each other.

Abstract translation: 在通信装置中，设置在基板的上表面或下表面或基板内的接地平面包括设置在半导体电路上并与其连接的第一接地区域和设置在放大器下方并与其连接的第二接地区域。 第一接地区域和第二接地区域彼此不重叠。

公开(公告)号：US20090173523A1

公开(公告)日：2009-07-09

申请号：US12406009

申请日：2009-03-17

Applicant: Naohiro HIROSE ,  Honjin En

Inventor： Naohiro HIROSE ,  Honjin En

IPC: H05K1/02

CPC classification number: H01L29/40 ,  H01L21/4763 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0224 ,  H05K1/0253 ,  H05K1/03 ,  H05K3/064 ,  H05K3/244 ,  H05K3/382 ,  H05K3/403 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/062 ,  H05K2201/093 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/09681 ,  H05K2203/1178

Abstract: Mesh holes 35a and 59a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50 are not lowered. Here, the diameter of each mesh hole is preferably 75 to 300 μm. The reason is as follows. If the diameter of the mesh hole is less than 75 μm, it is difficult to overlay the upper and lower mesh holes on one another. If the diameter exceeds 300 μm, the insulating properties of the interlayer resin insulating layers deteriorate. In addition, the distance between the mesh holes is preferably 100 to 2000 μm. The reason is as follows. If the distance is less than 100 μm, the solid layer cannot function. If the distance exceeds 2000 μm, the deterioration of the insulating properties of the interlayer resin insulating film occurs.

Abstract translation: 上固体层35和上固体层59的网孔35a和59a形成为彼此重叠，使得层间树脂绝缘层50的绝缘性能不降低。 这里，每个网孔的直径优选为75〜300μm。 原因如下。 如果网孔的直径小于75μm，则难以将上，下网孔叠置在一起。 如果直径超过300μm，则层间树脂绝缘层的绝缘性能变差。 此外，网眼之间的距离优选为100〜2000μm。 原因如下。 如果距离小于100um，则固体层不能起作用。 如果距离超过2000μm，则发生层间树脂绝缘膜的绝缘性劣化。

公开(公告)号：US07534109B2

公开(公告)日：2009-05-19

申请号：US11705414

申请日：2007-02-13

Applicant: Makoto Hattori ,  Masahiko Asai ,  Koji Toyama ,  Koji Nakano

Inventor： Makoto Hattori ,  Masahiko Asai ,  Koji Toyama ,  Koji Nakano

IPC: H01R12/00

CPC classification number: H05K1/0262 ,  H05K1/0227 ,  H05K1/0231 ,  H05K2201/093 ,  H05K2201/09663

Abstract: A control board has a pattern for a low-voltage circuit including a ground pattern connectable to a ground and a pattern for a high-voltage circuit including a ground pattern. The patterns for the low-voltage and high-voltage circuits each have one or more ground-connection lands configured to connect the ground patterns thereof to each other via one or more capacitors.

Abstract translation: 控制板具有用于低压电路的图案，其包括可连接到地的接地图案和包括接地图案的高压电路的图案。 低电压电路和高电压电路的图案各自具有一个或多个接地连接焊盘，其被配置为经由一个或多个电容器将其接地图案彼此连接。

公开(公告)号：US20090107700A1

公开(公告)日：2009-04-30

申请号：US12301409

申请日：2007-05-18

Applicant: Motonari Ogura

Inventor： Motonari Ogura

IPC: H05K1/00

CPC classification number: H05K1/0271 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/117 ,  H05K2201/093 ,  H05K2201/09363 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/10689 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: A printed wiring board includes a substrate member, terminals and wiring pattern. The terminals are formed in a specific shape on the substrate member and arranged to be aligned in a specific arrangement direction on the substrate member. The wiring pattern is formed on the opposite side across the substrate member from a terminal portion where the terminals are formed, and a plurality of slits are formed extending in a direction perpendicular to the specific arrangement direction.

Abstract translation: 印刷电路板包括基板部件，端子和布线图案。 端子在基板部件上形成为特定的形状，并且被布置成在基板部件上沿特定排列方向对齐。 布线图案从形成有端子的端子部分的基板部件的相反侧形成，并且沿垂直于特定布置方向的方向形成多个狭缝。

公开(公告)号：US07514779B2

公开(公告)日：2009-04-07

申请号：US10334062

申请日：2002-12-31

Applicant: Naohiro Hirose ,  Honjin En

Inventor： Naohiro Hirose ,  Honjin En

IPC: H01L21/4763 ,  H01L23/12 ,  H01L23/495 ,  H01L29/40 ,  H01L21/00 ,  H05K1/00 ,  H05K7/20 ,  H05K1/14 ,  H05K7/00 ,  H01R9/00

CPC classification number: H01L29/40 ,  H01L21/4763 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0224 ,  H05K1/0253 ,  H05K1/03 ,  H05K3/064 ,  H05K3/244 ,  H05K3/382 ,  H05K3/403 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/062 ,  H05K2201/093 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/09681 ,  H05K2203/1178

Abstract: Mesh holes 35a and 59a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50 are not lowered. Here, the diameter of each mesh hole is preferably 75 to 300 μm. The reason is as follows. If the diameter of the mesh hole is less than 75 μm, it is difficult to overlay the upper and lower mesh holes on one another. If the diameter exceeds 300 μm, the insulating properties of the interlayer resin insulating layers deteriorate. In addition, the distance between the mesh holes is preferably 100 to 2000 μm. The reason is as follows. If the distance is less than 100 μm, the solid layer cannot function. If the distance exceeds 2000 μm, the deterioration of the insulating properties of the interlayer resin insulating film occurs.

Abstract translation: 上固体层35和上固体层59的网孔35a和59a形成为彼此重叠，使得层间树脂绝缘层50的绝缘性能不降低。 这里，每个网孔的直径优选为75〜300μm。 原因如下。 如果网孔的直径小于75μm，则难以将上，下网孔叠置在一起。 如果直径超过300μm，则层间树脂绝缘层的绝缘性能变差。 此外，网眼之间的距离优选为100〜2000μm。 原因如下。 如果距离小于100um，则固体层不能起作用。 如果距离超过2000μm，则发生层间树脂绝缘膜的绝缘性劣化。