公开(公告)号：US20180151469A1

公开(公告)日：2018-05-31

申请号：US15651106

申请日：2017-07-17

Applicant: Shannon Systems Ltd.

Inventor： Xiaoyan CHEN

IPC: H01L23/367 ,  H05K1/02 ,  H01L23/42 ,  H01L23/04 ,  G06F1/20 ,  G06F1/18

CPC classification number: H01L23/3675 ,  G06F1/18 ,  G06F1/20 ,  G11C5/00 ,  H01L23/04 ,  H01L23/42 ,  H05K1/0201 ,  H05K7/20 ,  H05K7/20709 ,  H05K7/20727 ,  H05K2201/10159

Abstract: A solid-state drive device is provided. The solid-state drive device includes a housing, a first circuit board, and a second circuit board. The housing includes a first side and a second side. The first side is opposite to the second side. At least one first ventilation hole is formed on the first side. At least one second ventilation hole is formed on the second side. The first circuit board is disposed in the housing. The second circuit board is disposed in the housing. The second circuit board is coupled to the first circuit board. A gap is formed between the first circuit board and the second circuit board. The first ventilation hole and the second ventilation hole correspond to the gap.

公开(公告)号：US20180145051A1

公开(公告)日：2018-05-24

申请号：US15357233

申请日：2016-11-21

Applicant: Intel Corporation

Inventor： Howe Yin Loo ,  Eng Huat Goh ,  Min Suet Lim ,  Bok Eng Cheah ,  Jackson Chung Peng Kong ,  Khang Choong Yong

IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00 ,  H01L23/498 ,  H05K1/11 ,  H05K3/36 ,  H05K3/30

CPC classification number: H01L25/0657 ,  H01L23/49811 ,  H01L25/0655 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/15311 ,  H05K1/111 ,  H05K1/141 ,  H05K3/30 ,  H05K3/36 ,  H05K3/368 ,  H05K2201/042 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/10159 ,  H05K2201/10378 ,  H05K2201/10545 ,  H05K2201/10734

Abstract: A system-in-package apparatus includes a package substrate configured to carry at least one semiconductive device on a die side and a through-mold via package bottom interposer disposed on the package substrate on a land side. A land side board mates with the through-mold via package bottom interposer, and enough vertical space is created by the through-mold via package bottom interposer to allow space for at least one device disposed on the package substrate on the land side.

公开(公告)号：US09974165B2

公开(公告)日：2018-05-15

申请号：US15418918

申请日：2017-01-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Naoki Gouchi

IPC: H05K1/11 ,  H05K1/18 ,  H05K1/02 ,  H05K3/40 ,  H05K3/24

CPC classification number: H05K1/0287 ,  H05K1/0292 ,  H05K1/0293 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/0393 ,  H05K1/111 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/24 ,  H05K3/4007 ,  H05K3/4092 ,  H05K3/4632 ,  H05K2201/0195 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09781 ,  H05K2201/10007 ,  H05K2201/10159 ,  H05K2201/10984 ,  H05K2201/2072 ,  H05K2203/0271 ,  H05K2203/063 ,  H05K2203/08

Abstract: To prevent decrease of the bonding strength of an electronic component and a multilayer substrate, an electronic component-embedded module may include an electronic component having a plurality of pads and a multilayer substrate which includes a plurality of resin layers and a cavity for containing the electronic component. The multilayer substrate may include a first resin layer having a plurality of first pattern conductors and a space, and a second resin layer having a second pattern conductor and a plurality of third pattern conductors. The plurality of third pattern conductors may be in conduction with either of the first pattern conductors or the pads, with the second resin layer being placed over the first resin layer. The second pattern conductor may be arranged around a first pad with a gap, and the second resin layer is present between the second pattern conductor and at least one of the first pads.

公开(公告)号：US09973207B2

公开(公告)日：2018-05-15

申请号：US15639602

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Vinodh Gopal ,  James D. Guilford

IPC: H03M7/40 ,  H03M7/30

CPC classification number: H04Q11/0005 ,  B25J15/0014 ,  B65G1/0492 ,  G02B6/3882 ,  G02B6/3893 ,  G02B6/3897 ,  G02B6/4292 ,  G02B6/4452 ,  G05D23/1921 ,  G05D23/2039 ,  G06F1/183 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/0631 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0664 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0673 ,  G06F3/0679 ,  G06F3/0683 ,  G06F3/0688 ,  G06F3/0689 ,  G06F8/65 ,  G06F9/4401 ,  G06F9/5016 ,  G06F9/5044 ,  G06F9/505 ,  G06F9/5072 ,  G06F9/5077 ,  G06F11/141 ,  G06F11/3414 ,  G06F12/0862 ,  G06F12/0893 ,  G06F12/10 ,  G06F12/109 ,  G06F12/1408 ,  G06F13/161 ,  G06F13/1668 ,  G06F13/1694 ,  G06F13/4022 ,  G06F13/4068 ,  G06F13/409 ,  G06F13/42 ,  G06F13/4282 ,  G06F15/8061 ,  G06F17/30949 ,  G06F2209/5019 ,  G06F2209/5022 ,  G06F2212/1008 ,  G06F2212/1024 ,  G06F2212/1041 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/202 ,  G06F2212/401 ,  G06F2212/402 ,  G06F2212/7207 ,  G06Q10/06 ,  G06Q10/06314 ,  G06Q10/087 ,  G06Q10/20 ,  G06Q50/04 ,  G07C5/008 ,  G08C17/02 ,  G08C2200/00 ,  G11C5/02 ,  G11C5/06 ,  G11C7/1072 ,  G11C11/56 ,  G11C14/0009 ,  H03M7/30 ,  H03M7/3084 ,  H03M7/3086 ,  H03M7/40 ,  H03M7/4031 ,  H03M7/4056 ,  H03M7/4081 ,  H03M7/6005 ,  H03M7/6023 ,  H04B10/25 ,  H04B10/2504 ,  H04L9/0643 ,  H04L9/14 ,  H04L9/3247 ,  H04L9/3263 ,  H04L12/2809 ,  H04L29/12009 ,  H04L41/024 ,  H04L41/046 ,  H04L41/0813 ,  H04L41/082 ,  H04L41/0896 ,  H04L41/12 ,  H04L41/145 ,  H04L41/147 ,  H04L41/5019 ,  H04L43/065 ,  H04L43/08 ,  H04L43/0817 ,  H04L43/0876 ,  H04L43/0894 ,  H04L43/16 ,  H04L45/02 ,  H04L45/52 ,  H04L47/24 ,  H04L47/765 ,  H04L47/782 ,  H04L47/805 ,  H04L47/82 ,  H04L47/823 ,  H04L49/15 ,  H04L49/25 ,  H04L49/357 ,  H04L49/45 ,  H04L49/555 ,  H04L67/02 ,  H04L67/10 ,  H04L67/1004 ,  H04L67/1008 ,  H04L67/1012 ,  H04L67/1014 ,  H04L67/1029 ,  H04L67/1034 ,  H04L67/1097 ,  H04L67/12 ,  H04L67/16 ,  H04L67/306 ,  H04L67/34 ,  H04L69/04 ,  H04L69/329 ,  H04Q1/04 ,  H04Q11/00 ,  H04Q11/0003 ,  H04Q11/0062 ,  H04Q11/0071 ,  H04Q2011/0037 ,  H04Q2011/0041 ,  H04Q2011/0052 ,  H04Q2011/0073 ,  H04Q2011/0079 ,  H04Q2011/0086 ,  H04Q2213/13523 ,  H04Q2213/13527 ,  H04W4/023 ,  H04W4/80 ,  H05K1/0203 ,  H05K1/181 ,  H05K5/0204 ,  H05K7/1418 ,  H05K7/1421 ,  H05K7/1422 ,  H05K7/1447 ,  H05K7/1461 ,  H05K7/1485 ,  H05K7/1487 ,  H05K7/1489 ,  H05K7/1491 ,  H05K7/1492 ,  H05K7/1498 ,  H05K7/2039 ,  H05K7/20709 ,  H05K7/20727 ,  H05K7/20736 ,  H05K7/20745 ,  H05K7/20836 ,  H05K13/0486 ,  H05K2201/066 ,  H05K2201/10121 ,  H05K2201/10159 ,  H05K2201/10189 ,  Y10S901/01

Abstract: Technologies for heuristic Huffman code generation include a computing device that generates a weighted list of symbols for a data block. The computing device determines a threshold weight and identifies one or more lightweight symbols in the list that have a weight less than or equal to the threshold weight. The threshold weight may be the average weight of all symbols with non-zero weight in the list. The computing device generates a balanced sub-tree of nodes for the lightweight symbols, with each lightweight symbol associated with a leaf node. The computing device adds the remaining symbols and the root of the balanced sub-tree to a heap and generates a Huffman code tree by processing the heap. The threshold weight may be adjusted to tune performance and compression ratio. Other embodiments are described and claimed.

公开(公告)号：US09955586B2

公开(公告)日：2018-04-24

申请号：US14800751

申请日：2015-07-16

Applicant: REALTEK SEMICONDUCTOR CORP.

Inventor： Ting-Ying Wu ,  Cheng-Lin Wu ,  Chin-Yuan Lo ,  Wen-Shan Wang

IPC: H05K7/10 ,  H05K3/34 ,  H01L23/498 ,  H01L23/50 ,  H05K7/00 ,  H05K7/12 ,  H05K1/02

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0215 ,  H05K1/0289 ,  H05K2201/10159 ,  H05K2201/10704 ,  H05K2201/10712 ,  H05K2201/10719 ,  H05K2201/10734 ,  Y02P70/613 ,  H01L2924/00

Abstract: A Ball Grid Array (BGA) formed on printed circuit board is provided. The BGA comprises a first solder ball module and a second solder ball module. The first solder ball module comprises a plurality of first solder balls, wherein one of the first solder balls is grounded for shielding two other first solder balls, and one of the first solder balls is floating. The second solder ball module comprises a plurality of second solder balls, wherein two of the second solder balls are grounded and one of the two grounded second solder balls penetrates the printed circuit board through a plated through hole formed on the printed circuit board for shielding two first solder balls among the first solder balls.

公开(公告)号：US20180102329A1

公开(公告)日：2018-04-12

申请号：US15831554

申请日：2017-12-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James A. BUSBY ,  Silvio DRAGONE ,  Michael A. GAYNES ,  Kenneth P. RODBELL ,  William SANTIAGO-FERNANDEZ

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/053 ,  H01L23/08 ,  H05K1/18 ,  G06F21/86 ,  H05K1/03 ,  H05K3/30

CPC classification number: H01L23/576 ,  G06F21/87 ,  H01L21/4803 ,  H01L23/053 ,  H01L23/08 ,  H01L23/573 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/32225 ,  H01L2224/8385 ,  H01L2924/0665 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/16251 ,  H01L2924/16588 ,  H05K1/0275 ,  H05K1/0284 ,  H05K1/0306 ,  H05K1/181 ,  H05K3/303 ,  H05K3/46 ,  H05K2201/09036 ,  H05K2201/0999 ,  H05K2201/10159 ,  H05K2201/10371

Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass. Further, the electronic package may include an enclosure, and the glass substrate may be located within the secure volume separate from the enclosure, or alternatively, the enclosure may be a stressed glass enclosure, an inner surface of which is the glass substrate for the electronic component(s).

公开(公告)号：US09936613B2

公开(公告)日：2018-04-03

申请号：US15396647

申请日：2016-12-31

Applicant: Intel Corporation

Inventor： Matthew J. Adiletta ,  Aaron Gorius ,  Michael T. Crocker ,  Myles Wilde

IPC: H05K7/14 ,  H05K7/20 ,  G02B6/38 ,  G02B6/44

CPC classification number: H04Q11/0005 ,  B25J15/0014 ,  B65G1/0492 ,  G02B6/3882 ,  G02B6/3893 ,  G02B6/3897 ,  G02B6/4292 ,  G02B6/4452 ,  G05D23/1921 ,  G05D23/2039 ,  G06F1/183 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/0631 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0664 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0673 ,  G06F3/0679 ,  G06F3/0683 ,  G06F3/0688 ,  G06F3/0689 ,  G06F8/65 ,  G06F9/4401 ,  G06F9/5016 ,  G06F9/5044 ,  G06F9/505 ,  G06F9/5072 ,  G06F9/5077 ,  G06F11/141 ,  G06F11/3414 ,  G06F12/0862 ,  G06F12/0893 ,  G06F12/10 ,  G06F12/109 ,  G06F12/1408 ,  G06F13/161 ,  G06F13/1668 ,  G06F13/1694 ,  G06F13/4022 ,  G06F13/4068 ,  G06F13/409 ,  G06F13/42 ,  G06F13/4282 ,  G06F15/8061 ,  G06F17/30949 ,  G06F2209/5019 ,  G06F2209/5022 ,  G06F2212/1008 ,  G06F2212/1024 ,  G06F2212/1041 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/202 ,  G06F2212/401 ,  G06F2212/402 ,  G06F2212/7207 ,  G06Q10/06 ,  G06Q10/06314 ,  G06Q10/087 ,  G06Q10/20 ,  G06Q50/04 ,  G07C5/008 ,  G08C17/02 ,  G08C2200/00 ,  G11C5/02 ,  G11C5/06 ,  G11C7/1072 ,  G11C11/56 ,  G11C14/0009 ,  H03M7/30 ,  H03M7/3084 ,  H03M7/3086 ,  H03M7/40 ,  H03M7/4031 ,  H03M7/4056 ,  H03M7/4081 ,  H03M7/6005 ,  H03M7/6023 ,  H04B10/25 ,  H04B10/2504 ,  H04L9/0643 ,  H04L9/14 ,  H04L9/3247 ,  H04L9/3263 ,  H04L12/2809 ,  H04L29/12009 ,  H04L41/024 ,  H04L41/046 ,  H04L41/0813 ,  H04L41/082 ,  H04L41/0896 ,  H04L41/12 ,  H04L41/145 ,  H04L41/147 ,  H04L41/5019 ,  H04L43/065 ,  H04L43/08 ,  H04L43/0817 ,  H04L43/0876 ,  H04L43/0894 ,  H04L43/16 ,  H04L45/02 ,  H04L45/52 ,  H04L47/24 ,  H04L47/765 ,  H04L47/782 ,  H04L47/805 ,  H04L47/82 ,  H04L47/823 ,  H04L49/15 ,  H04L49/25 ,  H04L49/357 ,  H04L49/45 ,  H04L49/555 ,  H04L67/02 ,  H04L67/10 ,  H04L67/1004 ,  H04L67/1008 ,  H04L67/1012 ,  H04L67/1014 ,  H04L67/1029 ,  H04L67/1034 ,  H04L67/1097 ,  H04L67/12 ,  H04L67/16 ,  H04L67/306 ,  H04L67/34 ,  H04L69/04 ,  H04L69/329 ,  H04Q1/04 ,  H04Q11/00 ,  H04Q11/0003 ,  H04Q11/0062 ,  H04Q11/0071 ,  H04Q2011/0037 ,  H04Q2011/0041 ,  H04Q2011/0052 ,  H04Q2011/0073 ,  H04Q2011/0079 ,  H04Q2011/0086 ,  H04Q2213/13523 ,  H04Q2213/13527 ,  H04W4/023 ,  H04W4/80 ,  H05K1/0203 ,  H05K1/181 ,  H05K5/0204 ,  H05K7/1418 ,  H05K7/1421 ,  H05K7/1422 ,  H05K7/1447 ,  H05K7/1461 ,  H05K7/1485 ,  H05K7/1487 ,  H05K7/1489 ,  H05K7/1491 ,  H05K7/1492 ,  H05K7/1498 ,  H05K7/2039 ,  H05K7/20709 ,  H05K7/20727 ,  H05K7/20736 ,  H05K7/20745 ,  H05K7/20836 ,  H05K13/0486 ,  H05K2201/066 ,  H05K2201/10121 ,  H05K2201/10159 ,  H05K2201/10189 ,  Y10S901/01

Abstract: A rack for supporting a sleds includes a pair of elongated support posts and pairs of elongated support arms that extend from the elongated support posts. Each pair of the elongated support arms defines a sled slot to receive a corresponding sled. To do so, each elongated support arm includes a circuit board guide to receive a chassis-less circuit board substrate of the corresponding sled. The rack may include a cross-member arm associated with each sled slot and an optical connector mounted to each cross-member arm. Additional elongated support posts may be used to provide additional sled slots.

公开(公告)号：US20180088628A1

公开(公告)日：2018-03-29

申请号：US15278236

申请日：2016-09-28

Applicant: Intel Corporation

Inventor： Min-Tih Lai

IPC: G06F1/16 ,  H05K1/18 ,  H05K1/11 ,  H05K3/40 ,  H05K3/30

CPC classification number: G06F1/1613 ,  H05K1/111 ,  H05K1/117 ,  H05K1/181 ,  H05K3/284 ,  H05K3/301 ,  H05K3/4007 ,  H05K3/4015 ,  H05K2201/10159 ,  H05K2203/025 ,  H05K2203/1316

Abstract: Aspects of the disclosure are directed to a printed circuit board and methods of making a printed circuit board. A printed circuit board strip can include a plurality of finger pads to receive metal contact fingers. The printed circuit board strip can also include a plurality of surface mount technology (SMT) solder pads on each of the printed circuit boards. One or more integrated circuit packages can be placed using SMT or pick-and-place techniques or similar techniques onto at least some of the SMT solder pads. The printed circuit board strip can also include a leadframe comprising metal contact fingers on the plurality of finger pads. The one or more integrated circuit packages and the leadframe comprising the metal contact fingers can be mechanically and electrically connected to printed circuit board strip through a solder process, such as that used in SMT or pick-and-place package assembly.

公开(公告)号：US20180049331A1

公开(公告)日：2018-02-15

申请号：US15233410

申请日：2016-08-10

Applicant: Seagate Technology LLC

Inventor： William Gunther Voss ,  Donald R. Bloyer ,  Nathan Loren Lester

IPC: H05K5/00 ,  H05K5/02 ,  H05K3/36 ,  H05K5/03 ,  H05K1/02 ,  H05K1/14

CPC classification number: H05K5/0069 ,  G11C5/06 ,  H05K1/0201 ,  H05K1/142 ,  H05K1/144 ,  H05K1/147 ,  H05K3/361 ,  H05K3/368 ,  H05K5/0217 ,  H05K5/03 ,  H05K2201/042 ,  H05K2201/10159 ,  H05K2201/10409

Abstract: A memory cartridge for use during assembly of a storage drive apparatus. The memory cartridge includes a first memory printed circuit board (PCB). The memory cartridge also includes a second memory PCB, where the second memory PCB is operatively coupled to the first memory PCB by a first flexible connection. The memory cartridge also includes a chassis configured to fasten to the first memory PCB and to the second memory PCB such that the first and second memory PCBs have a spaced relationship to each other, and where the spaced relationship defines a gap.

公开(公告)号：US09893016B2

公开(公告)日：2018-02-13

申请号：US14880299

申请日：2015-10-12

Applicant: IBIDEN CO., LTD.

Inventor： Hajime Sakamoto ,  Yoshinori Shizuno ,  Shigeru Yamada ,  Takashi Kariya

IPC: H01L23/538 ,  H05K3/00 ,  H05K3/46 ,  H01L21/48 ,  H05K3/02

CPC classification number: H01L23/5383 ,  H01L21/486 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2924/15192 ,  H01L2924/15313 ,  H05K3/007 ,  H05K3/025 ,  H05K3/4644 ,  H05K3/4658 ,  H05K3/4694 ,  H05K2201/10159 ,  H05K2201/10378 ,  H05K2201/1053

Abstract: A multilayer wiring board includes a main wiring board including insulation layers, first via conductors formed in the insulation layers, and a first conductive layer including first mounting pads such that the first mounting pads are positioned to mount a first electronic component and a second electronic component adjacent to each other on the main wiring board, and a wiring structure body mounted on the main wiring board such that the wiring structure body is positioned in an outermost insulation layer of the insulation layers, the wiring structure body including a second conductive layer which includes second mounting pads such that the second mounting pads are positioned to connect to the first electronic component and the second electronic component mounted on the main wiring board. The first via conductors are formed such that the first via conductors have diameters which increase in a same direction.