公开(公告)号：US5378314A

公开(公告)日：1995-01-03

申请号：US77298

申请日：1993-06-15

Applicant: Walter Schmidt ,  Marco Martinelli

Inventor： Walter Schmidt ,  Marco Martinelli

IPC: C23F1/00 ,  H05K1/00 ,  H05K1/05 ,  H05K1/11 ,  H05K3/00 ,  H05K3/38 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  B44C1/22 ,  B29C37/00

CPC classification number: H05K3/42 ,  H05K1/115 ,  H05K3/0041 ,  H05K3/4084 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0393 ,  H05K1/05 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/066 ,  H05K2201/0909 ,  H05K2201/09327 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2201/09627 ,  H05K2201/09781 ,  H05K2201/09836 ,  H05K2201/09945 ,  H05K2201/10666 ,  H05K2203/0554 ,  H05K2203/0746 ,  H05K2203/1184 ,  H05K2203/1545 ,  H05K2203/1572 ,  H05K3/0061 ,  H05K3/0064 ,  H05K3/0097 ,  H05K3/386 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4652

Abstract: A method for producing aligned passages through substrate materials, in which the projection of the inlet and outlet openings does not coincide, uses displaced application of etching windows on opposite sides and corresponding pronounced under-etching of these windows. By applying displaced etching windows on both sides of the substrate and through-etching the substrate through these windows, `oblique` passages are obtained through the substrate. By a suitable location of the windows it is also possible to produce branched passages with more than one outlet opening.

Abstract translation: 用于产生通过基底材料的对准的通道的方法，其中入口和出口的突出部不重合，使用在相对侧上移动施加蚀刻窗口并且对应于这些窗口的相当明显的下蚀刻。 通过在基板的两面上施加位移蚀刻窗口，并通过这些窗口对基板进行蚀刻，通过基板获得“倾斜”通道。 通过窗口的合适位置，也可以产生具有多于一个出口开口的分支通道。

公开(公告)号：US11895776B2

公开(公告)日：2024-02-06

申请号：US17278782

申请日：2019-09-20

Applicant: Proterial, Ltd.

Inventor： Takahiro Umeyama

IPC: H05K1/18 ,  G01L9/00 ,  G01L9/04 ,  G01L19/14 ,  G05D7/06 ,  H05K1/11 ,  H05K3/32

CPC classification number: H05K1/189 ,  G01L9/0041 ,  G01L9/04 ,  G01L19/141 ,  G05D7/06 ,  H05K1/115 ,  H05K1/181 ,  H05K3/323 ,  H05K2201/09372 ,  H05K2201/09836 ,  H05K2201/10151

Abstract: In a flexible printed wiring board (1), a first electrical conduction pattern (4) prepared on the first surface (3a) on which a bare chip (2) is mounted is prepared only inside a mounting region (3c) of the bare chip. Preferably, the first electrical conduction patterns (4) are prepared so as to avoid positions opposite to test electrodes (2b) which the bare chip comprises. Thereby, in the flexible printed wiring board used for mounting the bare chip, occurrence of malfunction resulting from electrical connection with a part other than a bump of the bare chip can be certainly prevented, and reliability of various devices using the bare chip can be improved.

公开(公告)号：US20190186007A1

公开(公告)日：2019-06-20

申请号：US15843313

申请日：2017-12-15

Applicant: Texas Instruments Incorporated

Inventor： Simon Joshua Jacobs ,  Juan Alejandro Herbsommer ,  Adam Joseph Fruehling

IPC: C23C16/455 ,  B29C65/14 ,  C23C16/56 ,  C23C16/40 ,  B29C65/00 ,  G04F5/14 ,  H03L7/26

CPC classification number: C23C16/45525 ,  B29C65/14 ,  B29C66/034 ,  B29C66/112 ,  B29L2031/34 ,  C23C16/403 ,  C23C16/56 ,  G04F5/14 ,  H03L7/26 ,  H05K2201/09836

Abstract: Described examples include a method of fabricating a gas cell, including forming a cavity in a first substrate, providing a nonvolatile precursor material in the cavity of the first substrate, bonding a second substrate to the first substrate to form a sealed cavity including the nonvolatile precursor material in the cavity, and activating the precursor material after or during forming the sealed cavity to release a target gas inside the sealed cavity.

公开(公告)号：US20180310403A1

公开(公告)日：2018-10-25

申请号：US15493680

申请日：2017-04-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Chad M. Albertson ,  Eric J. Campbell ,  Nicholas J. Ollerich ,  Christopher W. Steffen

IPC: H05K1/09 ,  H05K1/18 ,  H05K3/10 ,  H05K3/14 ,  H05K3/12 ,  H05K3/18 ,  H05K3/34

CPC classification number: H05K1/112 ,  H05K1/115 ,  H05K3/0014 ,  H05K3/146 ,  H05K3/3405 ,  H05K3/3436 ,  H05K2201/09636 ,  H05K2201/09836 ,  H05K2201/09945 ,  Y10T29/49155

Abstract: A method of forming an multi-chip carrier that includes providing a trace structure using an additive forming method. The method includes forming a metal layer on a trace structure to provide electrically conductive lines. A dielectric material may then be formed on the electrically conductive lines to encapsulate a majority of the electrically conductive lines. The ends of the electrically conductive lines that are exposed through the upper surface of the dielectric material provide a top processor mount location and the ends of the electrically conductive lines that are exposed through the sidewalls of the dielectric material provide a sidewall processor mount location.

公开(公告)号：US20180277471A1

公开(公告)日：2018-09-27

申请号：US15994006

申请日：2018-05-31

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H01L23/498 ,  H05K1/11 ,  H05K3/42 ,  H01L21/48 ,  H01L21/768 ,  H01L23/14 ,  H01L23/00 ,  H01L23/48 ,  H05K3/44

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01024 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

公开(公告)号：US20160329273A1

公开(公告)日：2016-11-10

申请号：US15214532

申请日：2016-07-20

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

公开(公告)号：US09451711B2

公开(公告)日：2016-09-20

申请号：US14169314

申请日：2014-01-31

Applicant: IBIDEN CO., LTD.

Inventor： Toshiaki Hibino

IPC: H05K1/03 ,  H05K3/42 ,  H05K3/00 ,  H05K3/46 ,  H05K3/10

CPC classification number: H05K3/429 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/0032 ,  H05K3/0055 ,  H05K3/108 ,  H05K3/4602 ,  H05K2201/0209 ,  H05K2201/09536 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/09863 ,  H05K2201/2072 ,  H05K2203/108 ,  H05K2203/1476

Abstract: A printed wiring board includes an insulating substrate having a penetrating hole formed through the substrate, a first conductive pattern formed on first surface of the substrate, a second conductive pattern formed on second surface of the substrate on the opposite side of the first surface, and a through-hole conductor formed in the penetrating hole in the substrate such that the conductor is connecting the first conductive pattern on the first surface of the substrate and the second conductive pattern on the second surface of the substrate. The penetrating hole has a first opening portion opening on the first surface of the substrate, a second opening portion opening on the second surface of the substrate and a third opening portion connecting the first and second opening portions, and the third opening portion has the maximum diameter which is greater than the minimum diameters of the first and second opening portions.

Abstract translation: 印刷布线板包括：绝缘基板，具有穿过该基板形成的贯通孔，形成在基板的第一面上的第一导体图案，形成在基板的与第一面相反一侧的第二面上的第二导电图案;以及 形成在所述基板的所述贯通孔中的通孔导体，使得所述导体将所述基板的第一表面上的所述第一导电图案与所述基板的所述第二表面上的所述第二导电图案连接。 所述贯通孔具有在所述基板的第一面上开口的第一开口部，在所述基板的第二面上开口的第二开口部，以及连接所述第一开口部和所述第二开口部的第三开口部， 其直径大于第一和第二开口部分的最小直径。

公开(公告)号：US09205698B2

公开(公告)日：2015-12-08

申请号：US14481572

申请日：2014-09-09

Applicant: ASAHI GLASS COMPANY, LIMITED

Inventor： Kohei Horiuchi

IPC: B44C1/22

CPC classification number: B44C1/228 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/50 ,  B23K2103/54 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/0029 ,  H05K2201/09836 ,  H05K2201/10204 ,  H05K2203/163 ,  H01L2924/00

Abstract: A method including a) forming a through-hole in a dummy substrate including a surface by radiating a laser to the surface of the dummy substrate in a state where the dummy substrate is moved relative to the laser along a direction parallel to the surface of the dummy substrate, b) determining an angle α (−90°

Abstract translation: 一种方法，包括：在虚拟衬底相对于激光器沿着平行于所述虚拟衬底的表面的方向相对于激光器移动的状态下，通过在所述虚设衬底的表面辐射激光而在包括表面的虚设衬底中形成通孔 虚拟基板，b）确定通孔相对于垂直于虚设基板的表面的线的角度α（-90°<α<+ 90°），以及c）在绝缘基板中形成通孔 与步骤a）相同的条件，除了以角度＆bgr辐射激光; 相对于垂直于绝缘基板的表面的线。 角度＆bgr 被设定为相对于垂直于绝缘基板的表面的线的角度α线对称，并且满足＆bgr =α的关系。

公开(公告)号：US20150216055A1

公开(公告)日：2015-07-30

申请号：US14683185

申请日：2015-04-10

Applicant: IBIDEN CO., LTD.

Inventor： Tomoyuki IKEDA

IPC: H05K3/00 ,  H05K3/42 ,  C25D5/02

CPC classification number: H05K3/0026 ,  C25D5/02 ,  H05K1/119 ,  H05K3/0032 ,  H05K3/0094 ,  H05K3/422 ,  H05K3/423 ,  H05K3/427 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2203/1572 ,  Y10T29/49124 ,  Y10T29/49126

Abstract: A method for manufacturing a printed wiring board including providing a starting material including an insulating resin substrate having first and second surfaces, irradiating laser upon the first surface of the insulating resin substrate such that a first opening portion having an opening on the first surface is formed, irradiating laser upon the second surface of the insulating resin substrate such that a second opening portion having an opening on the second surface and communicated to the first opening portion is formed and that a penetrating-hole having the first and second opening portions is formed, forming a first conductor on the first surface of the insulating resin substrate, forming a second conductor on the second surface of the insulating resin substrate, and forming a through hole conductor structure in the penetrating-hole to electrically connecting the first conductor and the second conductor.

Abstract translation: 一种制造印刷线路板的方法，包括提供包括具有第一和第二表面的绝缘树脂基板的起始材料，激光照射在绝缘树脂基板的第一表面上，使得形成在第一表面上具有开口的第一开口部分 在绝缘性树脂基板的第二面上照射激光，形成在第二面上具有与第一开口部连通的第二开口部，形成具有第一开口部和第二开口部的贯通孔， 在所述绝缘树脂基板的第一表面上形成第一导体，在所述绝缘树脂基板的第二表面上形成第二导体，并且在所述贯穿孔中形成通孔导体结构，以将所述第一导体和所述第二导体 。

公开(公告)号：US08890000B2

公开(公告)日：2014-11-18

申请号：US13422884

申请日：2012-03-16

Applicant: Tomoyuki Ikeda

Inventor： Tomoyuki Ikeda

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K3/0026 ,  C25D5/02 ,  H05K1/119 ,  H05K3/0032 ,  H05K3/0094 ,  H05K3/422 ,  H05K3/423 ,  H05K3/427 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2203/1572 ,  Y10T29/49124 ,  Y10T29/49126

Abstract: A printed wiring board has an insulating resin substrate having a first surface and a second surface, the insulating resin substrate having one or more penetrating-holes passing through the insulating resin substrate from the first surface to the second surface, a first conductor formed on the first surface of the insulating resin substrate, a second conductor formed on the second surface of the insulating resin substrate, and a through-hole conductor structure formed in the penetrating-hole of the insulating resin substrate and electrically connecting the first conductor and the second conductor. The penetrating-hole has a first portion having an opening on the first surface and a second portion having an opening on the second surface. The first portion and the second portion are connected such that the first portion and the second portion are set off from each other.

Abstract translation: 印刷电路板具有具有第一表面和第二表面的绝缘树脂基板，所述绝缘树脂基板具有从所述第一表面到所述第二表面穿过所述绝缘树脂基板的一个或多个贯穿孔，形成在所述绝缘树脂基板上的第一导体 绝缘树脂基板的第一表面，形成在绝缘树脂基板的第二表面上的第二导体和形成在绝缘树脂基板的穿透孔中的通孔导体结构，并将第一导体和第二导体 。 所述贯穿孔具有在所述第一表面上具有开口的第一部分和在所述第二表面上具有开口的第二部分。 第一部分和第二部分被连接成使得第一部分和第二部分彼此脱离。