公开(公告)号：US20140083749A1

公开(公告)日：2014-03-27

申请号：US14018644

申请日：2013-09-05

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Daisuke TAKIZAWA

IPC: H05K1/02

CPC classification number: H05K1/0271 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/1531 ,  H05K1/185 ,  H05K3/0026 ,  H05K3/005 ,  H05K3/303 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/09072 ,  H05K2201/09854 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A wiring substrate is provided with a substrate core including a first main surface, a second main surface, and a through hole. An electronic component is arranged in the through hole. A projection projects from a wall of the through hole toward a connection terminal of the electronic component. An insulator is filled between the wall of the through hole and the electronic component. A first insulation layer covers the electronic component and the first main surface. A second insulation layer covers the electronic component and the second main surface. The electronic component includes an electronic component body and the connection terminal formed on a side of the electronic component body. The connection terminal of the electronic component includes an engagement groove formed by the projection and extending along a direction in which the electronic component is fitted into the through hole.

Abstract translation: 布线基板设置有包括第一主表面，第二主表面和通孔的基底芯。 电子部件布置在通孔中。 突起从通孔的壁朝向电子部件的连接端子突出。 绝缘体填充在通孔的壁和电子部件之间。 第一绝缘层覆盖电子元件和第一主表面。 第二绝缘层覆盖电子部件和第二主表面。 电子部件包括形成在电子部件主体侧的电子部件主体和连接端子。 电子部件的连接端子包括由突起形成的接合槽，并且沿着电子部件嵌入通孔的方向延伸。

公开(公告)号：US20140008107A1

公开(公告)日：2014-01-09

申请号：US14024115

申请日：2013-09-11

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yang Je Lee ,  Dek Gin Yang ,  Dong Gi An ,  Jae Ho Shin

IPC: H05K1/02 ,  H05K3/46

CPC classification number: H05K3/06 ,  H05K1/0218 ,  H05K1/0278 ,  H05K1/028 ,  H05K1/09 ,  H05K3/0035 ,  H05K3/281 ,  H05K3/386 ,  H05K3/4644 ,  H05K3/4652 ,  H05K3/4691 ,  H05K2201/0154 ,  H05K2201/0187 ,  H05K2201/0707 ,  H05K2203/0554 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49165

Abstract: A multilayer rigid flexible printed circuit board including a flexible region including a flexible film having a circuit pattern formed on one or both surfaces thereof and a laser blocking layer formed on the circuit pattern and a rigid region formed adjacent to the flexible region and including a plurality of pattern layers on one or both surfaces of extended portions extended to both sides of the flexible film of the flexible region, and a method for manufacturing the same.

Abstract translation: 一种多层刚性柔性印刷电路板，包括柔性区域，该柔性区域包括在其一个或两个表面上形成有电路图案的柔性膜，以及形成在电路图案上的激光阻挡层和邻近柔性区域形成的包含多个 在延伸部分延伸到柔性区域的柔性膜的两侧的一个或两个表面上的图案层及其制造方法。

公开(公告)号：US08613136B2

公开(公告)日：2013-12-24

申请号：US12614576

申请日：2009-11-09

Applicant: Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

Inventor： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

IPC: H01K3/10

CPC classification number: H05K1/185 ,  H01L24/19 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K1/0231 ,  H05K1/188 ,  H05K3/382 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10636 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A printed wiring board is manufactured by a method in which a laminate body having a first insulation layer and a conductive film is provided. An alignment mark is formed in the laminate body by removing at least a portion of the conductive film. An electronic component is placed on an adhesive layer provided on the first insulation layer at a position determined based on the alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

Abstract translation: 通过提供具有第一绝缘层和导电膜的层叠体的方法制造印刷线路板。 通过去除导电膜的至少一部分，在层压体中形成对准标记。 将电子部件放置在基于对准标记确定的位置上设置在第一绝缘层上的粘合剂层上。 在将电子部件封装在第二绝缘层的开口内之后，在基于用于确定电子部件的位置的对准标记确定的位置处形成暴露电子部件的端子的通孔。 通孔导体形成在通孔中，导电层形成在导电膜上并被图案化以形成连接到通孔导体的导电电路。

公开(公告)号：US08563420B2

公开(公告)日：2013-10-22

申请号：US13561247

申请日：2012-07-30

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H01L21/4763

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A method for manufacturing a printed wiring board includes forming an uncalcined layer containing a raw ceramic material on a first metal layer, firing the uncalcined layer formed on the first metal layer such that a high dielectric constant layer having a ceramic body calcined in a sheet form is formed on the first metal layer, forming a second metal layer on the high dielectric constant layer on the opposite side of the high dielectric constant layer with respect to the first metal layer such that a layered capacitor having the high dielectric constant layer and first and second layer electrodes sandwiching the high dielectric constant layer is formed, and disposing the layered capacitor in a main body.

Abstract translation: 一种制造印刷电路板的方法包括在第一金属层上形成含有原料陶瓷材料的未煅烧层，焙烧形成在第一金属层上的未煅烧层，使得具有以片状形式煅烧的陶瓷体的高介电常数层 形成在第一金属层上，相对于第一金属层在高介电常数层的相对侧的高介电常数层上形成第二金属层，使得具有高介电常数层的层状电容器和第一金属层 形成夹着高介电常数层的第二层电极，并将层叠电容器配置在主体中。

公开(公告)号：US20130265733A1

公开(公告)日：2013-10-10

申请号：US13439621

申请日：2012-04-04

Applicant: Juan A. Herbsommer ,  Robert F. Payne ,  Marco Corsi ,  Baher S. Haroun ,  Hassan Ali

Inventor： Juan A. Herbsommer ,  Robert F. Payne ,  Marco Corsi ,  Baher S. Haroun ,  Hassan Ali

IPC: H05K1/11 ,  H05K1/18

CPC classification number: G02B6/12004 ,  G02B6/1228 ,  G02B6/43 ,  H01L2223/6627 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01P3/16 ,  H01P5/107 ,  H05K1/0239 ,  H05K1/0243 ,  H05K1/025 ,  H05K1/0274 ,  H05K2201/0187 ,  H05K2201/037 ,  H05K2201/09618 ,  H05K2201/10098

Abstract: An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.

Abstract translation: 提供了一种装置。 存在具有封装基板和集成电路（IC）的电路组件。 封装衬底具有微带线，并且IC被固定到封装衬底并且电耦合到微带线。 电路板也固定到封装衬底。 介质波导固定在电路板上。 电介质波导具有延伸到位于电介质波导和微带线之间的过渡区域的介质芯，并且微带线被配置为与介质波导形成通信链路。

公开(公告)号：US08541691B2

公开(公告)日：2013-09-24

申请号：US12952759

申请日：2010-11-23

Applicant: Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

Inventor： Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

IPC: H05K1/16

CPC classification number: H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/112 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/10674 ,  H01L2224/05599

Abstract: A circuit wiring board including a wiring substrate, multiple electronic components provided on a surface of the wiring substrate, and a heat resistant substrate accommodated in the wiring substrate and having a core substrate and a built-up wiring layer formed over the core substrate. The built-up wiring layer includes a conductive layer and an interlayer resin insulating layer, and the electronic components are electrically connected to the conductive layer of the built-up wiring layer.

Abstract translation: 一种电路布线板，包括布线基板，设置在所述布线基板的表面上的多个电子部件和容纳在所述布线基板中的耐热基板，并且具有形成在所述芯基板上的芯基板和积层布线层。 叠层布线层包括导电层和层间树脂绝缘层，并且电子部件电连接到组合布线层的导电层。

公开(公告)号：US20130227838A1

公开(公告)日：2013-09-05

申请号：US13859421

申请日：2013-04-09

Applicant: David Shykind ,  James McCall

Inventor： David Shykind ,  James McCall

IPC: H05K3/10

CPC classification number: H05K3/10 ,  H05K1/0216 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/0366 ,  H05K3/0052 ,  H05K2201/0187 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/09972 ,  H05K2203/1554 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49798 ,  Y10T428/24058 ,  Y10T428/24917 ,  Y10T428/249935 ,  Y10T428/24994 ,  Y10T428/249943 ,  Y10T428/249946 ,  Y10T442/2926 ,  Y10T442/2992 ,  Y10T442/3065

Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.

Abstract translation: 这里描述了制造电路板的方法。 该方法可以包括添加树脂，形成第一和第二玻璃纤维纤维，以及形成能够传输电信号的第一和第二信号线迹线。 在一些实例中，第一信号线迹线附近的玻璃纤维和树脂材料之间的比率类似于第二信号线迹线附近的玻璃纤维和树脂材料之间的比率。 在一些示例中，第一和第二玻璃纤维光纤在第一和第二信号线迹线附近对角地交叉。 在一些示例中，第一和第二玻璃纤维纤维以锯齿形图案在第一和第二信号线迹线附近交叉。

公开(公告)号：US20130199834A1

公开(公告)日：2013-08-08

申请号：US13807325

申请日：2011-06-28

Applicant: Jan De Geest ,  Stefaan Hendrik Jozef Sercu

Inventor： Jan De Geest ,  Stefaan Hendrik Jozef Sercu

IPC: H05K1/11

CPC classification number: H05K1/0251 ,  H05K1/024 ,  H05K1/0245 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/0187 ,  H05K2201/09063 ,  H05K2201/09618 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/10189

Abstract: A circuit board (1) is provided comprising a plurality of insulating layers, at least one ground layer and at least one layer comprising signal traces. The circuit board comprises at least a first conductive via (17) and a second conductive via (17). The first conductive via and the second conductive via penetrate through at least a first insulating layer of the plurality of insulating layers and are connected to a signal trace. The first conductive via and the second conductive via are arranged adjacent each other. At least in the first insulating layer the first conductive via and the second conductive via are separated in a first direction of separation (R) by a first adjustment portion comprising a dielectric material property different from the first insulating layer.

Abstract translation: 提供电路板（1），其包括多个绝缘层，至少一个接地层和至少一个包含信号迹线的层。 电路板包括至少第一导电通孔（17）和第二导电通孔（17）。 第一导电通孔和第二导电通孔穿透多个绝缘层中的至少第一绝缘层，并连接到信号迹线。 第一导电通孔和第二导电通孔彼此相邻布置。 至少在第一绝缘层中，通过包括不同于第一绝缘层的介电材料性质的第一调节部分，第一导电通孔和第二导电通孔在第一分离方向（R）分离。

公开(公告)号：US08441809B2

公开(公告)日：2013-05-14

申请号：US13161538

申请日：2011-06-16

Applicant: Ravi Mahajan ,  Sandeep Sane

Inventor： Ravi Mahajan ,  Sandeep Sane

IPC: H05K7/02 ,  H01L21/78 ,  H01L21/50

CPC classification number: H05K1/142 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1607 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15192 ,  H05K1/141 ,  H05K1/181 ,  H05K1/183 ,  H05K2201/0187 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05647

Abstract: A microelectronic package comprises a substrate (110), a silicon patch (120) embedded in the substrate, a first interconnect structure (131) at a first location of the silicon patch and a second interconnect structure (132) at a second location of the silicon patch, and an electrically conductive line (150) in the silicon patch connecting the first interconnect structure and the second interconnect structure to each other.

Abstract translation: 微电子封装包括衬底（110），嵌入衬底中的硅贴片（120），在硅贴片的第一位置处的第一互连结构（131）和在第二位置处的第二互连结构（132） 硅贴片以及将第一互连结构和第二互连结构彼此连接的硅贴片中的导电线（150）。

公开(公告)号：US08431829B2

公开(公告)日：2013-04-30

申请号：US12453632

申请日：2009-05-18

Applicant: Michimasa Takahashi

Inventor： Michimasa Takahashi

IPC: H05K1/03 ,  H05K1/11

CPC classification number: H05K1/0298 ,  H01L24/24 ,  H01L2224/24227 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12042 ,  H05K1/141 ,  H05K1/142 ,  H05K1/185 ,  H05K3/4602 ,  H05K3/4694 ,  H05K2201/0187 ,  H05K2201/09536 ,  H05K2201/10484 ,  Y10T29/49126 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A printed wiring board including a rigid multilayer board, a first substrate having multiple conductors, and a second substrate having multiple conductors electrically connected to the conductors of the first substrate. The conductors of the second substrate have an existing density which is set higher than an existing density of the conductors of the first substrate, and the first substrate and/or the second substrate is embedded in the rigid multilayer board.