公开(公告)号：US20090212443A1

公开(公告)日：2009-08-27

申请号：US12038502

申请日：2008-02-27

Applicant: Chonghua Zhong

Inventor： Chonghua Zhong

IPC: H01L23/488 ,  H01L21/60 ,  H05K1/00

CPC classification number: H01L23/5382 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0293 ,  H05K3/321 ,  H05K3/3452 ,  H05K2201/0305 ,  H05K2201/09381 ,  H05K2201/09809 ,  H05K2201/0989 ,  H05K2201/10674 ,  H05K2203/173 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Methods, systems, and apparatuses for integrated circuit package substrates, integrated circuit packages, and processes for assembling the same, are provided. A substrate for a flip chip integrated circuit package includes a substrate body having opposing first and second surfaces. A solder mask layer covers at least a portion of the first surface of the substrate body. First and second electrically conductive features are formed on the substrate body. The first electrically conductive feature is a portion of a first electrical signal net, and the second electrically conductive feature is a portion of a second electrical signal net. The first and second electrically conductive features are configured to be selectively electrically coupled together by application of an electrically conductive material. The electrically conductive material may be a conductive epoxy, a jumper, a solder paste, a solder ball, or a solder bump that couples a flip chip die to the substrate.

Abstract translation: 提供了用于集成电路封装基板，集成电路封装以及用于组装其的工艺的方法，系统和装置。 用于倒装芯片集成电路封装的衬底包括具有相对的第一和第二表面的衬底本体。 焊接掩模层覆盖基板主体的第一表面的至少一部分。 第一和第二导电特征形成在衬底主体上。 第一导电特征是第一电信号网的一部分，第二导电特征是第二电信号网的一部分。 第一和第二导电特征被配置为通过施加导电材料选择性地电耦合在一起。 导电材料可以是导电环氧树脂，跳线，焊膏，焊球或将倒装芯片裸片耦合到衬底的焊料凸块。

公开(公告)号：US07578681B2

公开(公告)日：2009-08-25

申请号：US12222321

申请日：2008-08-07

Applicant: Takayoshi Honda ,  Minoru Hozuka

Inventor： Takayoshi Honda ,  Minoru Hozuka

IPC: H01R12/00 ,  H05K1/00

CPC classification number: H05K3/3447 ,  H01R12/57 ,  H01R12/58 ,  H01R12/724 ,  H01R43/0256 ,  H05K1/116 ,  H05K2201/09381 ,  H05K2201/10189 ,  H05K2201/10787 ,  H05K2201/1084 ,  H05K2201/10848 ,  H05K2201/10856 ,  H05K2201/10871 ,  H05K2203/1178

Abstract: An electronic device includes a printed circuit board and an electronic element having a terminal. The terminal has a surface section and an insertion section. The printed circuit board includes a through hole extending from a first surface to a second surface of the printed circuit board, a surface land disposed on the first surface, and an insertion land integrally disposed on a sidewall of the through hole and on a periphery around the through hole. The surface section is coupled with the surface land through a solder. The insertion section is disposed in the through hole and is coupled with the insertion land through the solder. The surface section has a recess part and a portion of recess part is disposed so as to be axially aligned with a portion of the through hole.

公开(公告)号：US07563112B2

公开(公告)日：2009-07-21

申请号：US11979972

申请日：2007-11-13

Applicant: Takayoshi Honda

Inventor： Takayoshi Honda

IPC: H01R12/00

CPC classification number: H05K1/116 ,  H01R12/707 ,  H01R43/0256 ,  H05K1/023 ,  H05K3/3405 ,  H05K3/3447 ,  H05K3/3484 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2201/0979 ,  H05K2201/10189 ,  H05K2201/10446 ,  H05K2201/10757 ,  H05K2201/10787 ,  H05K2201/10803 ,  H05K2201/10871 ,  H05K2201/10901 ,  H05K2203/1178 ,  H05K2203/1394

Abstract: An electronic device includes a printed circuit board having lands and an electronic element having a body and terminals. First and second lands provide a zigzag pattern. Each first land is coupled with the first terminal, and each second land is coupled with the second terminal. The second terminal includes a first parallel member, a first connection member, a second parallel member and a first mounting member. The first parallel member is completely embedded in the body, or another part of the first parallel member exposed from the body is shorter than the second parallel member. A second height between the second parallel member and the printed circuit board is smaller than a first height between the first parallel member and the printed circuit board.

Abstract translation: 电子设备包括具有平台的印刷电路板和具有主体和端子的电子元件。 第一和第二土地提供锯齿形图案。 每个第一焊盘与第一端子耦合，并且每个第二焊盘与第二端子耦合。 第二端子包括第一平行构件，第一连接构件，第二平行构件和第一安装构件。 第一平行构件完全嵌入主体中，或者从主体露出的第一平行构件的另一部分比第二平行构件短。 第二平行构件和印刷电路板之间的第二高度小于第一平行构件和印刷电路板之间的第一高度。

公开(公告)号：US20090145644A1

公开(公告)日：2009-06-11

申请号：US12219530

申请日：2008-07-23

Applicant: Tsuyoshi Miura

Inventor： Tsuyoshi Miura

IPC: H05K1/16 ,  B23K1/08

CPC classification number: H05K1/111 ,  H05K3/3421 ,  H05K3/3468 ,  H05K2201/09381 ,  H05K2201/09681 ,  H05K2201/09781 ,  H05K2201/099 ,  H05K2201/10166 ,  H05K2201/10689 ,  H05K2203/046 ,  Y02P70/611 ,  Y02P70/613

Abstract: To provide a printed wiring board capable of completely soldering a solder land to a lead under simple control over a manufacturing process even in the case of using a lead-free solder of a low solder wettability. A printed wiring board for mounting a surface mounting device includes a solder land for mounting the surface mounting device, and a leader pattern led from the solder land with only a predetermined portion of the leader pattern being soldered.

Abstract translation: 即使在使用低焊料润湿性的无铅焊料的情况下，也能够在制造工艺的简单控制下提供能够将焊盘完全焊接到引线的印刷电路板。 一种用于安装表面安装装置的印刷电路板包括用于安装表面安装装置的焊盘，以及仅焊接引导图案的预定部分被焊接的焊盘的引导图案。

公开(公告)号：US20090145643A1

公开(公告)日：2009-06-11

申请号：US12166867

申请日：2008-07-02

Applicant: Hironori Tanaka

Inventor： Hironori Tanaka

IPC: H01R43/00 ,  H05K1/16

CPC classification number: H05K1/167 ,  H05K3/4602 ,  H05K2201/09381 ,  H05K2201/09536 ,  H05K2201/09809 ,  H05K2203/1453 ,  Y10T29/49155 ,  Y10T29/49169

Abstract: A printed wiring board with a built-in resistive element comprising a first electrode formed on the surface of an insulating member, a second electrode provided adjacent to the first electrode to form a space therebetween, a resistor-filling part formed by the space between the first electrode and the second electrode, and a resistive element comprising a resistive material provided in the resistor-filling part wherein the resistor-filling part is substantially enclosed by the first electrode and the second electrode.

Abstract translation: 一种具有内置电阻元件的印刷电路板，包括形成在绝缘构件表面上的第一电极，与第一电极相邻设置以在其间形成空间的第二电极，由第一电极之间的空间形成的电阻器填充部分， 第一电极和第二电极，以及电阻元件，其包括设置在电阻器填充部分中的电阻材料，其中电阻器填充部分基本上被第一电极和第二电极包围。

公开(公告)号：US20090045508A1

公开(公告)日：2009-02-19

申请号：US11837835

申请日：2007-08-13

Applicant: Robert John Romero

Inventor： Robert John Romero

IPC: H01L23/48 ,  H01L21/44 ,  H01L23/52

CPC classification number: H05K1/111 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K3/3436 ,  H05K2201/09227 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00014

Abstract: Methods, systems, and apparatuses for ball grid array land patterns are provided. A ball grid array land pattern includes a plurality of land pads and electrically conductive traces. The plurality of land pads is arranged in an array of rows and columns. A perimeter edge of the array includes a pair of adjacent oblong shaped land pads. An electrically conductive trace is routed between the pair of adjacent oblong shaped land pads from a land pad positioned in an interior of the array to a location external to the array. The oblong shaped land pads are narrower than standard round land pads, and thus provide more clearance for the routing of traces. The oblong shaped land pads enable more land pads of the land pattern array to be routed external to the array on each routing layer, and thus can save printed circuit board component and assembly costs.

Abstract translation: 提供了球栅排列图案的方法，系统和装置。 球栅阵列平台图案包括多个焊盘和导电迹线。 多个接地焊盘被布置成行和列的阵列。 阵列的周边边缘包括一对相邻的长方形焊盘。 导电迹线在一对相邻的长方形焊盘之间从位于阵列内部的焊盘传送到阵列外部的位置。 长方形的焊盘比标准的圆形焊盘更窄，从而为迹线的布线提供更多的间隙。 长方形的接地焊盘使得焊盘图案阵列的更多焊盘能够在每个布线层上的阵列外部布线，从而可以节省印刷电路板部件和组装成本。

公开(公告)号：US20090044969A1

公开(公告)日：2009-02-19

申请号：US12219343

申请日：2008-07-21

Applicant: Jun Ishii ,  Yasunari Ooyabu ,  Takeshi Tanaka ,  Toshiki Naito

Inventor： Jun Ishii ,  Yasunari Ooyabu ,  Takeshi Tanaka ,  Toshiki Naito

IPC: H05K1/14

CPC classification number: H05K3/363 ,  H05K1/056 ,  H05K1/117 ,  H05K1/142 ,  H05K2201/058 ,  H05K2201/09145 ,  H05K2201/09381 ,  H05K2203/167

Abstract: A wired circuit board includes a first wired circuit board and a second wired circuit board disposed to be opposed to the first wired circuit board in the same plane. A first opposed surface of the first wired circuit board facing the second wired circuit board and a second opposed surface of the second wired circuit board facing the first wired circuit board include at least two types of interfitting surfaces extending in different directions so as to mutually interfit the first opposed surface with the second opposed surface.

Abstract translation: 布线电路板包括第一布线电路板和布置成与同一平面中的第一布线电路板相对的第二布线电路板。 面向第二布线电路板的第一布线电路板的第一相对表面和面对第一布线电路板的第二布线电路板的第二相对表面包括沿不同方向延伸的至少两种类型的配合表面，以便相互配合 具有第二相对表面的第一相对表面。

公开(公告)号：US20090015345A1

公开(公告)日：2009-01-15

申请号：US12281460

申请日：2007-03-02

Applicant: Taras Kushta ,  Kaoru Narita ,  Tomoyuki Kaneko ,  Shin-ichi Ogou

Inventor： Taras Kushta ,  Kaoru Narita ,  Tomoyuki Kaneko ,  Shin-ichi Ogou

IPC: H03H7/38

CPC classification number: H05K1/116 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/0251 ,  H05K3/429 ,  H05K2201/09381 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/09727

Abstract: According to one embodiment, a broadband transition to joint a via structure and a planar transmission line in a multilayer substrate is formed as an intermediate connection between the signal via pad and the planar transmission line disposed at the same conductor layer. The transverse dimensions of the transition are equal to the via pad diameter at the one end and strip width at another end; The length of the transition can be equal to the characteristic dimensions of the clearance hole in the direction of the planar transmission line or defined as providing the minimal excess inductive reactance in time-domain according to numerical diagrams obtained by three-dimensional full-wave simulations.

Abstract translation: 根据一个实施例，形成在多层基板中连接通孔结构和平面传输线的宽带转变，作为信号通孔焊盘和布置在相同导体层处的平面传输线之间的中间连接。 过渡的横向尺寸等于一端的通孔焊盘直径和另一端的带宽度; 转换的长度可以等于平面传输线方向上的间隙孔的特征尺寸，或者定义为根据通过三维全波模拟获得的数值图在时域中提供最小的额外的电抗 。

公开(公告)号：US20090004501A1

公开(公告)日：2009-01-01

申请号：US11967098

申请日：2007-12-29

Applicant: SHU-JEN TSAI ,  LONG-FONG CHEN ,  WEN-HAW TSENG ,  SHIH-FANG WONG

Inventor： SHU-JEN TSAI ,  LONG-FONG CHEN ,  WEN-HAW TSENG ,  SHIH-FANG WONG

IPC: B32B7/00 ,  B23K35/02

CPC classification number: H05K1/111 ,  H01L2224/16225 ,  H05K3/3436 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T428/12222 ,  Y10T428/24942

Abstract: A pad for soldering a contact of a surface mounted component is provided herein. The pad includes a central portion and a plurality of separate extending portions extending from the central portion. All of the plurality of separate extending portions includes a free end and a connected end connected to the central portion. A width of the free end is larger than a width of the connected end. A circuit board and an electronic device are also provided.

Abstract translation: 本文提供了用于焊接表面安装部件的触点的垫。 垫包括中心部分和从中心部分延伸的多个单独的延伸部分。 所述多个单独的延伸部分包括自由端和连接到中心部分的连接端。 自由端的宽度大于连接端的宽度。 还提供电路板和电子设备。

公开(公告)号：US20080277453A1

公开(公告)日：2008-11-13

申请号：US11871063

申请日：2007-10-11

Applicant: Tadayuki Chikuma

Inventor： Tadayuki Chikuma

IPC: B23K20/12 ,  B32B15/00

CPC classification number: H05K1/111 ,  H05K3/3489 ,  H05K2201/09381 ,  H05K2201/09418 ,  H05K2201/10121 ,  H05K2201/10674 ,  H05K2203/025 ,  Y02P70/611 ,  Y10T428/24826

Abstract: An element is mounted on a carrier by removing an oxide film sufficiently. An element mounting method in which electrodes of the element are fusion bonded to electrodes of the carrier so that the element is mounted on the carrier, the method includes the steps of: positioning the electrodes of the element at electrodes of carrier respectively, one of the electrodes of the carrier is a striped electrode in an arc shape formed on a concentric circle centering one of the electrodes of the element, and another is a center electrode formed near the center location of the concentric circle; and then rubbing the striped electrode of the carrier and the electrode of the element together in a direction of the concentric circle centering the center electrode so as to fusion bond the electrodes.

Abstract translation: 通过充分去除氧化膜将元件安装在载体上。 一种元件安装方法，其中元件的电极与载体的电极熔合，使得元件安装在载体上，该方法包括以下步骤：将元件的电极分别定位在载体的电极处， 载体的电极是形成在以元件的一个电极为中心的同心圆上的弧形条状电极，另一个是形成在同心圆的中心位置附近的中心电极; 然后沿着与中心电极对中的同心圆的方向将载体的条状电极和元件的电极一起摩擦，以便将电极熔合。