公开(公告)号：US20030060000A1

公开(公告)日：2003-03-27

申请号：US10273885

申请日：2002-10-21

Applicant: Seiko Epson Corporation

Inventor： Kazushige Umetsu ,  Yohei Kurashima ,  Jun Amako

IPC: H01L021/8238

CPC classification number: H01L21/486 ,  H01L21/76882 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/051 ,  H01L2224/05563 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/13009 ,  H01L2224/1319 ,  H01L2224/13411 ,  H01L2224/13444 ,  H01L2224/13483 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/811 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/8149 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1016 ,  H01L2924/1017 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/3494 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/096 ,  H05K2203/041 ,  H05K2203/082 ,  H05K2203/107 ,  H01L2924/0105 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A conductive material is provided to an open end of a penetrating hole penetrating through at least a semiconductor element, on the side of a first surface of the semiconductor element. The conductive material is melted to flow into the penetrating hole. The conductive material is made to flow into the penetrating hole in a state that an atmospheric pressure on the side of a second surface of the semiconductor element opposite to the first surface is lower than an atmospheric pressure on the side of the first surface.

公开(公告)号：US06534848B1

公开(公告)日：2003-03-18

申请号：US09657194

申请日：2000-09-07

Applicant: Terry J. Dornbos ,  Raymond A. Phillips, Jr. ,  Mark V. Pierson ,  William J. Rudik ,  David L. Thomas

Inventor： Terry J. Dornbos ,  Raymond A. Phillips, Jr. ,  Mark V. Pierson ,  William J. Rudik ,  David L. Thomas

IPC: H01L2302

CPC classification number: H05K3/0061 ,  H01L21/4846 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10977

Abstract: A method and structure for conductively coupling a metallic stiffener to a chip carrier. A substrate has a conductive pad on its surface and an adhesive layer is formed on the substrate surface. The metallic stiffener is placed on the adhesive layer, wherein the adhesive layer mechanically couples the stiffener to the substrate surface and electrically couples the stiffener to the pad. The adhesive layer is then cured such as by pressurization at elevated temperature. Embodiments of the present invention form the adhesive layer by forming an electrically conductive contact on the pad and setting a dry adhesive on the substrate, such that the electrically conductive contact is within a hole in the dry adhesive. The electrically conductive contact electrically couples the stiffener to the pad. The curing step includes curing both the dry adhesive and the electrically conductive contact, resulting in the dry adhesive adhesively coupling the stiffener to the substrate. The electrically conductive contact may include an electrically conductive adhesive or a metallic solder. Additional embodiments of the present invention form the adhesive layer by applying an electrically conductive adhesive on the substrate, wherein after the stiffener is placed on the adhesive layer, the electrically conductive adhesive mechanically and electrically couples the stiffener to the surface of the substrate.

公开(公告)号：US20030034174A1

公开(公告)日：2003-02-20

申请号：US10198341

申请日：2002-07-18

Inventor： Zhong-You Shi ,  Delin Li ,  Richard McMillan

IPC: H05K003/20 ,  H01R012/04

CPC classification number: H05K3/429 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: A method 10, 110 for making multi-layer circuit boards having metallized apertures 38, 40, 130, 132 which may be selectively and electrically grounded and having at least one formed air-bridge 92, 178.

Abstract translation: 一种用于制造具有金属化孔38,40,130,132的多层电路板的方法10,110，其可以选择性地和电接地并且具有至少一个形成的空气桥92,178。

公开(公告)号：US06485814B1

公开(公告)日：2002-11-26

申请号：US09513162

申请日：2000-02-25

Applicant: Kiyokazu Moriizumi ,  Mikio Nishihara

Inventor： Kiyokazu Moriizumi ,  Mikio Nishihara

IPC: B32B300

CPC classification number: H01L23/49811 ,  H01L2224/1147 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/16152 ,  H05K1/0306 ,  H05K3/4038 ,  H05K3/4605 ,  H05K3/467 ,  H05K2201/0154 ,  H05K2201/0305 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10318 ,  H05K2203/1581 ,  Y10T428/24926 ,  H01L2224/0401

Abstract: To provide electrical conduction between front and back surfaces of a thin film multi-layered circuit board, such as an MCM, at low cost without using a simultaneous firing process for ceramic. The thin film multi-layered circuit board has at least one thin film circuit layer on a first surface of a substrate, wherein a conductor layer is disposed in the lowermost layer of the thin film circuit layer in contact with the first surface of the substrate, and is characterized in that holes for providing the electrical conduction between front and back surfaces of the substrate are formed through the substrate from the first surface to a second surface thereof so that the conductor layer is exposed in the hole, wherein the diameter of the hole is gradually enlarged from the first surface to the second surface.

Abstract translation: 以低成本提供薄膜多层电路板（例如MCM）的前后表面之间的导电，而不需要使用陶瓷的同时烧制工艺。 薄膜多层电路板在基板的第一表面上具有至少一个薄膜电路层，其中导体层设置在与基板的第一表面接触的薄膜电路层的最下层中， 并且其特征在于，通过基板从基板的第一表面到第二表面形成用于提供基板的前表面和后表面之间的导电的孔，使得导体层暴露在孔中，其中孔的直径 从第一表面逐渐增大到第二表面。

公开(公告)号：US20020149914A1

公开(公告)日：2002-10-17

申请号：US10031845

申请日：2002-06-03

Inventor： Akio Karasawa ,  Shigemitsu Toda ,  Taketo Wako ,  Atsuyuki Takai

IPC: H05K001/00 ,  G06F001/16

CPC classification number: H05K1/0266 ,  G02F1/13452 ,  H01R4/02 ,  H01R29/00 ,  H05K1/029 ,  H05K1/0293 ,  H05K1/189 ,  H05K2201/0305 ,  H05K2201/09063 ,  H05K2201/10128 ,  H05K2201/10189 ,  H05K2203/0228 ,  H05K2203/173 ,  H05K2203/175

Abstract: A flexible substrate on which a large number of sorts of LCDs can be installed quickly and inexpensively. On loading on a video controller, a connector 21 is electrically connected to first and second contacts of the video controller. The connector 21 is wired so that, if a wiring 31-1 is cut-out and severed along with the end of the flexible printed wiring board 11, the first and second contacts of the video controller are not in electrically connected state.

Abstract translation: 柔性基板可以快速，低成本地安装大量LCD。 在视频控制器上加载时，连接器21电连接到视频控制器的第一和第二触点。 连接器21被布线，使得如果布线31-1与柔性印刷布线板11的端部一起被切断并切断，则视频控制器的第一和第二触点不处于电连接状态。

公开(公告)号：US20020148809A1

公开(公告)日：2002-10-17

申请号：US09836644

申请日：2001-04-17

Inventor： Andrew Z. Glovatsky ,  Robert E. Belke ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Marc A. Straub ,  Richard K. McMillan ,  Ram S. Raghava ,  Thomas B. Krautheim ,  Michael A. Howey ,  Vivek A. Jairazbhoy

IPC: H01B013/00

CPC classification number: H05K3/4641 ,  H05K3/062 ,  H05K3/4038 ,  H05K3/4623 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/0397 ,  H05K2201/09554 ,  H05K2201/09881 ,  H05K2203/0733 ,  H05K2203/1184 ,  Y10T29/49155

Abstract: A method 10 for making multi-layer electronic circuit boards having metallized apertures 34, 36 which may be selectively and electrically grounded or isolated from an electrical ground plane.

Abstract translation: 一种用于制造具有金属化孔34,36的多层电子电路板的方法10，其可以选择性地电接地或与电接地平面隔离。

公开(公告)号：US06449839B1

公开(公告)日：2002-09-17

申请号：US09655986

申请日：2000-09-06

Applicant: Andrew Z. Glovatsky ,  Thomas Krautheim ,  Robert E. Belke, Jr. ,  Vivek Amir Jairazbhoy ,  Cuong V. Pham

Inventor： Andrew Z. Glovatsky ,  Thomas Krautheim ,  Robert E. Belke, Jr. ,  Vivek Amir Jairazbhoy ,  Cuong V. Pham

IPC: H05K302

CPC classification number: H05K3/4084 ,  H05K1/056 ,  H05K3/062 ,  H05K3/4092 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09554 ,  H05K2203/0195 ,  H05K2203/063 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49156

Abstract: A method for forming connections within a multi-layer electronic circuit board 10. In one non-limiting embodiment, the method includes selectively forming air bridges over portions of the circuit board 10 and selectively collapsing the air bridges with a metallurgical bonding tool, effective to interconnect layers of the circuit board 10.

Abstract translation: 一种用于在多层电子电路板10内形成连接的方法。在一个非限制性实施例中，该方法包括在电路板10的部分上选择性地形成空气桥，并用冶金接合工具选择性地折叠气桥， 电路板10的互连层。

公开(公告)号：US06423910B1

公开(公告)日：2002-07-23

申请号：US09457948

申请日：1999-12-09

Applicant: David William Strickley

Inventor： David William Strickley

IPC: H01R1204

CPC classification number: H05K3/4084 ,  H05K3/0061 ,  H05K3/4038 ,  H05K3/429 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/0397 ,  H05K2201/09554

Abstract: A printed circuit device comprising, a printed circuit board having an electrically conductive heat plane associated with a surface thereof, the circuit board having an opening formed therein which exposes a ground layer or track of the circuit board, a wall defining the opening being provided with an electrically conductive coating which is electrically connected to the ground layer or track, the heat plane being provided with a cut-out defining a projection which is bent to extend into the opening, the projection being secured to said coating electrically to connect the coating and the ground layer or track to the heat plane. The invention also resides in a method of manufacturing a printed circuit device and in a heat plane for use in such a device.

Abstract translation: 一种印刷电路装置，包括：具有与其表面相关的导电热平面的印刷电路板，所述电路板具有形成在其中的开口，其暴露所述电路板的接地层或轨道，限定所述开口的壁设置有 导电涂层，其电连接到接地层或轨道，所述热平面设置有切口，所述切口限定突起，所述突出部被弯曲以延伸到所述开口中，所述突起被电固定到所述涂层以连接所述涂层和 地层或轨道到热平面。 本发明还涉及制造印刷电路器件的方法，并且在用于这种器件的热平面中。

公开(公告)号：US20020079135A1

公开(公告)日：2002-06-27

申请号：US10022222

申请日：2001-12-20

Inventor： Yoshitarou Yazaki ,  Tomohiro Yokochi ,  Koji Kondo ,  Toshikazu Harada ,  Yoshihiko Shiraishi

IPC: H05K001/11 ,  H01R012/04

CPC classification number: H05K3/4632 ,  H05K1/095 ,  H05K3/4069 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0272 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0425 ,  H05K2203/1131 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: Conductive paste containing tin particles and silver particles is packed in a substantially cylindrical via hole formed in a thermoplastic resin film that interposes between conductor patterns and is hot-pressed from both sides. When the metal particles contained in the conductive paste are sintered to form a unified conductive compound, the volume of the conductive paste shrinks. Synchronously, the resin film around the via-hole protrudes into the via-hole. Therefore, the shape of the side wall on the cross-section of the conductive compound provides an arch shape, and a side wall adjacent to a junction part of the conductive compound, which contacts the conductor pattern, is formed with an inclination. Therefore, it is possible to prevent the stress concentration due to deformation of the board.

Abstract translation: 含有锡颗粒和银颗粒的导电糊料被包装在形成在热塑性树脂膜中的大致圆柱形的通孔中，该热塑性树脂膜介于导体图案之间并且从两侧被热压。 当包含在导电浆料中的金属颗粒被烧结以形成统一的导电化合物时，导电浆料的体积收缩。 同时，通孔周围的树脂膜突出到通孔中。 因此，导电性化合物的横截面上的侧壁的形状形成拱形，并且与导体图案接触的导电性化合物的接合部分相邻的侧壁形成倾斜。 因此，可以防止由于板的变形引起的应力集中。

公开(公告)号：US20020053590A1

公开(公告)日：2002-05-09

申请号：US09892303

申请日：2001-06-26

Applicant: Seagate Technology LLC

Inventor： Michael Henry Lennard ,  William Leon Rugg

IPC: B23K031/00 ,  B23K031/02 ,  B23K035/12

CPC classification number: G11B5/486 ,  G11B5/40 ,  G11B5/4806 ,  H05K1/0259 ,  H05K1/0268 ,  H05K3/363 ,  H05K2201/0305 ,  H05K2201/0909 ,  H05K2203/0405 ,  H05K2203/175

Abstract: A method and system are disclosed for protecting an electrical component from electrostatic discharge prior to its electrical connection to an additional component. Specifically, a flex on suspension circuit of a disc drive that is electrically connected to the read/write head is disclosed as having exposed leads for connection to a printed circuit cable assembly. The exposed leads are shunted with a solder conductor such as solder tape after testing of the circuit and head to prevent electrostatic build-up across the read and write elements. The flex on suspension circuit is then electrically connected to the printed circuit assembly cable by reflowing the solder conductor to bond the exposed leads of the flex on suspension circuit to the electrical contacts of the printed circuit assembly cable and also to remove the electrical short established between the exposed leads by the solder conductor.

Abstract translation: 公开了一种方法和系统，用于在其电连接到附加部件之前保护电气部件免受静电放电。 具体地，公开了与读/写头电连接的盘驱动器的悬架电路的弯曲部，其具有用于连接到印刷电路电缆组件的裸露引线。 暴露的引线在测试电路和头部之后用诸如焊料带的焊料导体分流，以防止读取和写入元件之间的静电积聚。 然后通过回流焊接导体将悬挂电路上的弯曲电连接到印刷电路组件电缆，以将暴露在悬架电路上的柔性引线连接到印刷电路组件电缆的电触点，并且还去除 暴露的引线由焊料导体。