公开(公告)号：US20020044431A1

公开(公告)日：2002-04-18

申请号：US09911534

申请日：2001-07-25

Applicant: MINEBEA CO., LTD.

Inventor： Mitsuo Konno

IPC: H05K007/02 ,  H05K007/06

CPC classification number: H01L23/5382 ,  H01L2924/0002 ,  H05K1/029 ,  H05K1/0293 ,  H05K3/222 ,  H05K2201/0305 ,  H05K2201/09709 ,  H05K2201/10212 ,  H05K2201/10689 ,  H05K2203/173 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49174 ,  H01L2924/00

Abstract: A reliable microchip controller board and a manufacturing method thereof suitable for mass production are provided. A board wherein a programmable microchip controller is mounted includes; terminals for writing a program into the microchip controller and a circuit pattern connecting an operating terminal to shared terminals which are disconnected. A non-programmed microchip controller is mounted on the board in a state where patterns are disconnected and then programmed. The disconnected portion is connected thereafter.

Abstract translation: 提供了可靠的微芯片控制器板及其制造方法，适用于批量生产。 其中安装有可编程微芯片控制器的板包括： 用于将程序写入微芯片控制器的端子以及将操作终端连接到共享终端的电路图案。 未编程的微芯片控制器以图案断开然后编程的状态安装在电路板上。 断开连接部分之后连接。

公开(公告)号：US20010052423A1

公开(公告)日：2001-12-20

申请号：US09907971

申请日：2001-03-20

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K001/11

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49156

Abstract: A method for making a multi-layer electronic circuit board 136 having electroplated apertures 96, 98 which may be selectively and electrically isolated from an electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 128 which are structurally supported by material 134.

Abstract translation: 一种用于制造具有电镀孔96,98的多层电子电路板136的方法，其可以与电接地构件46选择性地和电隔离，并且还具有结构上由材料支撑的选择性地形成的空气桥和/或交叉构件128 134。

公开(公告)号：US20010035299A1

公开(公告)日：2001-11-01

申请号：US09815564

申请日：2001-03-23

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K001/03

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T156/1056

Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.

Abstract translation: 一种用于制造具有孔96,98的多层电路板116的方法，其可以与电接地构件46选择性地和电隔离，并且还具有在结构上由材料112支撑的选择性地形成的空气桥和/或交叉构件104.每个 孔96,98选择性地接收导电材料114。

公开(公告)号：US20010035298A1

公开(公告)日：2001-11-01

申请号：US09812963

申请日：2001-03-20

Inventor： Mohan R. Paruchuri

IPC: H05K001/03

CPC classification number: H05K3/44 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536

Abstract: A method 10, 80, 81 for making multi-layer electronic circuit boards 77, 137, 139 having metallized apertures 18, 20, 34, 40, 104, 106, 120.

Abstract translation: 一种用于制造具有金属化孔18,20,34,40,104,106,120的多层电子电路板77,137,139的方法10,80,81。

公开(公告)号：US20010009202A1

公开(公告)日：2001-07-26

申请号：US09819383

申请日：2001-03-28

Inventor： Donald M. Metzelaar ,  Kevin L. Kent ,  Anthony J. Richter

IPC: H05K001/09 ,  H05K001/11

CPC classification number: H05K3/363 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/10477 ,  H05K2201/10666 ,  H05K2203/0285 ,  H05K2203/0405 ,  H05K2203/107

Abstract: An interconnect for connecting two printed circuit boards (30, 32) directly together and a method for achieving same. A through hole (70) is formed in a first printed circuit board (30), which is surrounded by a conductive layer (62). A conductive layer (82) is also deposited on a second printed circuit board (32) opposite the through hole (70). The conductive layers (62, 82) allow for the conduction of electrical signals between and about the two printed circuit boards (30, 32). In the preferred embodiment, the conductive layer (62, 82) is copper metalization and the through hole (70) is plated with copper. A solder joint (58) is applied to fill the through hole (70) and establish electrical connection between the conductive layers (62, 82) on the two printed circuit boards (30, 32). Electrical connection is established by applying the solder joint (58) to and between the conductive layers (62, 82) on both boards (30, 32). In an alternative embodiment using a non-plated through hole (70), the interconnect is achieved by either repetitious localized impact, induced vibration or ultrasonic vibration applied to the solder joint (58) after the solder (56) is deposited.

Abstract translation: 用于将两个印刷电路板（30,32）直接连接在一起的互连以及用于实现其的方法。 在由导电层（62）包围的第一印刷电路板（30）中形成通孔（70）。 导电层（82）也沉积在与通孔（70）相对的第二印刷电路板（32）上。 导电层（62,82）允许在两个印刷电路板（30,32）之间和周围传导电信号。 在优选实施例中，导电层（62,82）是铜金属化，并且通孔（70）镀有铜。 施加焊接接头（58）以填充通孔（70）并在两个印刷电路板（30,32）上的导电层（62,82）之间建立电连接。 通过将焊接接头（58）施加到两个板（30,32）上的导电层（62,82）之间和之间来建立电连接。 在使用非电镀通孔（70）的替代实施例中，通过在沉积焊料（56）之后施加到焊料接头（58）上的重复局部冲击，诱发振动或超声波振动来实现互连。

公开(公告)号：US20010004944A1

公开(公告)日：2001-06-28

申请号：US09735893

申请日：2000-12-14

Inventor： Kei Nakamura ,  Masakazu Sugimoto ,  Yasushi Inoue ,  Megumu Nagasawa ,  Takuji Okeyui ,  Masayuki Kaneto ,  Shinya Ota

IPC: H05K001/11

CPC classification number: H05K3/4038 ,  H05K3/3484 ,  H05K3/445 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4641 ,  H05K2201/0215 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2203/0425 ,  H05K2203/1461

Abstract: A double-sided circuit board of which a solder conductor is prevented from deformation in a cycling test so as to maintain high connection reliability, comprises an insulating layer 2 made of an organic high molecular weight resin and a circuit 3 provided on each side of the insulating layer 2, the circuits 3 on both sides being electrically connected through via-holes filled with a conductor 4 made of solder having a metal powder 6 dispersed therein.

Abstract translation: 在循环试验中防止焊料导体变形以保持高连接可靠性的双面电路板包括由有机高分子量树脂制成的绝缘层2和设置在第二侧的电路3 绝缘层2，两侧的电路3通过填充有分散在其中的金属粉末6的由焊料制成的导体4的通孔而电连接。

公开(公告)号：US06223431B1

公开(公告)日：2001-05-01

申请号：US09086235

申请日：1998-05-28

Applicant: Peter Doikas ,  David Geis ,  Jeffrey D. Merwin

Inventor： Peter Doikas ,  David Geis ,  Jeffrey D. Merwin

IPC: H01R900

CPC classification number: H05K3/4038 ,  H01R43/0256 ,  H05K1/111 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10416 ,  H05K2203/033 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49153

Abstract: A method (100) for providing an electrical ground connection between a printed circuit board (700) and a metallic substrate (200) comprises the steps of: (i) providing an aperture (204) in the substrate (200); (ii) forming a ground plug (302) out of a metallic blank (300); (iii) inserting the ground plug (300) into the aperture in the substrate (200); (iv) compressing the ground plug (302) into the aperture (204) in the substrate (200); (v) placing the printed circuit board (700) onto the substrate (200); and (vi) applying solder into the aperture in the printed circuit board (700) and onto the ground plug (302). The steps of forming (104), inserting (106), and compressing (108) are carried out in a single punching operation (120). The method (100) efficiently provides a high quality electrical ground connection and avoids any need for sophisticated machinery.

Abstract translation: 一种用于在印刷电路板（700）和金属衬底（200）之间提供电接地连接的方法（100）包括以下步骤：（i）在衬底（200）中提供孔（204）; （ii）从金属坯料（300）中形成接地塞（302）; （iii）将接地插头（300）插入基板（200）中的孔中; （iv）将接地插头（302）压缩到衬底（200）中的孔（204）中; （v）将印刷电路板（700）放置在基板（200）上; 和（vi）将焊料施加到印刷电路板（700）中的孔中并到达接地插头（302）上。 在单次冲压操作（120）中进行形成（104），插入（106）和压缩（108）的步骤。 方法（100）有效地提供高质量的电接地连接，并避免对复杂机械的任何需要。

公开(公告)号：US06201707B1

公开(公告)日：2001-03-13

申请号：US09318796

申请日：1999-05-26

Applicant: Yoshiki Sota

Inventor： Yoshiki Sota

IPC: H05K118

CPC classification number: H05K1/112 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/4038 ,  H05K3/4092 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10734 ,  H05K2203/1178 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A wiring substrate used for a resin-sealing type semiconductor device is provided with an insulating substrate in which a through hole used for connecting an external terminal is formed, a wiring pattern formed on a semiconductor-chip packaging surface side of the insulating substrate, a land section that is formed at an end of the wiring pattern in a manner so as to cover the through hole from the semiconductor-chip packaging surface side, and that is used for connecting the external connecting terminal to the wiring pattern from the surface side opposite to the above-mentioned semiconductor-chip packaging surface side of the insulating substrate, and a through-hole opening section that allows the through hole to be partially open on the semiconductor-chip packaging surface side. This arrangement makes it possible to prevent problems of separation and swelling of resin caused by bubbles and moisture expanded by heat, which reside in the interface between the wiring substrate used for the resin-sealing type semiconductor device and the semiconductor chip packaged on the wiring substrate used for the resin-sealing type semiconductor device.

Abstract translation: 用于树脂密封型半导体器件的布线基板设置有绝缘基板，其中形成用于连接外部端子的通孔，形成在绝缘基板的半导体芯片封装表面侧上的布线图案， 形成在布线图案的端部以从半导体芯片封装表面侧覆盖通孔的方式形成的，用于从外部连接端子与布线图案相对的表面侧相对的连接端子 到绝缘基板的上述半导体芯片封装表面侧，以及允许通孔在半导体芯片封装表面侧部分地打开的通孔开口部。 这种布置使得可以防止由于用于树脂密封型半导体器件的布线基板与封装在布线基板上的半导体芯片之间的界面中的由气泡和热膨胀而引起的树脂分离和膨胀的问题 用于树脂密封型半导体器件。

公开(公告)号：US06193143B1

公开(公告)日：2001-02-27

申请号：US09366194

申请日：1999-08-04

Applicant: Takatoshi Ishikawa

Inventor： Takatoshi Ishikawa

IPC: B23K3102

CPC classification number: H05K3/3478 ,  H01L21/4846 ,  H01L2224/81 ,  H05K3/3484 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/035 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10992 ,  H05K2203/0195 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/082

Abstract: To present a method and apparatus for forming favorable solder bumps on a substrate of electronic component or the like, in which metal paste is applied on the lower surface of solder balls attracted by a suction tool, and the solder balls are positioned to contact with recesses having the electrode in the bottom, so that the metal paste adhered to the solder balls is adhered to the top of the recesses. Next, the solder balls are moved reciprocally in the vertical direction or horizontal direction. As a result, the metal paste adhered to the top of the recesses is collected to fill up the recesses. Then, the solder balls are put on the top of the recesses, and heated and fused, and solder bumps are formed.

Abstract translation: 为了提出在电子部件等的基板上形成有利的焊料凸块的方法和装置，其中金属浆料被施加在由吸入工具吸引的焊球的下表面上，并且焊球定位成与凹部接触 在底部具有电极，使得粘附到焊球上的金属糊粘附到凹部的顶部。 接下来，焊球在垂直方向或水平方向上往复移动。 结果，收集粘附到凹部顶部的金属糊料以填充凹部。 然后，将焊球放在凹部的顶部，加热熔化，形成焊锡凸块。

公开(公告)号：US06168854A

公开(公告)日：2001-01-02

申请号：US09331621

申请日：1999-06-23

Applicant: Frank Robert Gibbs

Inventor： Frank Robert Gibbs

IPC: B32B700

CPC classification number: H05K3/062 ,  H05K1/0271 ,  H05K1/112 ,  H05K3/3473 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10636 ,  H05K2203/043 ,  H05K2203/0455 ,  Y02P70/611 ,  Y10S428/901 ,  Y10T428/24917

Abstract: A method of manufacturing a printed circuit board comprising a high density conductive pattern comprising at least one pad suitable for forming a solder connection with at least one surface mounted component. The method comprises the steps of forming the pattern; and forming a protective coating on the pattern suitable for soldering without solder resist adjacent the pad. The pad can adjoin land surrounding via hole, thereby increasing density of the circuit board layout. A further process for manufacturing printed circuits applies an etch resist to a conductive pattern, etches the pattern and uses the etch resist to form a protective coating on the pattern. The etch resist may be heated to cause the etch resist to form an alloy.

Abstract translation: 一种制造印刷电路板的方法，包括高密度导电图案，其包括至少一个适于与至少一个表面安装部件形成焊料连接的焊盘。 该方法包括形成图案的步骤; 以及在适合焊接的图案上形成保护涂层，而不需要邻近焊盘的阻焊剂。 垫可以邻接通孔周围的陆地，从而增加电路板布局的密度。 用于制造印刷电路的另一种方法是对导电图案施加蚀刻抗蚀剂，蚀刻图案并使用蚀刻抗蚀剂在图案上形成保护涂层。 可以加热蚀刻抗蚀剂以使蚀刻抗蚀剂形成合金。